Datasets:

microsoft
/

FStarDataSet-V2

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Split (3)

train · 30.9k rows

file_name stringlengths 5 52	name stringlengths 4 95	original_source_type stringlengths 0 23k	source_type stringlengths 9 23k	source_definition stringlengths 9 57.9k	source dict	source_range dict	file_context stringlengths 0 721k	dependencies dict	opens_and_abbrevs listlengths 2 94	vconfig dict	interleaved bool 1 class	verbose_type stringlengths 1 7.42k	effect stringclasses 118 values	effect_flags sequencelengths 0 2	mutual_with sequencelengths 0 11	ideal_premises sequencelengths 0 236	proof_features sequencelengths 0 1	is_simple_lemma bool 2 classes	is_div bool 2 classes	is_proof bool 2 classes	is_simply_typed bool 2 classes	is_type bool 2 classes	partial_definition stringlengths 5 3.99k	completed_definiton stringlengths 1 1.63M	isa_cross_project_example bool 1 class
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_wp_Vsbox	val va_wp_Vsbox (dst src: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_Vsbox (dst src: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (())))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 38, "end_line": 1727, "start_col": 0, "start_line": 1717 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig)) //-- //-- SHA256_Sigma1 val va_code_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma1 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src)) = (va_QProc (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma1 dst src t block hash_orig) (va_wpProof_SHA256_Sigma1 dst src t block hash_orig)) //-- //-- Vsbox val va_code_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsbox : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsbox dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> va_s0: Vale.PPC64LE.Decls.va_state -> va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_state", "Prims.unit", "Prims.l_and", "Vale.PPC64LE.Decls.va_is_dst_vec_opr", "Vale.PPC64LE.Decls.va_is_src_vec_opr", "Prims.b2t", "Vale.PPC64LE.Decls.va_get_ok", "Prims.l_Forall", "Vale.PPC64LE.Decls.va_value_vec_opr", "Prims.l_imp", "Prims.eq2", "Vale.Def.Words_s.four", "Vale.Def.Types_s.nat32", "Vale.PPC64LE.Decls.va_eval_vec_opr", "Vale.Def.Words_s.Mkfour", "Vale.AES.AES_common_s.sub_word", "Vale.Def.Words_s.__proj__Mkfour__item__lo0", "Vale.Def.Words_s.__proj__Mkfour__item__lo1", "Vale.Def.Words_s.__proj__Mkfour__item__hi2", "Vale.Def.Words_s.__proj__Mkfour__item__hi3", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Decls.va_upd_operand_vec_opr" ]	[]	false	false	false	true	true	let va_wp_Vsbox (dst src: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst: va_value_vec_opr). let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (())))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_wp_RotWord	val va_wp_RotWord (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_RotWord (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (())))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 33, "end_line": 1781, "start_col": 0, "start_line": 1767 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig)) //-- //-- SHA256_Sigma1 val va_code_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma1 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src)) = (va_QProc (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma1 dst src t block hash_orig) (va_wpProof_SHA256_Sigma1 dst src t block hash_orig)) //-- //-- Vsbox val va_code_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsbox : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsbox dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsbox dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsbox dst src)) = (va_QProc (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) (va_wp_Vsbox dst src) (va_wpProof_Vsbox dst src)) //-- //-- RotWord val va_code_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_RotWord : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_RotWord dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src1: Vale.PPC64LE.Decls.va_operand_vec_opr -> src2: Vale.PPC64LE.Decls.va_operand_vec_opr -> va_s0: Vale.PPC64LE.Decls.va_state -> va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_state", "Prims.unit", "Prims.l_and", "Vale.PPC64LE.Decls.va_is_dst_vec_opr", "Vale.PPC64LE.Decls.va_is_src_vec_opr", "Prims.b2t", "Vale.PPC64LE.Decls.va_get_ok", "Prims.eq2", "Prims.int", "Vale.Def.Words_s.__proj__Mkfour__item__lo0", "Vale.Def.Types_s.nat32", "Vale.PPC64LE.Decls.va_eval_vec_opr", "Vale.Def.Words_s.__proj__Mkfour__item__lo1", "Vale.Def.Words_s.__proj__Mkfour__item__hi2", "Vale.Def.Words_s.__proj__Mkfour__item__hi3", "Prims.l_Forall", "Vale.PPC64LE.Decls.va_value_vec_opr", "Prims.l_imp", "Vale.Def.Words_s.four", "Vale.Def.Words_s.Mkfour", "Vale.AES.AES_BE_s.rot_word", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Decls.va_upd_operand_vec_opr" ]	[]	false	false	false	true	true	let va_wp_RotWord (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8) /\ (forall (va_x_dst: va_value_vec_opr). let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (())))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_Vspltisb	val va_quick_Vspltisb (dst: va_operand_vec_opr) (src: sim) : (va_quickCode unit (va_code_Vspltisb dst src))	val va_quick_Vspltisb (dst: va_operand_vec_opr) (src: sim) : (va_quickCode unit (va_code_Vspltisb dst src))	let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 34, "end_line": 933, "start_col": 0, "start_line": 930 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src: Vale.PPC64LE.Machine_s.sim -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_Vspltisb dst src)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Machine_s.sim", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_Vspltisb", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_mod_vec_opr", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_Vspltisb", "Vale.PPC64LE.InsVector.va_wpProof_Vspltisb", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_Vspltisb (dst: va_operand_vec_opr) (src: sim) : (va_quickCode unit (va_code_Vspltisb dst src)) =	(va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src))	false
LowStar.RVector.fst	LowStar.RVector.rs_loc_elem	val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc	val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc	let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i))	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 63, "end_line": 166, "start_col": 0, "start_line": 165 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} ->	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> rs: FStar.Seq.Base.seq a -> i: FStar.Integers.nat{i < FStar.Seq.Base.length rs} -> Prims.GTot LowStar.Monotonic.Buffer.loc	Prims.GTot	[ "sometrivial" ]	[]	[ "LowStar.Regional.regional", "FStar.Seq.Base.seq", "FStar.Integers.nat", "Prims.b2t", "FStar.Integers.op_Less", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.Seq.Base.length", "LowStar.Monotonic.Buffer.loc_all_regions_from", "LowStar.Regional.__proj__Rgl__item__region_of", "FStar.Seq.Base.index", "LowStar.Monotonic.Buffer.loc" ]	[]	false	false	false	false	false	let rs_loc_elem #a #rst rg rs i =	loc_all_regions_from false (Rgl?.region_of rg (S.index rs i))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_wp_Vcipher	val va_wp_Vcipher (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_Vcipher (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (())))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 86, "end_line": 1820, "start_col": 0, "start_line": 1814 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig)) //-- //-- SHA256_Sigma1 val va_code_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma1 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src)) = (va_QProc (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma1 dst src t block hash_orig) (va_wpProof_SHA256_Sigma1 dst src t block hash_orig)) //-- //-- Vsbox val va_code_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsbox : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsbox dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsbox dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsbox dst src)) = (va_QProc (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) (va_wp_Vsbox dst src) (va_wpProof_Vsbox dst src)) //-- //-- RotWord val va_code_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_RotWord : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_RotWord dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_RotWord dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_RotWord dst src1 src2)) = (va_QProc (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_RotWord dst src1 src2) (va_wpProof_RotWord dst src1 src2)) //-- //-- Vcipher val va_code_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipher : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipher dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src1: Vale.PPC64LE.Decls.va_operand_vec_opr -> src2: Vale.PPC64LE.Decls.va_operand_vec_opr -> va_s0: Vale.PPC64LE.Decls.va_state -> va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_state", "Prims.unit", "Prims.l_and", "Vale.PPC64LE.Decls.va_is_dst_vec_opr", "Vale.PPC64LE.Decls.va_is_src_vec_opr", "Prims.b2t", "Vale.PPC64LE.Decls.va_get_ok", "Prims.l_Forall", "Vale.PPC64LE.Decls.va_value_vec_opr", "Prims.l_imp", "Prims.eq2", "Vale.Def.Types_s.quad32", "Vale.PPC64LE.Decls.va_eval_vec_opr", "Vale.Def.Types_s.quad32_xor", "Vale.AES.AES_BE_s.mix_columns", "Vale.AES.AES_BE_s.shift_rows", "Vale.AES.AES_common_s.sub_bytes", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Decls.va_upd_operand_vec_opr" ]	[]	false	false	false	true	true	let va_wp_Vcipher (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst: va_value_vec_opr). let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (())))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_Load128_word4_buffer	val va_quick_Load128_word4_buffer (h: va_operand_heaplet) (dst: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t))	val va_quick_Load128_word4_buffer (h: va_operand_heaplet) (dst: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t))	let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 13, "end_line": 1108, "start_col": 0, "start_line": 1103 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: Vale.PPC64LE.Decls.va_operand_heaplet -> dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> base: Vale.PPC64LE.Decls.va_operand_reg_opr -> t: Vale.Arch.HeapTypes_s.taint -> b: Vale.PPC64LE.Memory.buffer128 -> index: Prims.int -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_Load128_word4_buffer h dst base t)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_heaplet", "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_operand_reg_opr", "Vale.Arch.HeapTypes_s.taint", "Vale.PPC64LE.Memory.buffer128", "Prims.int", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_Load128_word4_buffer", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_mod_vec_opr", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_Load128_word4_buffer", "Vale.PPC64LE.InsVector.va_wpProof_Load128_word4_buffer", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_Load128_word4_buffer (h: va_operand_heaplet) (dst: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) =	(va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index))	false
LowStar.RVector.fst	LowStar.RVector.loc_all_exts_from	val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc	val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc	let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r)))	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 41, "end_line": 241, "start_col": 0, "start_line": 236 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from:	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	preserve_liveness: Prims.bool -> r: FStar.Monotonic.HyperHeap.rid -> Prims.GTot LowStar.Monotonic.Buffer.loc	Prims.GTot	[ "sometrivial" ]	[]	[ "Prims.bool", "FStar.Monotonic.HyperHeap.rid", "LowStar.Monotonic.Buffer.loc_regions", "FStar.Set.intersect", "FStar.Monotonic.HyperHeap.mod_set", "FStar.Set.singleton", "FStar.Set.complement", "LowStar.Monotonic.Buffer.loc" ]	[]	false	false	false	false	false	let loc_all_exts_from preserve_liveness r =	B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r)))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_wp_Store128_buffer	val va_wp_Store128_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_Store128_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (())))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 56, "end_line": 1029, "start_col": 0, "start_line": 1016 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0)))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: Vale.PPC64LE.Decls.va_operand_heaplet -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> base: Vale.PPC64LE.Decls.va_operand_reg_opr -> offset: Vale.PPC64LE.Decls.va_operand_reg_opr -> t: Vale.Arch.HeapTypes_s.taint -> b: Vale.PPC64LE.Memory.buffer128 -> index: Prims.int -> va_s0: Vale.PPC64LE.Decls.va_state -> va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_heaplet", "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_operand_reg_opr", "Vale.Arch.HeapTypes_s.taint", "Vale.PPC64LE.Memory.buffer128", "Prims.int", "Vale.PPC64LE.Decls.va_state", "Prims.unit", "Prims.l_and", "Vale.PPC64LE.Decls.va_is_dst_heaplet", "Vale.PPC64LE.Decls.va_is_src_vec_opr", "Vale.PPC64LE.Decls.va_is_src_reg_opr", "Prims.b2t", "Vale.PPC64LE.Decls.va_get_ok", "Vale.PPC64LE.Decls.valid_dst_addr", "Vale.PPC64LE.Memory.vuint128", "Vale.PPC64LE.Decls.va_eval_heaplet", "Vale.PPC64LE.Memory.valid_layout_buffer", "Vale.PPC64LE.Decls.va_get_mem_layout", "Vale.PPC64LE.Memory.valid_taint_buf128", "Vale.Arch.HeapImpl.__proj__Mkvale_heap_layout__item__vl_taint", "Prims.eq2", "Prims.op_Addition", "Vale.PPC64LE.Decls.va_eval_reg_opr", "Vale.PPC64LE.Memory.buffer_addr", "Prims.op_Multiply", "Prims.l_Forall", "Vale.PPC64LE.Decls.va_value_heaplet", "Vale.PPC64LE.Memory.vale_heap", "Prims.l_imp", "Vale.PPC64LE.InsVector.buffer128_write", "Vale.PPC64LE.Decls.va_eval_vec_opr", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Decls.va_upd_mem", "Vale.PPC64LE.Decls.va_upd_operand_heaplet" ]	[]	false	false	false	true	true	let va_wp_Store128_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h: va_value_heaplet) (va_x_mem: vale_heap). let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (())))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_wp_Vcipherlast	val va_wp_Vcipherlast (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_Vcipherlast (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_Vcipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (())))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 54, "end_line": 1858, "start_col": 0, "start_line": 1852 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig)) //-- //-- SHA256_Sigma1 val va_code_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma1 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src)) = (va_QProc (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma1 dst src t block hash_orig) (va_wpProof_SHA256_Sigma1 dst src t block hash_orig)) //-- //-- Vsbox val va_code_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsbox : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsbox dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsbox dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsbox dst src)) = (va_QProc (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) (va_wp_Vsbox dst src) (va_wpProof_Vsbox dst src)) //-- //-- RotWord val va_code_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_RotWord : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_RotWord dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_RotWord dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_RotWord dst src1 src2)) = (va_QProc (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_RotWord dst src1 src2) (va_wpProof_RotWord dst src1 src2)) //-- //-- Vcipher val va_code_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipher : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipher dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcipher dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipher dst src1 src2)) = (va_QProc (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipher dst src1 src2) (va_wpProof_Vcipher dst src1 src2)) //-- //-- Vcipherlast val va_code_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipherlast : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipherlast dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src1: Vale.PPC64LE.Decls.va_operand_vec_opr -> src2: Vale.PPC64LE.Decls.va_operand_vec_opr -> va_s0: Vale.PPC64LE.Decls.va_state -> va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_state", "Prims.unit", "Prims.l_and", "Vale.PPC64LE.Decls.va_is_dst_vec_opr", "Vale.PPC64LE.Decls.va_is_src_vec_opr", "Prims.b2t", "Vale.PPC64LE.Decls.va_get_ok", "Prims.l_Forall", "Vale.PPC64LE.Decls.va_value_vec_opr", "Prims.l_imp", "Prims.eq2", "Vale.Def.Types_s.quad32", "Vale.PPC64LE.Decls.va_eval_vec_opr", "Vale.Def.Types_s.quad32_xor", "Vale.AES.AES_BE_s.shift_rows", "Vale.AES.AES_common_s.sub_bytes", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Decls.va_upd_operand_vec_opr" ]	[]	false	false	false	true	true	let va_wp_Vcipherlast (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst: va_value_vec_opr). let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (())))	false
LowStar.RVector.fst	LowStar.RVector.elems_inv	val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0	val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0	let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 38, "end_line": 92, "start_col": 0, "start_line": 91 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg ->	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: FStar.Monotonic.HyperStack.mem -> rv: LowStar.RVector.rvector rg -> Prims.GTot Type0	Prims.GTot	[ "sometrivial" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rvector", "LowStar.RVector.rv_elems_inv", "FStar.UInt32.__uint_to_t", "LowStar.Vector.size_of" ]	[]	false	false	false	false	true	let elems_inv #a #rst #rg h rv =	rv_elems_inv h rv 0ul (V.size_of rv)	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_Store128_buffer	val va_quick_Store128_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t))	val va_quick_Store128_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t))	let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 22, "end_line": 1044, "start_col": 0, "start_line": 1039 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: Vale.PPC64LE.Decls.va_operand_heaplet -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> base: Vale.PPC64LE.Decls.va_operand_reg_opr -> offset: Vale.PPC64LE.Decls.va_operand_reg_opr -> t: Vale.Arch.HeapTypes_s.taint -> b: Vale.PPC64LE.Memory.buffer128 -> index: Prims.int -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_Store128_buffer h src base offset t)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_heaplet", "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_operand_reg_opr", "Vale.Arch.HeapTypes_s.taint", "Vale.PPC64LE.Memory.buffer128", "Prims.int", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_Store128_buffer", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_Mod_mem", "Vale.PPC64LE.QuickCode.va_mod_heaplet", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_Store128_buffer", "Vale.PPC64LE.InsVector.va_wpProof_Store128_buffer", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_Store128_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) =	(va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_wp_Vncipher	val va_wp_Vncipher (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_Vncipher (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_Vncipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.AES.AES_BE_s.inv_mix_columns (Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2)) ==> va_k va_sM (())))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 63, "end_line": 1898, "start_col": 0, "start_line": 1891 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig)) //-- //-- SHA256_Sigma1 val va_code_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma1 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src)) = (va_QProc (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma1 dst src t block hash_orig) (va_wpProof_SHA256_Sigma1 dst src t block hash_orig)) //-- //-- Vsbox val va_code_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsbox : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsbox dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsbox dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsbox dst src)) = (va_QProc (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) (va_wp_Vsbox dst src) (va_wpProof_Vsbox dst src)) //-- //-- RotWord val va_code_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_RotWord : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_RotWord dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_RotWord dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_RotWord dst src1 src2)) = (va_QProc (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_RotWord dst src1 src2) (va_wpProof_RotWord dst src1 src2)) //-- //-- Vcipher val va_code_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipher : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipher dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcipher dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipher dst src1 src2)) = (va_QProc (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipher dst src1 src2) (va_wpProof_Vcipher dst src1 src2)) //-- //-- Vcipherlast val va_code_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipherlast : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipherlast dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcipherlast dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcipherlast dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipherlast dst src1 src2)) = (va_QProc (va_code_Vcipherlast dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipherlast dst src1 src2) (va_wpProof_Vcipherlast dst src1 src2)) //-- //-- Vncipher val va_code_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vncipher : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vncipher dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.AES.AES_BE_s.inv_mix_columns (Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src1: Vale.PPC64LE.Decls.va_operand_vec_opr -> src2: Vale.PPC64LE.Decls.va_operand_vec_opr -> va_s0: Vale.PPC64LE.Decls.va_state -> va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_state", "Prims.unit", "Prims.l_and", "Vale.PPC64LE.Decls.va_is_dst_vec_opr", "Vale.PPC64LE.Decls.va_is_src_vec_opr", "Prims.b2t", "Vale.PPC64LE.Decls.va_get_ok", "Prims.l_Forall", "Vale.PPC64LE.Decls.va_value_vec_opr", "Prims.l_imp", "Prims.eq2", "Vale.Def.Types_s.quad32", "Vale.PPC64LE.Decls.va_eval_vec_opr", "Vale.AES.AES_BE_s.inv_mix_columns", "Vale.Def.Types_s.quad32_xor", "Vale.AES.AES_common_s.inv_sub_bytes", "Vale.AES.AES_BE_s.inv_shift_rows", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Decls.va_upd_operand_vec_opr" ]	[]	false	false	false	true	true	let va_wp_Vncipher (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst: va_value_vec_opr). let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.AES.AES_BE_s.inv_mix_columns (Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2)) ==> va_k va_sM (())))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_wp_Vncipherlast	val va_wp_Vncipherlast (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_Vncipherlast (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_Vncipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (())))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 62, "end_line": 1936, "start_col": 0, "start_line": 1930 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig)) //-- //-- SHA256_Sigma1 val va_code_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma1 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src)) = (va_QProc (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma1 dst src t block hash_orig) (va_wpProof_SHA256_Sigma1 dst src t block hash_orig)) //-- //-- Vsbox val va_code_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsbox : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsbox dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsbox dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsbox dst src)) = (va_QProc (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) (va_wp_Vsbox dst src) (va_wpProof_Vsbox dst src)) //-- //-- RotWord val va_code_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_RotWord : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_RotWord dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_RotWord dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_RotWord dst src1 src2)) = (va_QProc (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_RotWord dst src1 src2) (va_wpProof_RotWord dst src1 src2)) //-- //-- Vcipher val va_code_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipher : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipher dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcipher dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipher dst src1 src2)) = (va_QProc (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipher dst src1 src2) (va_wpProof_Vcipher dst src1 src2)) //-- //-- Vcipherlast val va_code_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipherlast : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipherlast dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcipherlast dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcipherlast dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipherlast dst src1 src2)) = (va_QProc (va_code_Vcipherlast dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipherlast dst src1 src2) (va_wpProof_Vcipherlast dst src1 src2)) //-- //-- Vncipher val va_code_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vncipher : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vncipher dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.AES.AES_BE_s.inv_mix_columns (Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vncipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.AES.AES_BE_s.inv_mix_columns (Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2)) ==> va_k va_sM (()))) val va_wpProof_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vncipher dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vncipher dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vncipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vncipher dst src1 src2)) = (va_QProc (va_code_Vncipher dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vncipher dst src1 src2) (va_wpProof_Vncipher dst src1 src2)) //-- //-- Vncipherlast val va_code_Vncipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vncipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vncipherlast : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vncipherlast dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src1: Vale.PPC64LE.Decls.va_operand_vec_opr -> src2: Vale.PPC64LE.Decls.va_operand_vec_opr -> va_s0: Vale.PPC64LE.Decls.va_state -> va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_state", "Prims.unit", "Prims.l_and", "Vale.PPC64LE.Decls.va_is_dst_vec_opr", "Vale.PPC64LE.Decls.va_is_src_vec_opr", "Prims.b2t", "Vale.PPC64LE.Decls.va_get_ok", "Prims.l_Forall", "Vale.PPC64LE.Decls.va_value_vec_opr", "Prims.l_imp", "Prims.eq2", "Vale.Def.Types_s.quad32", "Vale.PPC64LE.Decls.va_eval_vec_opr", "Vale.Def.Types_s.quad32_xor", "Vale.AES.AES_common_s.inv_sub_bytes", "Vale.AES.AES_BE_s.inv_shift_rows", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Decls.va_upd_operand_vec_opr" ]	[]	false	false	false	true	true	let va_wp_Vncipherlast (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst: va_value_vec_opr). let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (())))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_Load128_word4_buffer_index	val va_quick_Load128_word4_buffer_index (h: va_operand_heaplet) (dst: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t))	val va_quick_Load128_word4_buffer_index (h: va_operand_heaplet) (dst: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t))	let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 72, "end_line": 1177, "start_col": 0, "start_line": 1172 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: Vale.PPC64LE.Decls.va_operand_heaplet -> dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> base: Vale.PPC64LE.Decls.va_operand_reg_opr -> offset: Vale.PPC64LE.Decls.va_operand_reg_opr -> t: Vale.Arch.HeapTypes_s.taint -> b: Vale.PPC64LE.Memory.buffer128 -> index: Prims.int -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_Load128_word4_buffer_index h dst base offset t)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_heaplet", "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_operand_reg_opr", "Vale.Arch.HeapTypes_s.taint", "Vale.PPC64LE.Memory.buffer128", "Prims.int", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_Load128_word4_buffer_index", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_mod_vec_opr", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_Load128_word4_buffer_index", "Vale.PPC64LE.InsVector.va_wpProof_Load128_word4_buffer_index", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_Load128_word4_buffer_index (h: va_operand_heaplet) (dst: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) =	(va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index))	false
LowStar.RVector.fst	LowStar.RVector.rv_elems_reg	val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0	val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0	let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 68, "end_line": 112, "start_col": 0, "start_line": 111 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} ->	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: FStar.Monotonic.HyperStack.mem -> rv: LowStar.RVector.rvector rg -> i: LowStar.Vector.uint32_t -> j: LowStar.Vector.uint32_t{i <= j && j <= LowStar.Vector.size_of rv} -> Prims.GTot Type0	Prims.GTot	[ "sometrivial" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rvector", "LowStar.Vector.uint32_t", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Unsigned", "FStar.Integers.W32", "LowStar.Vector.size_of", "LowStar.RVector.rs_elems_reg", "LowStar.Vector.as_seq", "LowStar.Vector.frameOf", "FStar.UInt32.v" ]	[]	false	false	false	false	true	let rv_elems_reg #a #rst #rg h rv i j =	rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j)	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_Store128_word4_buffer	val va_quick_Store128_word4_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t))	val va_quick_Store128_word4_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t))	let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 15, "end_line": 1239, "start_col": 0, "start_line": 1234 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: Vale.PPC64LE.Decls.va_operand_heaplet -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> base: Vale.PPC64LE.Decls.va_operand_reg_opr -> t: Vale.Arch.HeapTypes_s.taint -> b: Vale.PPC64LE.Memory.buffer128 -> index: Prims.int -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_Store128_word4_buffer h src base t)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_heaplet", "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_operand_reg_opr", "Vale.Arch.HeapTypes_s.taint", "Vale.PPC64LE.Memory.buffer128", "Prims.int", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_Store128_word4_buffer", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_Mod_mem", "Vale.PPC64LE.QuickCode.va_mod_heaplet", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_Store128_word4_buffer", "Vale.PPC64LE.InsVector.va_wpProof_Store128_word4_buffer", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_Store128_word4_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) =	(va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index))	false
LowStar.RVector.fst	LowStar.RVector.rv_elems_inv	val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0	val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0	let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 55, "end_line": 85, "start_col": 0, "start_line": 84 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} ->	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: FStar.Monotonic.HyperStack.mem -> rv: LowStar.RVector.rvector rg -> i: LowStar.Vector.uint32_t -> j: LowStar.Vector.uint32_t{i <= j && j <= LowStar.Vector.size_of rv} -> Prims.GTot Type0	Prims.GTot	[ "sometrivial" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rvector", "LowStar.Vector.uint32_t", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Unsigned", "FStar.Integers.W32", "LowStar.Vector.size_of", "LowStar.RVector.rs_elems_inv", "LowStar.Vector.as_seq", "FStar.UInt32.v" ]	[]	false	false	false	false	true	let rv_elems_inv #a #rst #rg h rv i j =	rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j)	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_wp_Store128_word4_buffer_index	val va_wp_Store128_word4_buffer_index (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_Store128_word4_buffer_index (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (())))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 34, "end_line": 1290, "start_col": 0, "start_line": 1272 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0)))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: Vale.PPC64LE.Decls.va_operand_heaplet -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> base: Vale.PPC64LE.Decls.va_operand_reg_opr -> offset: Vale.PPC64LE.Decls.va_operand_reg_opr -> t: Vale.Arch.HeapTypes_s.taint -> b: Vale.PPC64LE.Memory.buffer128 -> index: Prims.int -> va_s0: Vale.PPC64LE.Decls.va_state -> va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_heaplet", "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_operand_reg_opr", "Vale.Arch.HeapTypes_s.taint", "Vale.PPC64LE.Memory.buffer128", "Prims.int", "Vale.PPC64LE.Decls.va_state", "Prims.unit", "Prims.l_and", "Vale.PPC64LE.Decls.va_is_dst_heaplet", "Vale.PPC64LE.Decls.va_is_src_vec_opr", "Vale.PPC64LE.Decls.va_is_src_reg_opr", "Prims.b2t", "Vale.PPC64LE.Decls.va_get_ok", "Prims.l_not", "Prims.eq2", "Vale.PPC64LE.Decls.valid_dst_addr", "Vale.PPC64LE.Memory.vuint128", "Vale.PPC64LE.Decls.va_eval_heaplet", "Vale.PPC64LE.Memory.valid_layout_buffer", "Vale.PPC64LE.Decls.va_get_mem_layout", "Vale.PPC64LE.Memory.valid_taint_buf128", "Vale.Arch.HeapImpl.__proj__Mkvale_heap_layout__item__vl_taint", "Prims.op_Addition", "Vale.PPC64LE.Decls.va_eval_reg_opr", "Vale.PPC64LE.Memory.buffer_addr", "Prims.op_Multiply", "Prims.l_Forall", "Vale.PPC64LE.Decls.va_value_heaplet", "Vale.PPC64LE.Memory.vale_heap", "Prims.l_imp", "Vale.PPC64LE.InsVector.buffer128_write", "Vale.Def.Words_s.Mkfour", "Vale.Def.Types_s.nat32", "Vale.Def.Words_s.__proj__Mkfour__item__hi3", "Vale.PPC64LE.Decls.va_eval_vec_opr", "Vale.Def.Words_s.__proj__Mkfour__item__hi2", "Vale.Def.Words_s.__proj__Mkfour__item__lo1", "Vale.Def.Words_s.__proj__Mkfour__item__lo0", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Decls.va_upd_mem", "Vale.PPC64LE.Decls.va_upd_operand_heaplet" ]	[]	false	false	false	true	true	let va_wp_Store128_word4_buffer_index (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h: va_value_heaplet) (va_x_mem: vale_heap). let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (())))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_wp_Vpmsumd	val va_wp_Vpmsumd (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_Vpmsumd (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_Vpmsumd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2_s.add (Vale.Math.Poly2_s.mul (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_lo (va_eval_vec_opr va_s0 src1))) (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_lo (va_eval_vec_opr va_s0 src2)))) (Vale.Math.Poly2_s.mul (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_hi (va_eval_vec_opr va_s0 src1))) (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_hi (va_eval_vec_opr va_s0 src2))))) ==> va_k va_sM (())))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 35, "end_line": 1984, "start_col": 0, "start_line": 1973 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig)) //-- //-- SHA256_Sigma1 val va_code_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma1 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src)) = (va_QProc (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma1 dst src t block hash_orig) (va_wpProof_SHA256_Sigma1 dst src t block hash_orig)) //-- //-- Vsbox val va_code_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsbox : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsbox dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsbox dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsbox dst src)) = (va_QProc (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) (va_wp_Vsbox dst src) (va_wpProof_Vsbox dst src)) //-- //-- RotWord val va_code_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_RotWord : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_RotWord dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_RotWord dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_RotWord dst src1 src2)) = (va_QProc (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_RotWord dst src1 src2) (va_wpProof_RotWord dst src1 src2)) //-- //-- Vcipher val va_code_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipher : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipher dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcipher dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipher dst src1 src2)) = (va_QProc (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipher dst src1 src2) (va_wpProof_Vcipher dst src1 src2)) //-- //-- Vcipherlast val va_code_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipherlast : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipherlast dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcipherlast dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcipherlast dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipherlast dst src1 src2)) = (va_QProc (va_code_Vcipherlast dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipherlast dst src1 src2) (va_wpProof_Vcipherlast dst src1 src2)) //-- //-- Vncipher val va_code_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vncipher : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vncipher dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.AES.AES_BE_s.inv_mix_columns (Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vncipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.AES.AES_BE_s.inv_mix_columns (Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2)) ==> va_k va_sM (()))) val va_wpProof_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vncipher dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vncipher dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vncipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vncipher dst src1 src2)) = (va_QProc (va_code_Vncipher dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vncipher dst src1 src2) (va_wpProof_Vncipher dst src1 src2)) //-- //-- Vncipherlast val va_code_Vncipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vncipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vncipherlast : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vncipherlast dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vncipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vncipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vncipherlast dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vncipherlast dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vncipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vncipherlast dst src1 src2)) = (va_QProc (va_code_Vncipherlast dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vncipherlast dst src1 src2) (va_wpProof_Vncipherlast dst src1 src2)) //-- //-- Vpmsumd val va_code_Vpmsumd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vpmsumd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vpmsumd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vpmsumd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2_s.add (Vale.Math.Poly2_s.mul (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_lo (va_eval_vec_opr va_s0 src1))) (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_lo (va_eval_vec_opr va_s0 src2)))) (Vale.Math.Poly2_s.mul (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_hi (va_eval_vec_opr va_s0 src1))) (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_hi (va_eval_vec_opr va_s0 src2))))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src1: Vale.PPC64LE.Decls.va_operand_vec_opr -> src2: Vale.PPC64LE.Decls.va_operand_vec_opr -> va_s0: Vale.PPC64LE.Decls.va_state -> va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_state", "Prims.unit", "Prims.l_and", "Vale.PPC64LE.Decls.va_is_dst_vec_opr", "Vale.PPC64LE.Decls.va_is_src_vec_opr", "Prims.b2t", "Vale.PPC64LE.Decls.va_get_ok", "Prims.l_Forall", "Vale.PPC64LE.Decls.va_value_vec_opr", "Prims.l_imp", "Prims.eq2", "Vale.Def.Types_s.quad32", "Vale.PPC64LE.Decls.va_eval_vec_opr", "Vale.Math.Poly2.Bits_s.to_quad32", "Vale.Math.Poly2_s.add", "Vale.Math.Poly2_s.mul", "Vale.Math.Poly2.Bits_s.of_double32", "Vale.Arch.Types.quad32_double_lo", "Vale.Arch.Types.quad32_double_hi", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Decls.va_upd_operand_vec_opr" ]	[]	false	false	false	true	true	let va_wp_Vpmsumd (dst src1 src2: va_operand_vec_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst: va_value_vec_opr). let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2_s.add (Vale.Math.Poly2_s.mul (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_lo (va_eval_vec_opr va_s0 src1))) (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_lo (va_eval_vec_opr va_s0 src2)))) (Vale.Math.Poly2_s.mul (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_hi (va_eval_vec_opr va_s0 src1))) (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_hi (va_eval_vec_opr va_s0 src2))))) ==> va_k va_sM (())))	false
LowStar.RVector.fst	LowStar.RVector.rv_loc_elems	val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc	val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc	let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 53, "end_line": 183, "start_col": 0, "start_line": 182 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} ->	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: FStar.Monotonic.HyperStack.mem -> rv: LowStar.RVector.rvector rg -> i: LowStar.Vector.uint32_t -> j: LowStar.Vector.uint32_t{i <= j && j <= LowStar.Vector.size_of rv} -> Prims.GTot LowStar.Monotonic.Buffer.loc	Prims.GTot	[ "sometrivial" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rvector", "LowStar.Vector.uint32_t", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Unsigned", "FStar.Integers.W32", "LowStar.Vector.size_of", "LowStar.RVector.rs_loc_elems", "LowStar.Vector.as_seq", "FStar.UInt32.v", "LowStar.Monotonic.Buffer.loc" ]	[]	false	false	false	false	false	let rv_loc_elems #a #rst #rg h rv i j =	rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j)	false
LowStar.RVector.fst	LowStar.RVector.rv_loc_elem	val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc	val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc	let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 55, "end_line": 191, "start_col": 0, "start_line": 190 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} ->	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: FStar.Monotonic.HyperStack.mem -> rv: LowStar.RVector.rvector rg -> i: LowStar.Vector.uint32_t{i < LowStar.Vector.size_of rv} -> Prims.GTot LowStar.Monotonic.Buffer.loc	Prims.GTot	[ "sometrivial" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rvector", "LowStar.Vector.uint32_t", "Prims.b2t", "FStar.Integers.op_Less", "FStar.Integers.Unsigned", "FStar.Integers.W32", "LowStar.Vector.size_of", "LowStar.RVector.rs_loc_elems", "LowStar.Vector.as_seq", "FStar.UInt32.v", "FStar.Integers.op_Plus", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "LowStar.Monotonic.Buffer.loc" ]	[]	false	false	false	false	false	let rv_loc_elem #a #rst #rg h rv i =	rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i + 1)	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_Store128_word4_buffer_index	val va_quick_Store128_word4_buffer_index (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t))	val va_quick_Store128_word4_buffer_index (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t))	let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 73, "end_line": 1306, "start_col": 0, "start_line": 1301 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: Vale.PPC64LE.Decls.va_operand_heaplet -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> base: Vale.PPC64LE.Decls.va_operand_reg_opr -> offset: Vale.PPC64LE.Decls.va_operand_reg_opr -> t: Vale.Arch.HeapTypes_s.taint -> b: Vale.PPC64LE.Memory.buffer128 -> index: Prims.int -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_Store128_word4_buffer_index h src base offset t)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_heaplet", "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_operand_reg_opr", "Vale.Arch.HeapTypes_s.taint", "Vale.PPC64LE.Memory.buffer128", "Prims.int", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_Store128_word4_buffer_index", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_Mod_mem", "Vale.PPC64LE.QuickCode.va_mod_heaplet", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_Store128_word4_buffer_index", "Vale.PPC64LE.InsVector.va_wpProof_Store128_word4_buffer_index", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_Store128_word4_buffer_index (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) =	(va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_wp_Store128_byte16_buffer_index	val va_wp_Store128_byte16_buffer_index (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_Store128_byte16_buffer_index (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (())))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 80, "end_line": 1516, "start_col": 0, "start_line": 1502 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0)))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: Vale.PPC64LE.Decls.va_operand_heaplet -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> base: Vale.PPC64LE.Decls.va_operand_reg_opr -> offset: Vale.PPC64LE.Decls.va_operand_reg_opr -> t: Vale.Arch.HeapTypes_s.taint -> b: Vale.PPC64LE.Memory.buffer128 -> index: Prims.int -> va_s0: Vale.PPC64LE.Decls.va_state -> va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_heaplet", "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_operand_reg_opr", "Vale.Arch.HeapTypes_s.taint", "Vale.PPC64LE.Memory.buffer128", "Prims.int", "Vale.PPC64LE.Decls.va_state", "Prims.unit", "Prims.l_and", "Vale.PPC64LE.Decls.va_is_dst_heaplet", "Vale.PPC64LE.Decls.va_is_src_vec_opr", "Vale.PPC64LE.Decls.va_is_src_reg_opr", "Prims.b2t", "Vale.PPC64LE.Decls.va_get_ok", "Prims.l_not", "Prims.eq2", "Vale.PPC64LE.Decls.valid_dst_addr", "Vale.PPC64LE.Memory.vuint128", "Vale.PPC64LE.Decls.va_eval_heaplet", "Vale.PPC64LE.Memory.valid_layout_buffer", "Vale.PPC64LE.Decls.va_get_mem_layout", "Vale.PPC64LE.Memory.valid_taint_buf128", "Vale.Arch.HeapImpl.__proj__Mkvale_heap_layout__item__vl_taint", "Prims.op_Addition", "Vale.PPC64LE.Decls.va_eval_reg_opr", "Vale.PPC64LE.Memory.buffer_addr", "Prims.op_Multiply", "Prims.l_Forall", "Vale.PPC64LE.Decls.va_value_heaplet", "Vale.PPC64LE.Memory.vale_heap", "Prims.l_imp", "Vale.PPC64LE.InsVector.buffer128_write", "Vale.Def.Types_s.reverse_bytes_quad32", "Vale.PPC64LE.Decls.va_eval_vec_opr", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Decls.va_upd_mem", "Vale.PPC64LE.Decls.va_upd_operand_heaplet" ]	[]	false	false	false	true	true	let va_wp_Store128_byte16_buffer_index (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h: va_value_heaplet) (va_x_mem: vale_heap). let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (())))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_Store128_byte16_buffer_index	val va_quick_Store128_byte16_buffer_index (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t))	val va_quick_Store128_byte16_buffer_index (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t))	let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 74, "end_line": 1532, "start_col": 0, "start_line": 1527 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: Vale.PPC64LE.Decls.va_operand_heaplet -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> base: Vale.PPC64LE.Decls.va_operand_reg_opr -> offset: Vale.PPC64LE.Decls.va_operand_reg_opr -> t: Vale.Arch.HeapTypes_s.taint -> b: Vale.PPC64LE.Memory.buffer128 -> index: Prims.int -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_Store128_byte16_buffer_index h src base offset t)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_heaplet", "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_operand_reg_opr", "Vale.Arch.HeapTypes_s.taint", "Vale.PPC64LE.Memory.buffer128", "Prims.int", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_Store128_byte16_buffer_index", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_Mod_mem", "Vale.PPC64LE.QuickCode.va_mod_heaplet", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_Store128_byte16_buffer_index", "Vale.PPC64LE.InsVector.va_wpProof_Store128_byte16_buffer_index", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_Store128_byte16_buffer_index (h: va_operand_heaplet) (src: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) =	(va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_wp_Store128_word4_buffer	val va_wp_Store128_word4_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_Store128_word4_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (())))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 34, "end_line": 1224, "start_col": 0, "start_line": 1207 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0)))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: Vale.PPC64LE.Decls.va_operand_heaplet -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> base: Vale.PPC64LE.Decls.va_operand_reg_opr -> t: Vale.Arch.HeapTypes_s.taint -> b: Vale.PPC64LE.Memory.buffer128 -> index: Prims.int -> va_s0: Vale.PPC64LE.Decls.va_state -> va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_heaplet", "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_operand_reg_opr", "Vale.Arch.HeapTypes_s.taint", "Vale.PPC64LE.Memory.buffer128", "Prims.int", "Vale.PPC64LE.Decls.va_state", "Prims.unit", "Prims.l_and", "Vale.PPC64LE.Decls.va_is_dst_heaplet", "Vale.PPC64LE.Decls.va_is_src_vec_opr", "Vale.PPC64LE.Decls.va_is_src_reg_opr", "Prims.b2t", "Vale.PPC64LE.Decls.va_get_ok", "Vale.PPC64LE.Decls.valid_dst_addr", "Vale.PPC64LE.Memory.vuint128", "Vale.PPC64LE.Decls.va_eval_heaplet", "Vale.PPC64LE.Memory.valid_layout_buffer", "Vale.PPC64LE.Decls.va_get_mem_layout", "Vale.PPC64LE.Memory.valid_taint_buf128", "Vale.Arch.HeapImpl.__proj__Mkvale_heap_layout__item__vl_taint", "Prims.eq2", "Vale.PPC64LE.Decls.va_eval_reg_opr", "Prims.op_Addition", "Vale.PPC64LE.Memory.buffer_addr", "Prims.op_Multiply", "Prims.l_Forall", "Vale.PPC64LE.Decls.va_value_heaplet", "Vale.PPC64LE.Memory.vale_heap", "Prims.l_imp", "Vale.PPC64LE.InsVector.buffer128_write", "Vale.Def.Words_s.Mkfour", "Vale.Def.Types_s.nat32", "Vale.Def.Words_s.__proj__Mkfour__item__hi3", "Vale.PPC64LE.Decls.va_eval_vec_opr", "Vale.Def.Words_s.__proj__Mkfour__item__hi2", "Vale.Def.Words_s.__proj__Mkfour__item__lo1", "Vale.Def.Words_s.__proj__Mkfour__item__lo0", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Decls.va_upd_mem", "Vale.PPC64LE.Decls.va_upd_operand_heaplet" ]	[]	false	false	false	true	true	let va_wp_Store128_word4_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h: va_value_heaplet) (va_x_mem: vale_heap). let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (())))	false
LowStar.RVector.fst	LowStar.RVector.elems_reg	val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0	val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0	let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 38, "end_line": 119, "start_col": 0, "start_line": 118 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg ->	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: FStar.Monotonic.HyperStack.mem -> rv: LowStar.RVector.rvector rg -> Prims.GTot Type0	Prims.GTot	[ "sometrivial" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rvector", "LowStar.RVector.rv_elems_reg", "FStar.UInt32.__uint_to_t", "LowStar.Vector.size_of" ]	[]	false	false	false	false	true	let elems_reg #a #rst #rg h rv =	rv_elems_reg h rv 0ul (V.size_of rv)	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_Load128_byte16_buffer_index	val va_quick_Load128_byte16_buffer_index (h: va_operand_heaplet) (dst: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t))	val va_quick_Load128_byte16_buffer_index (h: va_operand_heaplet) (dst: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t))	let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 73, "end_line": 1418, "start_col": 0, "start_line": 1413 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: Vale.PPC64LE.Decls.va_operand_heaplet -> dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> base: Vale.PPC64LE.Decls.va_operand_reg_opr -> offset: Vale.PPC64LE.Decls.va_operand_reg_opr -> t: Vale.Arch.HeapTypes_s.taint -> b: Vale.PPC64LE.Memory.buffer128 -> index: Prims.int -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_Load128_byte16_buffer_index h dst base offset t)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_heaplet", "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_operand_reg_opr", "Vale.Arch.HeapTypes_s.taint", "Vale.PPC64LE.Memory.buffer128", "Prims.int", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_Load128_byte16_buffer_index", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_mod_vec_opr", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_Load128_byte16_buffer_index", "Vale.PPC64LE.InsVector.va_wpProof_Load128_byte16_buffer_index", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_Load128_byte16_buffer_index (h: va_operand_heaplet) (dst: va_operand_vec_opr) (base offset: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) =	(va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_Store128_byte16_buffer	val va_quick_Store128_byte16_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t))	val va_quick_Store128_byte16_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t))	let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 20, "end_line": 1472, "start_col": 0, "start_line": 1467 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: Vale.PPC64LE.Decls.va_operand_heaplet -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> base: Vale.PPC64LE.Decls.va_operand_reg_opr -> t: Vale.Arch.HeapTypes_s.taint -> b: Vale.PPC64LE.Memory.buffer128 -> index: Prims.int -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_Store128_byte16_buffer h src base t)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_heaplet", "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_operand_reg_opr", "Vale.Arch.HeapTypes_s.taint", "Vale.PPC64LE.Memory.buffer128", "Prims.int", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_Store128_byte16_buffer", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_Mod_mem", "Vale.PPC64LE.QuickCode.va_mod_heaplet", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_Store128_byte16_buffer", "Vale.PPC64LE.InsVector.va_wpProof_Store128_byte16_buffer", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_Store128_byte16_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) =	(va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_wp_Store128_byte16_buffer	val va_wp_Store128_byte16_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_Store128_byte16_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (())))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 51, "end_line": 1457, "start_col": 0, "start_line": 1444 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0)))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: Vale.PPC64LE.Decls.va_operand_heaplet -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> base: Vale.PPC64LE.Decls.va_operand_reg_opr -> t: Vale.Arch.HeapTypes_s.taint -> b: Vale.PPC64LE.Memory.buffer128 -> index: Prims.int -> va_s0: Vale.PPC64LE.Decls.va_state -> va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_heaplet", "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_operand_reg_opr", "Vale.Arch.HeapTypes_s.taint", "Vale.PPC64LE.Memory.buffer128", "Prims.int", "Vale.PPC64LE.Decls.va_state", "Prims.unit", "Prims.l_and", "Vale.PPC64LE.Decls.va_is_dst_heaplet", "Vale.PPC64LE.Decls.va_is_src_vec_opr", "Vale.PPC64LE.Decls.va_is_src_reg_opr", "Prims.b2t", "Vale.PPC64LE.Decls.va_get_ok", "Vale.PPC64LE.Decls.valid_dst_addr", "Vale.PPC64LE.Memory.vuint128", "Vale.PPC64LE.Decls.va_eval_heaplet", "Vale.PPC64LE.Memory.valid_layout_buffer", "Vale.PPC64LE.Decls.va_get_mem_layout", "Vale.PPC64LE.Memory.valid_taint_buf128", "Vale.Arch.HeapImpl.__proj__Mkvale_heap_layout__item__vl_taint", "Prims.eq2", "Vale.PPC64LE.Decls.va_eval_reg_opr", "Prims.op_Addition", "Vale.PPC64LE.Memory.buffer_addr", "Prims.op_Multiply", "Prims.l_Forall", "Vale.PPC64LE.Decls.va_value_heaplet", "Vale.PPC64LE.Memory.vale_heap", "Prims.l_imp", "Vale.PPC64LE.InsVector.buffer128_write", "Vale.Def.Types_s.reverse_bytes_quad32", "Vale.PPC64LE.Decls.va_eval_vec_opr", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Decls.va_upd_mem", "Vale.PPC64LE.Decls.va_upd_operand_heaplet" ]	[]	false	false	false	true	true	let va_wp_Store128_byte16_buffer (h: va_operand_heaplet) (src: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h: va_value_heaplet) (va_x_mem: vale_heap). let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (())))	false
LowStar.RVector.fst	LowStar.RVector.rs_loc_elems_includes	val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k))	val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k))	let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 54, "end_line": 232, "start_col": 0, "start_line": 230 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j)	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> rs: FStar.Seq.Base.seq a -> i: FStar.Integers.nat -> j: FStar.Integers.nat{i <= j && j <= FStar.Seq.Base.length rs} -> k: FStar.Integers.nat{i <= k && k < j} -> FStar.Pervasives.Lemma (ensures LowStar.Monotonic.Buffer.loc_includes (LowStar.RVector.rs_loc_elems rg rs i j) (LowStar.RVector.rs_loc_elem rg rs k))	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "FStar.Seq.Base.seq", "FStar.Integers.nat", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.Seq.Base.length", "FStar.Integers.op_Less", "Prims.op_Equality", "FStar.Integers.int_t", "FStar.Integers.op_Subtraction", "Prims.bool", "LowStar.RVector.rs_loc_elems_includes", "Prims.unit" ]	[ "recursion" ]	false	false	true	false	false	let rec rs_loc_elems_includes #a #rst rg rs i j k =	if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k	false
LowStar.RVector.fst	LowStar.RVector.rv_loc_elems_included	val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j)))	val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j)))	let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 77, "end_line": 273, "start_col": 0, "start_line": 272 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv))	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: FStar.Monotonic.HyperStack.mem -> rv: LowStar.RVector.rvector rg -> i: LowStar.Vector.uint32_t -> j: LowStar.Vector.uint32_t{i <= j && j <= LowStar.Vector.size_of rv} -> FStar.Pervasives.Lemma (requires LowStar.RVector.rv_elems_reg h rv i j) (ensures LowStar.Monotonic.Buffer.loc_includes (LowStar.RVector.loc_all_exts_from false (LowStar.Vector.frameOf rv)) (LowStar.RVector.rv_loc_elems h rv i j))	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rvector", "LowStar.Vector.uint32_t", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Unsigned", "FStar.Integers.W32", "LowStar.Vector.size_of", "LowStar.RVector.rs_loc_elems_included", "LowStar.Vector.as_seq", "LowStar.Vector.frameOf", "FStar.UInt32.v", "Prims.unit" ]	[]	true	false	true	false	false	let rv_loc_elems_included #a #rst #rg h rv i j =	rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j)	false
LowStar.RVector.fst	LowStar.RVector.rs_loc_elems	val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j)	val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j)	let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 44, "end_line": 175, "start_col": 0, "start_line": 172 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} ->	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> rs: FStar.Seq.Base.seq a -> i: FStar.Integers.nat -> j: FStar.Integers.nat{i <= j && j <= FStar.Seq.Base.length rs} -> Prims.GTot LowStar.Monotonic.Buffer.loc	Prims.GTot	[ "sometrivial", "" ]	[]	[ "LowStar.Regional.regional", "FStar.Seq.Base.seq", "FStar.Integers.nat", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.Seq.Base.length", "Prims.op_Equality", "LowStar.Monotonic.Buffer.loc_none", "Prims.bool", "LowStar.Monotonic.Buffer.loc_union", "LowStar.RVector.rs_loc_elems", "FStar.Integers.op_Subtraction", "LowStar.RVector.rs_loc_elem", "LowStar.Monotonic.Buffer.loc" ]	[ "recursion" ]	false	false	false	false	false	let rec rs_loc_elems #a #rst rg rs i j =	if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))	false
LowStar.RVector.fst	LowStar.RVector.rv_elems_inv_live_region	val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r))))	val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r))))	let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 67, "end_line": 157, "start_col": 0, "start_line": 156 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: FStar.Monotonic.HyperStack.mem -> rv: LowStar.RVector.rvector rg -> i: LowStar.Vector.uint32_t -> j: LowStar.Vector.uint32_t{i <= j && j <= LowStar.Vector.size_of rv} -> FStar.Pervasives.Lemma (requires LowStar.RVector.rv_elems_inv h rv i j) (ensures LowStar.Vector.forall_ h rv i j (fun r -> FStar.Monotonic.HyperStack.live_region h (Rgl?.region_of rg r)))	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rvector", "LowStar.Vector.uint32_t", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Unsigned", "FStar.Integers.W32", "LowStar.Vector.size_of", "LowStar.RVector.rs_elems_inv_live_region", "LowStar.Vector.as_seq", "FStar.UInt32.v", "Prims.unit" ]	[]	true	false	true	false	false	let rv_elems_inv_live_region #a #rst #rg h rv i j =	rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j)	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_wp_SHA256_sigma1	val va_wp_SHA256_sigma1 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_SHA256_sigma1 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (())))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 10, "end_line": 1594, "start_col": 0, "start_line": 1588 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> t: Vale.SHA.PPC64LE.SHA_helpers.counter -> block: Vale.SHA.PPC64LE.SHA_helpers.block_w -> va_s0: Vale.PPC64LE.Decls.va_state -> va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.SHA.PPC64LE.SHA_helpers.counter", "Vale.SHA.PPC64LE.SHA_helpers.block_w", "Vale.PPC64LE.Decls.va_state", "Prims.unit", "Prims.l_and", "Vale.PPC64LE.Decls.va_is_dst_vec_opr", "Vale.PPC64LE.Decls.va_is_src_vec_opr", "Prims.b2t", "Vale.PPC64LE.Decls.va_get_ok", "Prims.op_AmpAmp", "Prims.op_LessThanOrEqual", "Prims.op_LessThan", "Vale.SHA.PPC64LE.SHA_helpers.size_k_w_256", "Prims.eq2", "Vale.Def.Words_s.nat32", "Vale.Def.Words_s.__proj__Mkfour__item__hi3", "Vale.Def.Types_s.nat32", "Vale.PPC64LE.Decls.va_eval_vec_opr", "Vale.SHA.PPC64LE.SHA_helpers.ws_opaque", "Prims.op_Subtraction", "Prims.l_Forall", "Vale.PPC64LE.Decls.va_value_vec_opr", "Prims.l_imp", "Vale.SHA.PPC64LE.SHA_helpers.sigma_0_1_partial", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Decls.va_upd_operand_vec_opr" ]	[]	false	false	false	true	true	let va_wp_SHA256_sigma1 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst: va_value_vec_opr). let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (())))	false
LowStar.RVector.fst	LowStar.RVector.rs_loc_elems_rec_inverse	val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j)	val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j)	let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1)))	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 51, "end_line": 221, "start_col": 0, "start_line": 205 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j)))	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> rs: FStar.Seq.Base.seq a -> i: FStar.Integers.nat -> j: FStar.Integers.nat{i < j && j <= FStar.Seq.Base.length rs} -> FStar.Pervasives.Lemma (requires true) (ensures LowStar.RVector.rs_loc_elems rg rs i j == LowStar.Monotonic.Buffer.loc_union (LowStar.RVector.rs_loc_elem rg rs i) (LowStar.RVector.rs_loc_elems rg rs (i + 1) j)) (decreases j)	FStar.Pervasives.Lemma	[ "lemma", "" ]	[]	[ "LowStar.Regional.regional", "FStar.Seq.Base.seq", "FStar.Integers.nat", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.Integers.op_Less_Equals", "FStar.Seq.Base.length", "Prims.op_Equality", "FStar.Integers.int_t", "FStar.Integers.op_Plus", "Prims.bool", "LowStar.Monotonic.Buffer.loc_union_assoc", "LowStar.RVector.rs_loc_elem", "LowStar.RVector.rs_loc_elems", "FStar.Integers.op_Subtraction", "Prims.unit", "Prims._assert", "Prims.eq2", "LowStar.Monotonic.Buffer.loc", "LowStar.Monotonic.Buffer.loc_union", "LowStar.RVector.rs_loc_elems_rec_inverse" ]	[ "recursion" ]	false	false	true	false	false	let rec rs_loc_elems_rec_inverse #a #rst rg rs i j =	if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1)))	false
LowStar.RVector.fst	LowStar.RVector.rs_elems_inv_live_region	val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r))))	val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r))))	let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1))	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 50, "end_line": 147, "start_col": 0, "start_line": 144 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> h: FStar.Monotonic.HyperStack.mem -> rs: FStar.Seq.Base.seq a -> i: FStar.Integers.nat -> j: FStar.Integers.nat{i <= j && j <= FStar.Seq.Base.length rs} -> FStar.Pervasives.Lemma (requires LowStar.RVector.rs_elems_inv rg h rs i j) (ensures LowStar.Vector.forall_seq rs i j (fun r -> FStar.Monotonic.HyperStack.live_region h (Rgl?.region_of rg r)))	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "FStar.Seq.Base.seq", "FStar.Integers.nat", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.Seq.Base.length", "Prims.op_Equality", "Prims.bool", "LowStar.RVector.rs_elems_inv_live_region", "FStar.Integers.op_Subtraction", "Prims.unit", "LowStar.Regional.__proj__Rgl__item__r_inv_reg", "FStar.Seq.Base.index" ]	[ "recursion" ]	false	false	true	false	false	let rec rs_elems_inv_live_region #a #rst rg h rs i j =	if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_Load128_byte16_buffer	val va_quick_Load128_byte16_buffer (h: va_operand_heaplet) (dst: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t))	val va_quick_Load128_byte16_buffer (h: va_operand_heaplet) (dst: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t))	let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 15, "end_line": 1359, "start_col": 0, "start_line": 1354 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: Vale.PPC64LE.Decls.va_operand_heaplet -> dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> base: Vale.PPC64LE.Decls.va_operand_reg_opr -> t: Vale.Arch.HeapTypes_s.taint -> b: Vale.PPC64LE.Memory.buffer128 -> index: Prims.int -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_Load128_byte16_buffer h dst base t)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_heaplet", "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.Decls.va_operand_reg_opr", "Vale.Arch.HeapTypes_s.taint", "Vale.PPC64LE.Memory.buffer128", "Prims.int", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_Load128_byte16_buffer", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_mod_vec_opr", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_Load128_byte16_buffer", "Vale.PPC64LE.InsVector.va_wpProof_Load128_byte16_buffer", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_Load128_byte16_buffer (h: va_operand_heaplet) (dst: va_operand_vec_opr) (base: va_operand_reg_opr) (t: taint) (b: buffer128) (index: int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) =	(va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index))	false
LowStar.RVector.fst	LowStar.RVector.rs_loc_elems_included	val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j)	val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j)	let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1))	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 50, "end_line": 263, "start_col": 0, "start_line": 260 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j)))	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> rs: FStar.Seq.Base.seq a -> prid: FStar.Monotonic.HyperHeap.rid -> i: FStar.Integers.nat -> j: FStar.Integers.nat{i <= j && j <= FStar.Seq.Base.length rs} -> FStar.Pervasives.Lemma (requires LowStar.RVector.rs_elems_reg rg rs prid i j) (ensures LowStar.Monotonic.Buffer.loc_includes (LowStar.RVector.loc_all_exts_from false prid) (LowStar.RVector.rs_loc_elems rg rs i j)) (decreases j)	FStar.Pervasives.Lemma	[ "lemma", "" ]	[]	[ "LowStar.Regional.regional", "FStar.Seq.Base.seq", "FStar.Monotonic.HyperHeap.rid", "FStar.Integers.nat", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.Seq.Base.length", "Prims.op_Equality", "Prims.bool", "LowStar.RVector.rs_loc_elems_included", "FStar.Integers.op_Subtraction", "Prims.unit", "LowStar.RVector.rs_loc_elem_included" ]	[ "recursion" ]	false	false	true	false	false	let rec rs_loc_elems_included #a #rst rg rs prid i j =	if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1))	false
LowStar.RVector.fst	LowStar.RVector.rv_loc_elems_parent_disj	val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv))))	val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv))))	let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 80, "end_line": 368, "start_col": 0, "start_line": 367 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j)	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: FStar.Monotonic.HyperStack.mem -> rv: LowStar.RVector.rvector rg -> i: LowStar.Vector.uint32_t -> j: LowStar.Vector.uint32_t{i <= j && j <= LowStar.Vector.size_of rv} -> FStar.Pervasives.Lemma (requires LowStar.RVector.rv_elems_reg h rv i j) (ensures LowStar.Monotonic.Buffer.loc_disjoint (LowStar.RVector.rv_loc_elems h rv i j) (LowStar.Monotonic.Buffer.loc_region_only false (LowStar.Vector.frameOf rv)))	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rvector", "LowStar.Vector.uint32_t", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Unsigned", "FStar.Integers.W32", "LowStar.Vector.size_of", "LowStar.RVector.rs_loc_elems_parent_disj", "LowStar.Vector.as_seq", "LowStar.Vector.frameOf", "FStar.UInt32.v", "Prims.unit" ]	[]	true	false	true	false	false	let rv_loc_elems_parent_disj #a #rst #rg h rv i j =	rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j)	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_wp_SHA256_Sigma1	val va_wp_SHA256_Sigma1 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (hash_orig: hash256) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_SHA256_Sigma1 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (hash_orig: hash256) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (())))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 25, "end_line": 1682, "start_col": 0, "start_line": 1673 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig)) //-- //-- SHA256_Sigma1 val va_code_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> t: Vale.SHA.PPC64LE.SHA_helpers.counter -> block: Vale.SHA.PPC64LE.SHA_helpers.block_w -> hash_orig: Vale.SHA.PPC64LE.SHA_helpers.hash256 -> va_s0: Vale.PPC64LE.Decls.va_state -> va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.SHA.PPC64LE.SHA_helpers.counter", "Vale.SHA.PPC64LE.SHA_helpers.block_w", "Vale.SHA.PPC64LE.SHA_helpers.hash256", "Vale.PPC64LE.Decls.va_state", "Prims.unit", "Prims.l_and", "Vale.PPC64LE.Decls.va_is_dst_vec_opr", "Vale.PPC64LE.Decls.va_is_src_vec_opr", "Prims.b2t", "Vale.PPC64LE.Decls.va_get_ok", "Prims.op_LessThan", "Vale.SHA.PPC64LE.SHA_helpers.size_k_w_256", "Prims.eq2", "Vale.Def.Words_s.nat32", "Vale.Def.Words_s.__proj__Mkfour__item__hi3", "Vale.Def.Types_s.nat32", "Vale.PPC64LE.Decls.va_eval_vec_opr", "Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32", "FStar.Seq.Base.index", "Vale.SHA.PPC64LE.SHA_helpers.word", "Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale", "Prims.l_Forall", "Vale.PPC64LE.Decls.va_value_vec_opr", "Prims.l_imp", "Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Decls.va_upd_operand_vec_opr" ]	[]	false	false	false	true	true	let va_wp_SHA256_Sigma1 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (hash_orig: hash256) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst: va_value_vec_opr). let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (())))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_wp_SHA256_sigma0	val va_wp_SHA256_sigma0 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_SHA256_sigma0 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (())))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 10, "end_line": 1557, "start_col": 0, "start_line": 1551 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> t: Vale.SHA.PPC64LE.SHA_helpers.counter -> block: Vale.SHA.PPC64LE.SHA_helpers.block_w -> va_s0: Vale.PPC64LE.Decls.va_state -> va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.SHA.PPC64LE.SHA_helpers.counter", "Vale.SHA.PPC64LE.SHA_helpers.block_w", "Vale.PPC64LE.Decls.va_state", "Prims.unit", "Prims.l_and", "Vale.PPC64LE.Decls.va_is_dst_vec_opr", "Vale.PPC64LE.Decls.va_is_src_vec_opr", "Prims.b2t", "Vale.PPC64LE.Decls.va_get_ok", "Prims.op_AmpAmp", "Prims.op_LessThanOrEqual", "Prims.op_LessThan", "Vale.SHA.PPC64LE.SHA_helpers.size_k_w_256", "Prims.eq2", "Vale.Def.Words_s.nat32", "Vale.Def.Words_s.__proj__Mkfour__item__hi3", "Vale.Def.Types_s.nat32", "Vale.PPC64LE.Decls.va_eval_vec_opr", "Vale.SHA.PPC64LE.SHA_helpers.ws_opaque", "Prims.op_Subtraction", "Prims.l_Forall", "Vale.PPC64LE.Decls.va_value_vec_opr", "Prims.l_imp", "Vale.SHA.PPC64LE.SHA_helpers.sigma_0_0_partial", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Decls.va_upd_operand_vec_opr" ]	[]	false	false	false	true	true	let va_wp_SHA256_sigma0 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst: va_value_vec_opr). let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (())))	false
LowStar.RVector.fst	LowStar.RVector.rs_loc_elems_parent_disj	val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j)	val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j)	let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 52, "end_line": 358, "start_col": 0, "start_line": 356 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid)))	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> rs: FStar.Seq.Base.seq a -> prid: FStar.Monotonic.HyperHeap.rid -> i: FStar.Integers.nat -> j: FStar.Integers.nat{i <= j && j <= FStar.Seq.Base.length rs} -> FStar.Pervasives.Lemma (requires LowStar.RVector.rs_elems_reg rg rs prid i j) (ensures LowStar.Monotonic.Buffer.loc_disjoint (LowStar.RVector.rs_loc_elems rg rs i j) (LowStar.Monotonic.Buffer.loc_region_only false prid)) (decreases j)	FStar.Pervasives.Lemma	[ "lemma", "" ]	[]	[ "LowStar.Regional.regional", "FStar.Seq.Base.seq", "FStar.Monotonic.HyperHeap.rid", "FStar.Integers.nat", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.Seq.Base.length", "Prims.op_Equality", "Prims.bool", "LowStar.RVector.rs_loc_elems_parent_disj", "FStar.Integers.op_Subtraction", "Prims.unit" ]	[ "recursion" ]	false	false	true	false	false	let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j =	if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1)	false
LowStar.RVector.fst	LowStar.RVector.rs_loc_elems_elem_disj	val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2)	val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2)	let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 59, "end_line": 314, "start_col": 0, "start_line": 311 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l)))	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> rs: FStar.Seq.Base.seq a -> prid: FStar.Monotonic.HyperHeap.rid -> i: FStar.Integers.nat -> j: FStar.Integers.nat{i <= j && j <= FStar.Seq.Base.length rs} -> k1: FStar.Integers.nat{i <= k1} -> k2: FStar.Integers.nat{k1 <= k2 && k2 <= j} -> l: FStar.Integers.nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> FStar.Pervasives.Lemma (requires LowStar.RVector.rs_elems_reg rg rs prid i j) (ensures LowStar.Monotonic.Buffer.loc_disjoint (LowStar.RVector.rs_loc_elems rg rs k1 k2) (LowStar.RVector.rs_loc_elem rg rs l)) (decreases k2)	FStar.Pervasives.Lemma	[ "lemma", "" ]	[]	[ "LowStar.Regional.regional", "FStar.Seq.Base.seq", "FStar.Monotonic.HyperHeap.rid", "FStar.Integers.nat", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.Seq.Base.length", "FStar.Integers.op_Less", "Prims.op_BarBar", "Prims.op_Equality", "Prims.l_or", "Prims.bool", "LowStar.RVector.rs_loc_elems_elem_disj", "FStar.Integers.op_Subtraction", "Prims.unit", "LowStar.RVector.rs_loc_elem_disj" ]	[ "recursion" ]	false	false	true	false	false	let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l =	if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l)	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_SHA256_sigma1	val va_quick_SHA256_sigma1 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src))	val va_quick_SHA256_sigma1 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src))	let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 54, "end_line": 1606, "start_col": 0, "start_line": 1603 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> t: Vale.SHA.PPC64LE.SHA_helpers.counter -> block: Vale.SHA.PPC64LE.SHA_helpers.block_w -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_SHA256_sigma1 dst src)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.SHA.PPC64LE.SHA_helpers.counter", "Vale.SHA.PPC64LE.SHA_helpers.block_w", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_SHA256_sigma1", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_mod_vec_opr", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_SHA256_sigma1", "Vale.PPC64LE.InsVector.va_wpProof_SHA256_sigma1", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_SHA256_sigma1 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) =	(va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block))	false
LowStar.RVector.fst	LowStar.RVector.rs_loc_elems_each_disj	val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j)	val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j)	let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 50, "end_line": 381, "start_col": 0, "start_line": 379 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid)))	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> rs: FStar.Seq.Base.seq a -> drid: FStar.Monotonic.HyperHeap.rid -> i: FStar.Integers.nat -> j: FStar.Integers.nat{i <= j && j <= FStar.Seq.Base.length rs} -> FStar.Pervasives.Lemma (requires LowStar.Vector.forall_seq rs i j (fun r -> FStar.Monotonic.HyperHeap.disjoint (Rgl?.region_of rg r) drid)) (ensures LowStar.Monotonic.Buffer.loc_disjoint (LowStar.RVector.rs_loc_elems rg rs i j) (LowStar.Monotonic.Buffer.loc_all_regions_from false drid)) (decreases j)	FStar.Pervasives.Lemma	[ "lemma", "" ]	[]	[ "LowStar.Regional.regional", "FStar.Seq.Base.seq", "FStar.Monotonic.HyperHeap.rid", "FStar.Integers.nat", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.Seq.Base.length", "Prims.op_Equality", "Prims.bool", "LowStar.RVector.rs_loc_elems_each_disj", "FStar.Integers.op_Subtraction", "Prims.unit" ]	[ "recursion" ]	false	false	true	false	false	let rec rs_loc_elems_each_disj #a #rst rg rs drid i j =	if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1)	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_SHA256_sigma0	val va_quick_SHA256_sigma0 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src))	val va_quick_SHA256_sigma0 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src))	let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 54, "end_line": 1569, "start_col": 0, "start_line": 1566 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> t: Vale.SHA.PPC64LE.SHA_helpers.counter -> block: Vale.SHA.PPC64LE.SHA_helpers.block_w -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_SHA256_sigma0 dst src)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.SHA.PPC64LE.SHA_helpers.counter", "Vale.SHA.PPC64LE.SHA_helpers.block_w", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_SHA256_sigma0", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_mod_vec_opr", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_SHA256_sigma0", "Vale.PPC64LE.InsVector.va_wpProof_SHA256_sigma0", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_SHA256_sigma0 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) =	(va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_wp_SHA256_Sigma0	val va_wp_SHA256_Sigma0 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (hash_orig: hash256) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_SHA256_Sigma0 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (hash_orig: hash256) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (())))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 25, "end_line": 1638, "start_col": 0, "start_line": 1629 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> t: Vale.SHA.PPC64LE.SHA_helpers.counter -> block: Vale.SHA.PPC64LE.SHA_helpers.block_w -> hash_orig: Vale.SHA.PPC64LE.SHA_helpers.hash256 -> va_s0: Vale.PPC64LE.Decls.va_state -> va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.SHA.PPC64LE.SHA_helpers.counter", "Vale.SHA.PPC64LE.SHA_helpers.block_w", "Vale.SHA.PPC64LE.SHA_helpers.hash256", "Vale.PPC64LE.Decls.va_state", "Prims.unit", "Prims.l_and", "Vale.PPC64LE.Decls.va_is_dst_vec_opr", "Vale.PPC64LE.Decls.va_is_src_vec_opr", "Prims.b2t", "Vale.PPC64LE.Decls.va_get_ok", "Prims.op_LessThan", "Vale.SHA.PPC64LE.SHA_helpers.size_k_w_256", "Prims.eq2", "Vale.Def.Words_s.nat32", "Vale.Def.Words_s.__proj__Mkfour__item__hi3", "Vale.Def.Types_s.nat32", "Vale.PPC64LE.Decls.va_eval_vec_opr", "Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32", "FStar.Seq.Base.index", "Vale.SHA.PPC64LE.SHA_helpers.word", "Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale", "Prims.l_Forall", "Vale.PPC64LE.Decls.va_value_vec_opr", "Prims.l_imp", "Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Decls.va_upd_operand_vec_opr" ]	[]	false	false	false	true	true	let va_wp_SHA256_Sigma0 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (hash_orig: hash256) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst: va_value_vec_opr). let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (())))	false
LowStar.RVector.fst	LowStar.RVector.rs_loc_elems_disj	val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2)	val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2)	let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 58, "end_line": 331, "start_col": 0, "start_line": 328 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2)))	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> rs: FStar.Seq.Base.seq a -> prid: FStar.Monotonic.HyperHeap.rid -> i: FStar.Integers.nat -> j: FStar.Integers.nat{i <= j && j <= FStar.Seq.Base.length rs} -> k1: FStar.Integers.nat{i <= k1} -> k2: FStar.Integers.nat{k1 <= k2 && k2 <= j} -> l1: FStar.Integers.nat{i <= l1} -> l2: FStar.Integers.nat{l1 <= l2 && l2 <= j} -> FStar.Pervasives.Lemma (requires LowStar.RVector.rs_elems_reg rg rs prid i j /\ k2 <= l1 \|\| l2 <= k1) (ensures LowStar.Monotonic.Buffer.loc_disjoint (LowStar.RVector.rs_loc_elems rg rs k1 k2) (LowStar.RVector.rs_loc_elems rg rs l1 l2)) (decreases k2)	FStar.Pervasives.Lemma	[ "lemma", "" ]	[]	[ "LowStar.Regional.regional", "FStar.Seq.Base.seq", "FStar.Monotonic.HyperHeap.rid", "FStar.Integers.nat", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.Seq.Base.length", "Prims.op_Equality", "Prims.l_or", "Prims.bool", "LowStar.RVector.rs_loc_elems_disj", "FStar.Integers.op_Subtraction", "Prims.unit", "LowStar.RVector.rs_loc_elems_elem_disj" ]	[ "recursion" ]	false	false	true	false	false	let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 =	if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2)	false
Hacl.Impl.P256.Verify.fst	Hacl.Impl.P256.Verify.ecdsa_verification_cmpr	val ecdsa_verification_cmpr: r:felem -> pk:point -> u1:felem -> u2:felem -> Stack bool (requires fun h -> live h r /\ live h pk /\ live h u1 /\ live h u2 /\ disjoint r u1 /\ disjoint r u2 /\ disjoint r pk /\ disjoint pk u1 /\ disjoint pk u2 /\ point_inv h pk /\ as_nat h u1 < S.order /\ as_nat h u2 < S.order /\ 0 < as_nat h r /\ as_nat h r < S.order) (ensures fun h0 b h1 -> modifies0 h0 h1 /\ (let _X, _Y, _Z = S.point_mul_double_g (as_nat h0 u1) (as_nat h0 u2) (from_mont_point (as_point_nat h0 pk)) in b <==> (if S.is_point_at_inf (_X, _Y, _Z) then false else S.fmul _X (S.finv _Z) % S.order = as_nat h0 r)))	val ecdsa_verification_cmpr: r:felem -> pk:point -> u1:felem -> u2:felem -> Stack bool (requires fun h -> live h r /\ live h pk /\ live h u1 /\ live h u2 /\ disjoint r u1 /\ disjoint r u2 /\ disjoint r pk /\ disjoint pk u1 /\ disjoint pk u2 /\ point_inv h pk /\ as_nat h u1 < S.order /\ as_nat h u2 < S.order /\ 0 < as_nat h r /\ as_nat h r < S.order) (ensures fun h0 b h1 -> modifies0 h0 h1 /\ (let _X, _Y, _Z = S.point_mul_double_g (as_nat h0 u1) (as_nat h0 u2) (from_mont_point (as_point_nat h0 pk)) in b <==> (if S.is_point_at_inf (_X, _Y, _Z) then false else S.fmul _X (S.finv _Z) % S.order = as_nat h0 r)))	let ecdsa_verification_cmpr r pk u1 u2 = push_frame (); let res = create_point () in let h0 = ST.get () in point_mul_double_g res u1 u2 pk; let h1 = ST.get () in assert (S.to_aff_point (from_mont_point (as_point_nat h1 res)) == S.to_aff_point (S.point_mul_double_g (as_nat h0 u1) (as_nat h0 u2) (from_mont_point (as_point_nat h0 pk)))); SL.lemma_aff_is_point_at_inf (from_mont_point (as_point_nat h1 res)); SL.lemma_aff_is_point_at_inf (S.point_mul_double_g (as_nat h0 u1) (as_nat h0 u2) (from_mont_point (as_point_nat h0 pk))); let b = if is_point_at_inf_vartime res then false else ecdsa_verify_finv res r in pop_frame (); b	{ "file_name": "code/ecdsap256/Hacl.Impl.P256.Verify.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 3, "end_line": 132, "start_col": 0, "start_line": 114 }	module Hacl.Impl.P256.Verify open FStar.Mul open FStar.HyperStack.All open FStar.HyperStack module ST = FStar.HyperStack.ST open Lib.IntTypes open Lib.Buffer open Hacl.Impl.P256.Bignum open Hacl.Impl.P256.Point open Hacl.Impl.P256.Scalar open Hacl.Impl.P256.PointMul module BSeq = Lib.ByteSequence module S = Spec.P256 module SL = Spec.P256.Lemmas module SM = Hacl.Spec.P256.Montgomery module QI = Hacl.Impl.P256.Qinv #set-options "--z3rlimit 50 --fuel 0 --ifuel 0" inline_for_extraction noextract let lbytes len = lbuffer uint8 len val qmul_mont: sinv:felem -> b:felem -> res:felem -> Stack unit (requires fun h -> live h sinv /\ live h b /\ live h res /\ disjoint sinv res /\ disjoint b res /\ as_nat h sinv < S.order /\ as_nat h b < S.order) (ensures fun h0 _ h1 -> modifies (loc res) h0 h1 /\ as_nat h1 res < S.order /\ as_nat h1 res = (as_nat h0 sinv * SM.from_qmont (as_nat h0 b) * SM.qmont_R_inv) % S.order) [@CInline] let qmul_mont sinv b res = let h0 = ST.get () in push_frame (); let tmp = create_felem () in from_qmont tmp b; let h1 = ST.get () in assert (as_nat h1 tmp == SM.from_qmont (as_nat h0 b)); qmul res sinv tmp; let h2 = ST.get () in assert (as_nat h2 res = (as_nat h1 sinv * as_nat h1 tmp * SM.qmont_R_inv) % S.order); pop_frame () inline_for_extraction noextract val ecdsa_verification_get_u12: u1:felem -> u2:felem -> r:felem -> s:felem -> z:felem -> Stack unit (requires fun h -> live h r /\ live h s /\ live h z /\ live h u1 /\ live h u2 /\ disjoint u1 u2 /\ disjoint u1 z /\ disjoint u1 r /\ disjoint u1 s /\ disjoint u2 z /\ disjoint u2 r /\ disjoint u2 s /\ as_nat h s < S.order /\ as_nat h z < S.order /\ as_nat h r < S.order) (ensures fun h0 _ h1 -> modifies (loc u1 \|+\| loc u2) h0 h1 /\ (let sinv = S.qinv (as_nat h0 s) in as_nat h1 u1 == sinv * as_nat h0 z % S.order /\ as_nat h1 u2 == sinv * as_nat h0 r % S.order)) let ecdsa_verification_get_u12 u1 u2 r s z = push_frame (); let h0 = ST.get () in let sinv = create_felem () in QI.qinv sinv s; let h1 = ST.get () in assert (qmont_as_nat h1 sinv == S.qinv (qmont_as_nat h0 s)); //assert (as_nat h2 sinv * SM.qmont_R_inv % S.order == //S.qinv (as_nat h1 sinv * SM.qmont_R_inv % S.order)); SM.qmont_inv_mul_lemma (as_nat h0 s) (as_nat h1 sinv) (as_nat h0 z); SM.qmont_inv_mul_lemma (as_nat h0 s) (as_nat h1 sinv) (as_nat h0 r); qmul_mont sinv z u1; qmul_mont sinv r u2; pop_frame () inline_for_extraction noextract val ecdsa_verify_finv: p:point -> r:felem -> Stack bool (requires fun h -> live h p /\ live h r /\ disjoint p r /\ point_inv h p /\ 0 < as_nat h r /\ as_nat h r < S.order) //not (S.is_point_at_inf (from_mont_point (as_point_nat h p)))) (ensures fun h0 b h1 -> modifies0 h0 h1 /\ (let (_X, _Y, _Z) = from_mont_point (as_point_nat h0 p) in b <==> (S.fmul _X (S.finv _Z) % S.order = as_nat h0 r))) let ecdsa_verify_finv p r_q = push_frame (); let x = create_felem () in to_aff_point_x x p; qmod_short x x; let res = bn_is_eq_vartime4 x r_q in pop_frame (); res inline_for_extraction noextract val ecdsa_verification_cmpr: r:felem -> pk:point -> u1:felem -> u2:felem -> Stack bool (requires fun h -> live h r /\ live h pk /\ live h u1 /\ live h u2 /\ disjoint r u1 /\ disjoint r u2 /\ disjoint r pk /\ disjoint pk u1 /\ disjoint pk u2 /\ point_inv h pk /\ as_nat h u1 < S.order /\ as_nat h u2 < S.order /\ 0 < as_nat h r /\ as_nat h r < S.order) (ensures fun h0 b h1 -> modifies0 h0 h1 /\ (let _X, _Y, _Z = S.point_mul_double_g (as_nat h0 u1) (as_nat h0 u2) (from_mont_point (as_point_nat h0 pk)) in b <==> (if S.is_point_at_inf (_X, _Y, _Z) then false else S.fmul _X (S.finv _Z) % S.order = as_nat h0 r)))	{ "checked_file": "/", "dependencies": [ "Spec.P256.Lemmas.fsti.checked", "Spec.P256.fst.checked", "prims.fst.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.P256.Montgomery.fsti.checked", "Hacl.Impl.P256.Scalar.fsti.checked", "Hacl.Impl.P256.Qinv.fsti.checked", "Hacl.Impl.P256.PointMul.fsti.checked", "Hacl.Impl.P256.Point.fsti.checked", "Hacl.Impl.P256.Bignum.fsti.checked", "Hacl.Bignum.Base.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.P256.Verify.fst" }	[ { "abbrev": true, "full_module": "Hacl.Impl.P256.Qinv", "short_module": "QI" }, { "abbrev": true, "full_module": "Hacl.Spec.P256.Montgomery", "short_module": "SM" }, { "abbrev": true, "full_module": "Spec.P256.Lemmas", "short_module": "SL" }, { "abbrev": true, "full_module": "Spec.P256", "short_module": "S" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": false, "full_module": "Hacl.Impl.P256.PointMul", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.P256.Scalar", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.P256.Point", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.P256.Bignum", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.P256", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.P256", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 50, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	r: Hacl.Impl.P256.Bignum.felem -> pk: Hacl.Impl.P256.Point.point -> u1: Hacl.Impl.P256.Bignum.felem -> u2: Hacl.Impl.P256.Bignum.felem -> FStar.HyperStack.ST.Stack Prims.bool	FStar.HyperStack.ST.Stack	[]	[]	[ "Hacl.Impl.P256.Bignum.felem", "Hacl.Impl.P256.Point.point", "Prims.bool", "Prims.unit", "FStar.HyperStack.ST.pop_frame", "Hacl.Impl.P256.Verify.ecdsa_verify_finv", "Hacl.Impl.P256.Point.is_point_at_inf_vartime", "Spec.P256.Lemmas.lemma_aff_is_point_at_inf", "Spec.P256.point_mul_double_g", "Hacl.Impl.P256.Bignum.as_nat", "Hacl.Impl.P256.Point.from_mont_point", "Hacl.Impl.P256.Point.as_point_nat", "Prims._assert", "Prims.eq2", "Spec.P256.PointOps.aff_point", "Spec.P256.PointOps.to_aff_point", "FStar.Monotonic.HyperStack.mem", "FStar.HyperStack.ST.get", "Hacl.Impl.P256.PointMul.point_mul_double_g", "Hacl.Impl.P256.Point.create_point", "FStar.HyperStack.ST.push_frame" ]	[]	false	true	false	false	false	let ecdsa_verification_cmpr r pk u1 u2 =	push_frame (); let res = create_point () in let h0 = ST.get () in point_mul_double_g res u1 u2 pk; let h1 = ST.get () in assert (S.to_aff_point (from_mont_point (as_point_nat h1 res)) == S.to_aff_point (S.point_mul_double_g (as_nat h0 u1) (as_nat h0 u2) (from_mont_point (as_point_nat h0 pk)))); SL.lemma_aff_is_point_at_inf (from_mont_point (as_point_nat h1 res)); SL.lemma_aff_is_point_at_inf (S.point_mul_double_g (as_nat h0 u1) (as_nat h0 u2) (from_mont_point (as_point_nat h0 pk))); let b = if is_point_at_inf_vartime res then false else ecdsa_verify_finv res r in pop_frame (); b	false
LowStar.RVector.fst	LowStar.RVector.as_seq	val as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v (V.size_of rv)})	val as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v (V.size_of rv)})	let as_seq #a #rst #rg h rv = as_seq_sub h rv 0ul (V.size_of rv)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 36, "end_line": 531, "start_col": 0, "start_line": 530 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv)) let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /// Representation val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j) let rec as_seq_seq #a #rst rg h rs i j = if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1))) val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i}) (decreases (U32.v j)) let as_seq_sub #a #rst #rg h rv i j = as_seq_seq rg h (V.as_seq h rv) (U32.v i) (U32.v j) val as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} ->	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: FStar.Monotonic.HyperStack.mem -> rv: LowStar.RVector.rvector rg {LowStar.RVector.rv_inv h rv} -> Prims.GTot (s: FStar.Seq.Base.seq (Rgl?.repr rg) {FStar.Seq.Base.length s = FStar.UInt32.v (LowStar.Vector.size_of rv)})	Prims.GTot	[ "sometrivial" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rvector", "LowStar.RVector.rv_inv", "LowStar.RVector.as_seq_sub", "FStar.UInt32.__uint_to_t", "LowStar.Vector.size_of", "FStar.Seq.Base.seq", "LowStar.Regional.__proj__Rgl__item__repr", "Prims.b2t", "Prims.op_Equality", "Prims.int", "Prims.l_or", "Prims.op_GreaterThanOrEqual", "FStar.UInt.size", "FStar.UInt32.n", "FStar.Seq.Base.length", "FStar.UInt32.v" ]	[]	false	false	false	false	false	let as_seq #a #rst #rg h rv =	as_seq_sub h rv 0ul (V.size_of rv)	false
LowStar.RVector.fst	LowStar.RVector.rs_elems_inv_preserved	val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j)	val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j)	let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 50, "end_line": 427, "start_col": 0, "start_line": 424 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j))	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> rs: FStar.Seq.Base.seq a -> i: FStar.Integers.nat -> j: FStar.Integers.nat{i <= j && j <= FStar.Seq.Base.length rs} -> p: LowStar.Monotonic.Buffer.loc -> h0: FStar.Monotonic.HyperStack.mem -> h1: FStar.Monotonic.HyperStack.mem -> FStar.Pervasives.Lemma (requires LowStar.RVector.rs_elems_inv rg h0 rs i j /\ LowStar.Monotonic.Buffer.loc_disjoint p (LowStar.RVector.rs_loc_elems rg rs i j) /\ LowStar.Monotonic.Buffer.modifies p h0 h1) (ensures LowStar.RVector.rs_elems_inv rg h1 rs i j) (decreases j)	FStar.Pervasives.Lemma	[ "lemma", "" ]	[]	[ "LowStar.Regional.regional", "FStar.Seq.Base.seq", "FStar.Integers.nat", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.Seq.Base.length", "LowStar.Monotonic.Buffer.loc", "FStar.Monotonic.HyperStack.mem", "Prims.op_Equality", "Prims.bool", "LowStar.Regional.__proj__Rgl__item__r_sep", "FStar.Seq.Base.index", "FStar.Integers.op_Subtraction", "Prims.unit", "LowStar.RVector.rs_elems_inv_preserved" ]	[ "recursion" ]	false	false	true	false	false	let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 =	if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1)	false
LowStar.RVector.fst	LowStar.RVector.rv_elems_inv_preserved	val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j))	val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j))	let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 72, "end_line": 440, "start_col": 0, "start_line": 439 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1))	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rv: LowStar.RVector.rvector rg -> i: LowStar.Vector.uint32_t -> j: LowStar.Vector.uint32_t{i <= j && j <= LowStar.Vector.size_of rv} -> p: LowStar.Monotonic.Buffer.loc -> h0: FStar.Monotonic.HyperStack.mem -> h1: FStar.Monotonic.HyperStack.mem -> FStar.Pervasives.Lemma (requires LowStar.Vector.live h0 rv /\ LowStar.RVector.rv_elems_inv h0 rv i j /\ LowStar.Monotonic.Buffer.loc_disjoint p (LowStar.Vector.loc_vector rv) /\ LowStar.Monotonic.Buffer.loc_disjoint p (LowStar.RVector.rv_loc_elems h0 rv i j) /\ LowStar.Monotonic.Buffer.modifies p h0 h1) (ensures LowStar.RVector.rv_elems_inv h1 rv i j)	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "LowStar.RVector.rvector", "LowStar.Vector.uint32_t", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Unsigned", "FStar.Integers.W32", "LowStar.Vector.size_of", "LowStar.Monotonic.Buffer.loc", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rs_elems_inv_preserved", "LowStar.Vector.as_seq", "FStar.UInt32.v", "Prims.unit" ]	[]	true	false	true	false	false	let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 =	rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1	false
LowStar.RVector.fst	LowStar.RVector.rv_loc_elems_each_disj	val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid)))	val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid)))	let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 68, "end_line": 393, "start_col": 0, "start_line": 392 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j)	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: FStar.Monotonic.HyperStack.mem -> rv: LowStar.RVector.rvector rg -> i: LowStar.Vector.uint32_t -> j: LowStar.Vector.uint32_t{i <= j && j <= LowStar.Vector.size_of rv} -> drid: FStar.Monotonic.HyperHeap.rid -> FStar.Pervasives.Lemma (requires LowStar.Vector.forall_ h rv i j (fun r -> FStar.Monotonic.HyperHeap.disjoint (Rgl?.region_of rg r) drid)) (ensures LowStar.Monotonic.Buffer.loc_disjoint (LowStar.RVector.rv_loc_elems h rv i j) (LowStar.Monotonic.Buffer.loc_all_regions_from false drid))	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rvector", "LowStar.Vector.uint32_t", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Unsigned", "FStar.Integers.W32", "LowStar.Vector.size_of", "FStar.Monotonic.HyperHeap.rid", "LowStar.RVector.rs_loc_elems_each_disj", "LowStar.Vector.as_seq", "FStar.UInt32.v", "Prims.unit" ]	[]	true	false	true	false	false	let rv_loc_elems_each_disj #a #rst #rg h rv i j drid =	rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j)	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_SHA256_Sigma0	val va_quick_SHA256_Sigma0 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (hash_orig: hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src))	val va_quick_SHA256_Sigma0 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (hash_orig: hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src))	let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 74, "end_line": 1650, "start_col": 0, "start_line": 1647 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> t: Vale.SHA.PPC64LE.SHA_helpers.counter -> block: Vale.SHA.PPC64LE.SHA_helpers.block_w -> hash_orig: Vale.SHA.PPC64LE.SHA_helpers.hash256 -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_SHA256_Sigma0 dst src)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.SHA.PPC64LE.SHA_helpers.counter", "Vale.SHA.PPC64LE.SHA_helpers.block_w", "Vale.SHA.PPC64LE.SHA_helpers.hash256", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_SHA256_Sigma0", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_mod_vec_opr", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_SHA256_Sigma0", "Vale.PPC64LE.InsVector.va_wpProof_SHA256_Sigma0", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_SHA256_Sigma0 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (hash_orig: hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) =	(va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_Vcipher	val va_quick_Vcipher (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipher dst src1 src2))	val va_quick_Vcipher (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipher dst src1 src2))	let va_quick_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipher dst src1 src2)) = (va_QProc (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipher dst src1 src2) (va_wpProof_Vcipher dst src1 src2))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 39, "end_line": 1832, "start_col": 0, "start_line": 1829 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig)) //-- //-- SHA256_Sigma1 val va_code_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma1 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src)) = (va_QProc (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma1 dst src t block hash_orig) (va_wpProof_SHA256_Sigma1 dst src t block hash_orig)) //-- //-- Vsbox val va_code_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsbox : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsbox dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsbox dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsbox dst src)) = (va_QProc (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) (va_wp_Vsbox dst src) (va_wpProof_Vsbox dst src)) //-- //-- RotWord val va_code_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_RotWord : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_RotWord dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_RotWord dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_RotWord dst src1 src2)) = (va_QProc (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_RotWord dst src1 src2) (va_wpProof_RotWord dst src1 src2)) //-- //-- Vcipher val va_code_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipher : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipher dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcipher dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src1: Vale.PPC64LE.Decls.va_operand_vec_opr -> src2: Vale.PPC64LE.Decls.va_operand_vec_opr -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_Vcipher dst src1 src2)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_Vcipher", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_mod_vec_opr", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_Vcipher", "Vale.PPC64LE.InsVector.va_wpProof_Vcipher", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_Vcipher (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipher dst src1 src2)) =	(va_QProc (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipher dst src1 src2) (va_wpProof_Vcipher dst src1 src2))	false
LowStar.RVector.fst	LowStar.RVector.rv_inv_preserved	val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)]	val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)]	let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 30, "end_line": 468, "start_col": 0, "start_line": 464 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv));	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rv: LowStar.RVector.rvector rg -> p: LowStar.Monotonic.Buffer.loc -> h0: FStar.Monotonic.HyperStack.mem -> h1: FStar.Monotonic.HyperStack.mem -> FStar.Pervasives.Lemma (requires LowStar.RVector.rv_inv h0 rv /\ LowStar.Monotonic.Buffer.loc_disjoint p (LowStar.RVector.loc_rvector rv) /\ LowStar.Monotonic.Buffer.modifies p h0 h1) (ensures LowStar.RVector.rv_inv h1 rv) [ SMTPat (LowStar.RVector.rv_inv h0 rv); SMTPat (LowStar.Monotonic.Buffer.loc_disjoint p (LowStar.RVector.loc_rvector rv)); SMTPat (LowStar.Monotonic.Buffer.modifies p h0 h1) ]	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "LowStar.RVector.rvector", "LowStar.Monotonic.Buffer.loc", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rv_inv_preserved_", "Prims.unit", "Prims._assert", "LowStar.Monotonic.Buffer.loc_includes", "LowStar.RVector.loc_rvector", "LowStar.RVector.rv_loc_elems", "FStar.UInt32.__uint_to_t", "LowStar.Vector.size_of", "LowStar.RVector.rv_loc_elems_included", "LowStar.Vector.loc_vector" ]	[]	true	false	true	false	false	let rv_inv_preserved #a #rst #rg rv p h0 h1 =	assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1	false
LowStar.RVector.fst	LowStar.RVector.as_seq_sub	val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i}) (decreases (U32.v j))	val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i}) (decreases (U32.v j))	let as_seq_sub #a #rst #rg h rv i j = as_seq_seq rg h (V.as_seq h rv) (U32.v i) (U32.v j)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 53, "end_line": 524, "start_col": 0, "start_line": 523 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv)) let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /// Representation val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j) let rec as_seq_seq #a #rst rg h rs i j = if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1))) val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i})	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: FStar.Monotonic.HyperStack.mem -> rv: LowStar.RVector.rvector rg -> i: LowStar.Vector.uint32_t -> j: LowStar.Vector.uint32_t {i <= j /\ j <= LowStar.Vector.size_of rv /\ LowStar.RVector.rv_elems_inv h rv i j} -> Prims.GTot (s: FStar.Seq.Base.seq (Rgl?.repr rg) {FStar.Seq.Base.length s = FStar.UInt32.v j - FStar.UInt32.v i})	Prims.GTot	[ "sometrivial", "" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rvector", "LowStar.Vector.uint32_t", "Prims.l_and", "Prims.b2t", "FStar.Integers.op_Less_Equals", "FStar.Integers.Unsigned", "FStar.Integers.W32", "LowStar.Vector.size_of", "LowStar.RVector.rv_elems_inv", "LowStar.RVector.as_seq_seq", "LowStar.Vector.as_seq", "FStar.UInt32.v", "FStar.Seq.Base.seq", "LowStar.Regional.__proj__Rgl__item__repr", "Prims.op_Equality", "Prims.int", "FStar.Seq.Base.length", "FStar.Integers.op_Subtraction", "FStar.Integers.Signed", "FStar.Integers.Winfinite" ]	[]	false	false	false	false	false	let as_seq_sub #a #rst #rg h rv i j =	as_seq_seq rg h (V.as_seq h rv) (U32.v i) (U32.v j)	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_SHA256_Sigma1	val va_quick_SHA256_Sigma1 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (hash_orig: hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src))	val va_quick_SHA256_Sigma1 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (hash_orig: hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src))	let va_quick_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src)) = (va_QProc (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma1 dst src t block hash_orig) (va_wpProof_SHA256_Sigma1 dst src t block hash_orig))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 74, "end_line": 1694, "start_col": 0, "start_line": 1691 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig)) //-- //-- SHA256_Sigma1 val va_code_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma1 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> t: Vale.SHA.PPC64LE.SHA_helpers.counter -> block: Vale.SHA.PPC64LE.SHA_helpers.block_w -> hash_orig: Vale.SHA.PPC64LE.SHA_helpers.hash256 -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_SHA256_Sigma1 dst src)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.SHA.PPC64LE.SHA_helpers.counter", "Vale.SHA.PPC64LE.SHA_helpers.block_w", "Vale.SHA.PPC64LE.SHA_helpers.hash256", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_SHA256_Sigma1", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_mod_vec_opr", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_SHA256_Sigma1", "Vale.PPC64LE.InsVector.va_wpProof_SHA256_Sigma1", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_SHA256_Sigma1 (dst src: va_operand_vec_opr) (t: counter) (block: block_w) (hash_orig: hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src)) =	(va_QProc (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma1 dst src t block hash_orig) (va_wpProof_SHA256_Sigma1 dst src t block hash_orig))	false
LowStar.RVector.fst	LowStar.RVector.rv_loc_elems_disj	val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2)))	val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2)))	let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 67, "end_line": 346, "start_col": 0, "start_line": 344 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2)	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	h: FStar.Monotonic.HyperStack.mem -> rv: LowStar.RVector.rvector rg -> i: LowStar.Vector.uint32_t -> j: LowStar.Vector.uint32_t{i <= j && j <= LowStar.Vector.size_of rv} -> k1: LowStar.Vector.uint32_t{i <= k1} -> k2: LowStar.Vector.uint32_t{k1 <= k2 && k2 <= j} -> l1: LowStar.Vector.uint32_t{i <= l1} -> l2: LowStar.Vector.uint32_t{l1 <= l2 && l2 <= j} -> FStar.Pervasives.Lemma (requires LowStar.RVector.rv_elems_reg h rv i j /\ k2 <= l1 \|\| l2 <= k1) (ensures LowStar.Monotonic.Buffer.loc_disjoint (LowStar.RVector.rv_loc_elems h rv k1 k2) (LowStar.RVector.rv_loc_elems h rv l1 l2))	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rvector", "LowStar.Vector.uint32_t", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Unsigned", "FStar.Integers.W32", "LowStar.Vector.size_of", "LowStar.RVector.rs_loc_elems_disj", "LowStar.Vector.as_seq", "LowStar.Vector.frameOf", "FStar.UInt32.v", "Prims.unit" ]	[]	true	false	true	false	false	let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 =	rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2)	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_Vsbox	val va_quick_Vsbox (dst src: va_operand_vec_opr) : (va_quickCode unit (va_code_Vsbox dst src))	val va_quick_Vsbox (dst src: va_operand_vec_opr) : (va_quickCode unit (va_code_Vsbox dst src))	let va_quick_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsbox dst src)) = (va_QProc (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) (va_wp_Vsbox dst src) (va_wpProof_Vsbox dst src))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 13, "end_line": 1739, "start_col": 0, "start_line": 1736 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig)) //-- //-- SHA256_Sigma1 val va_code_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma1 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src)) = (va_QProc (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma1 dst src t block hash_orig) (va_wpProof_SHA256_Sigma1 dst src t block hash_orig)) //-- //-- Vsbox val va_code_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsbox : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsbox dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsbox dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src: Vale.PPC64LE.Decls.va_operand_vec_opr -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_Vsbox dst src)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_Vsbox", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_mod_vec_opr", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_Vsbox", "Vale.PPC64LE.InsVector.va_wpProof_Vsbox", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_Vsbox (dst src: va_operand_vec_opr) : (va_quickCode unit (va_code_Vsbox dst src)) =	(va_QProc (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) (va_wp_Vsbox dst src) (va_wpProof_Vsbox dst src))	false
Pulse.Checker.Prover.IntroPure.fst	Pulse.Checker.Prover.IntroPure.is_eq2_uvar	val is_eq2_uvar:pure_uv_heuristic_t	val is_eq2_uvar:pure_uv_heuristic_t	let is_eq2_uvar : pure_uv_heuristic_t = fun (uvs:env) (t:term) -> match is_eq2 t with \| None -> None \| Some (_, l, r) -> match is_var l with \| Some nm -> if Set.mem nm.nm_index (dom uvs) then Some (\| nm.nm_index, r \|) else None \| None -> match is_var r with \| Some nm -> if Set.mem nm.nm_index (dom uvs) then Some (\| nm.nm_index, l \|) else None \| _ -> None	{ "file_name": "lib/steel/pulse/Pulse.Checker.Prover.IntroPure.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }	{ "end_col": 19, "end_line": 112, "start_col": 0, "start_line": 95 }	(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. ) module Pulse.Checker.Prover.IntroPure open Pulse.Syntax open Pulse.Typing open Pulse.Typing.Combinators open Pulse.Typing.Metatheory open Pulse.Checker.Pure open Pulse.Checker.VPropEquiv open Pulse.Checker.Prover.Base open Pulse.Checker.Base open Pulse.Checker.Prover.Util module RU = Pulse.RuntimeUtils module T = FStar.Tactics.V2 module P = Pulse.Syntax.Printer module PS = Pulse.Checker.Prover.Substs let coerce_eq (#a #b:Type) (x:a) (_:squash (a == b)) : y:b{y == x} = x let k_intro_pure (g:env) (p:term) (d:tot_typing g p tm_prop) (token:prop_validity g p) (frame:vprop) : T.Tac (continuation_elaborator g frame g (frame tm_pure p)) = let t = wtag (Some STT_Ghost) (Tm_IntroPure {p}) in let c = comp_intro_pure p in let d : st_typing g t c = T_IntroPure g p d token in let x = fresh g in // p is well-typed in g, so it does not have x free assume (open_term p x == p); let ppname = mk_ppname_no_range "_pintrop" in let k : continuation_elaborator g (frame * tm_emp) (push_binding g x ppname_default tm_unit) (tm_pure p * frame) = continuation_elaborator_with_bind frame d (RU.magic ()) (ppname, x) in let k : continuation_elaborator g frame (push_binding g x ppname_default tm_unit) (frame * tm_pure p) = k_elab_equiv k (RU.magic ()) (RU.magic ()) in fun post_hint r -> let (\| t1, c1, d1 \|) = r in let d1 : st_typing g t1 c1 = d1 in let empty_env = mk_env (fstar_env g) in assert (equal g (push_env g empty_env)); assert (equal (push_env (push_binding g x ppname_default tm_unit) empty_env) (push_binding g x ppname_default tm_unit)); let d1 : st_typing (push_binding g x ppname_default tm_unit) t1 c1 = st_typing_weakening g empty_env t1 c1 d1 (push_binding g x ppname_default tm_unit) in k post_hint (\| t1, c1, d1 \|) module R = FStar.Reflection.V2 // let is_eq2 (t:R.term) : option (R.term & R.term) = // let head, args = R.collect_app_ln t in // match R.inspect_ln head, args with // \| R.Tv_FVar fv, [_; (a1, _); (a2, _)] // \| R.Tv_UInst fv _, [_; (a1, _); (a2, _)] -> // let l = R.inspect_fv fv in // if l = ["Pulse"; "Steel"; "Wrapper"; "eq2_prop"] \|\| // l = ["Prims"; "eq2"] // then Some (a1, a2) // else None // \| _ -> None let pure_uv_heuristic_t = uvs:env -> t:term -> T.Tac (option (uv:var { uv `Set.mem` freevars t } & term))	{ "checked_file": "/", "dependencies": [ "Pulse.Typing.Metatheory.fsti.checked", "Pulse.Typing.Combinators.fsti.checked", "Pulse.Typing.fst.checked", "Pulse.Syntax.Printer.fsti.checked", "Pulse.Syntax.fst.checked", "Pulse.RuntimeUtils.fsti.checked", "Pulse.PP.fst.checked", "Pulse.Checker.VPropEquiv.fsti.checked", "Pulse.Checker.Pure.fsti.checked", "Pulse.Checker.Prover.Util.fsti.checked", "Pulse.Checker.Prover.Substs.fsti.checked", "Pulse.Checker.Prover.Base.fsti.checked", "Pulse.Checker.Base.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Set.fsti.checked", "FStar.Reflection.V2.Formula.fst.checked", "FStar.Reflection.V2.fst.checked", "FStar.Range.fsti.checked", "FStar.Printf.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Checker.Prover.IntroPure.fst" }	[ { "abbrev": true, "full_module": "FStar.Reflection.V2", "short_module": "R" }, { "abbrev": true, "full_module": "Pulse.Checker.Prover.Substs", "short_module": "PS" }, { "abbrev": true, "full_module": "Pulse.Syntax.Printer", "short_module": "P" }, { "abbrev": true, "full_module": "FStar.Tactics.V2", "short_module": "T" }, { "abbrev": true, "full_module": "Pulse.RuntimeUtils", "short_module": "RU" }, { "abbrev": false, "full_module": "Pulse.Checker.Prover.Util", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Checker.Base", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Checker.Prover.Base", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Checker.VPropEquiv", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Checker.Pure", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Typing.Metatheory", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Typing.Combinators", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Typing", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Syntax", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Checker.Prover.Base", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Typing", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Syntax", "short_module": null }, { "abbrev": true, "full_module": "FStar.Tactics", "short_module": "T" }, { "abbrev": false, "full_module": "Pulse.Checker.Prover", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Checker.Prover", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	Pulse.Checker.Prover.IntroPure.pure_uv_heuristic_t	Prims.Tot	[ "total" ]	[]	[ "Pulse.Typing.Env.env", "Pulse.Syntax.Base.term", "Pulse.Syntax.Pure.is_eq2", "FStar.Pervasives.Native.None", "Prims.dtuple2", "Pulse.Syntax.Base.var", "Prims.b2t", "FStar.Set.mem", "Pulse.Syntax.Naming.freevars", "Pulse.Syntax.Pure.is_var", "Pulse.Syntax.Base.nm", "Pulse.Syntax.Base.__proj__Mknm__item__nm_index", "Pulse.Typing.Env.dom", "FStar.Pervasives.Native.Some", "Prims.Mkdtuple2", "Prims.bool", "FStar.Pervasives.Native.option" ]	[]	false	false	false	true	false	let is_eq2_uvar:pure_uv_heuristic_t =	fun (uvs: env) (t: term) -> match is_eq2 t with \| None -> None \| Some (_, l, r) -> match is_var l with \| Some nm -> if Set.mem nm.nm_index (dom uvs) then Some (\| nm.nm_index, r \|) else None \| None -> match is_var r with \| Some nm -> if Set.mem nm.nm_index (dom uvs) then Some (\| nm.nm_index, l \|) else None \| _ -> None	false
LowStar.RVector.fst	LowStar.RVector.rv_inv_preserved_	val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv))	val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv))	let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 66, "end_line": 451, "start_col": 0, "start_line": 450 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1))	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rv: LowStar.RVector.rvector rg -> p: LowStar.Monotonic.Buffer.loc -> h0: FStar.Monotonic.HyperStack.mem -> h1: FStar.Monotonic.HyperStack.mem -> FStar.Pervasives.Lemma (requires LowStar.RVector.rv_inv h0 rv /\ LowStar.Monotonic.Buffer.loc_disjoint p (LowStar.Vector.loc_vector rv) /\ LowStar.Monotonic.Buffer.loc_disjoint p (LowStar.RVector.rv_loc_elems h0 rv 0ul (LowStar.Vector.size_of rv)) /\ LowStar.Monotonic.Buffer.modifies p h0 h1) (ensures LowStar.RVector.rv_inv h1 rv)	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "LowStar.RVector.rvector", "LowStar.Monotonic.Buffer.loc", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rv_elems_inv_preserved", "FStar.UInt32.__uint_to_t", "LowStar.Vector.size_of", "Prims.unit" ]	[]	true	false	true	false	false	let rv_inv_preserved_ #a #rst #rg rv p h0 h1 =	rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_Vcipherlast	val va_quick_Vcipherlast (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipherlast dst src1 src2))	val va_quick_Vcipherlast (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipherlast dst src1 src2))	let va_quick_Vcipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipherlast dst src1 src2)) = (va_QProc (va_code_Vcipherlast dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipherlast dst src1 src2) (va_wpProof_Vcipherlast dst src1 src2))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 49, "end_line": 1870, "start_col": 0, "start_line": 1867 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig)) //-- //-- SHA256_Sigma1 val va_code_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma1 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src)) = (va_QProc (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma1 dst src t block hash_orig) (va_wpProof_SHA256_Sigma1 dst src t block hash_orig)) //-- //-- Vsbox val va_code_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsbox : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsbox dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsbox dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsbox dst src)) = (va_QProc (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) (va_wp_Vsbox dst src) (va_wpProof_Vsbox dst src)) //-- //-- RotWord val va_code_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_RotWord : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_RotWord dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_RotWord dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_RotWord dst src1 src2)) = (va_QProc (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_RotWord dst src1 src2) (va_wpProof_RotWord dst src1 src2)) //-- //-- Vcipher val va_code_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipher : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipher dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcipher dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipher dst src1 src2)) = (va_QProc (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipher dst src1 src2) (va_wpProof_Vcipher dst src1 src2)) //-- //-- Vcipherlast val va_code_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipherlast : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipherlast dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcipherlast dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcipherlast dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src1: Vale.PPC64LE.Decls.va_operand_vec_opr -> src2: Vale.PPC64LE.Decls.va_operand_vec_opr -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_Vcipherlast dst src1 src2)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_Vcipherlast", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_mod_vec_opr", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_Vcipherlast", "Vale.PPC64LE.InsVector.va_wpProof_Vcipherlast", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_Vcipherlast (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipherlast dst src1 src2)) =	(va_QProc (va_code_Vcipherlast dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipherlast dst src1 src2) (va_wpProof_Vcipherlast dst src1 src2))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_Vncipher	val va_quick_Vncipher (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_Vncipher dst src1 src2))	val va_quick_Vncipher (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_Vncipher dst src1 src2))	let va_quick_Vncipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vncipher dst src1 src2)) = (va_QProc (va_code_Vncipher dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vncipher dst src1 src2) (va_wpProof_Vncipher dst src1 src2))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 40, "end_line": 1910, "start_col": 0, "start_line": 1907 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig)) //-- //-- SHA256_Sigma1 val va_code_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma1 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src)) = (va_QProc (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma1 dst src t block hash_orig) (va_wpProof_SHA256_Sigma1 dst src t block hash_orig)) //-- //-- Vsbox val va_code_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsbox : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsbox dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsbox dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsbox dst src)) = (va_QProc (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) (va_wp_Vsbox dst src) (va_wpProof_Vsbox dst src)) //-- //-- RotWord val va_code_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_RotWord : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_RotWord dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_RotWord dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_RotWord dst src1 src2)) = (va_QProc (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_RotWord dst src1 src2) (va_wpProof_RotWord dst src1 src2)) //-- //-- Vcipher val va_code_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipher : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipher dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcipher dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipher dst src1 src2)) = (va_QProc (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipher dst src1 src2) (va_wpProof_Vcipher dst src1 src2)) //-- //-- Vcipherlast val va_code_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipherlast : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipherlast dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcipherlast dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcipherlast dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipherlast dst src1 src2)) = (va_QProc (va_code_Vcipherlast dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipherlast dst src1 src2) (va_wpProof_Vcipherlast dst src1 src2)) //-- //-- Vncipher val va_code_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vncipher : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vncipher dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.AES.AES_BE_s.inv_mix_columns (Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vncipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.AES.AES_BE_s.inv_mix_columns (Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2)) ==> va_k va_sM (()))) val va_wpProof_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vncipher dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vncipher dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src1: Vale.PPC64LE.Decls.va_operand_vec_opr -> src2: Vale.PPC64LE.Decls.va_operand_vec_opr -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_Vncipher dst src1 src2)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_Vncipher", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_mod_vec_opr", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_Vncipher", "Vale.PPC64LE.InsVector.va_wpProof_Vncipher", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_Vncipher (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_Vncipher dst src1 src2)) =	(va_QProc (va_code_Vncipher dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vncipher dst src1 src2) (va_wpProof_Vncipher dst src1 src2))	false
LowStar.RVector.fst	LowStar.RVector.rv_inv_preserved_int	val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv))	val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv))	let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 9, "end_line": 496, "start_col": 0, "start_line": 479 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i)))	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rv: LowStar.RVector.rvector rg -> i: LowStar.Vector.uint32_t{i < LowStar.Vector.size_of rv} -> h0: FStar.Monotonic.HyperStack.mem -> h1: FStar.Monotonic.HyperStack.mem -> FStar.Pervasives.Lemma (requires LowStar.RVector.rv_inv h0 rv /\ LowStar.Monotonic.Buffer.modifies (LowStar.Monotonic.Buffer.loc_all_regions_from false (Rgl?.region_of rg (LowStar.Vector.get h0 rv i))) h0 h1 /\ LowStar.Regional.rg_inv rg h1 (LowStar.Vector.get h1 rv i)) (ensures LowStar.RVector.rv_inv h1 rv)	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "LowStar.RVector.rvector", "LowStar.Vector.uint32_t", "Prims.b2t", "FStar.Integers.op_Less", "FStar.Integers.Unsigned", "FStar.Integers.W32", "LowStar.Vector.size_of", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.rs_elems_inv_preserved", "LowStar.Vector.as_seq", "FStar.Integers.op_Plus", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.UInt32.v", "LowStar.Monotonic.Buffer.loc_all_regions_from", "LowStar.Regional.__proj__Rgl__item__region_of", "LowStar.Vector.get", "Prims.unit", "LowStar.RVector.rs_loc_elems_elem_disj", "LowStar.Vector.frameOf" ]	[]	true	false	true	false	false	let rv_inv_preserved_int #a #rst #rg rv i h0 h1 =	rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1	false
LowStar.RVector.fst	LowStar.RVector.as_seq_seq	val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j)	val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j)	let rec as_seq_seq #a #rst rg h rs i j = if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1)))	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 53, "end_line": 511, "start_col": 0, "start_line": 508 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv)) let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /// Representation val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i})	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> h: FStar.Monotonic.HyperStack.mem -> rs: FStar.Seq.Base.seq a -> i: FStar.Integers.nat -> j: FStar.Integers.nat {i <= j /\ j <= FStar.Seq.Base.length rs /\ LowStar.RVector.rs_elems_inv rg h rs i j} -> Prims.GTot (s: FStar.Seq.Base.seq (Rgl?.repr rg) {FStar.Seq.Base.length s = j - i})	Prims.GTot	[ "sometrivial", "" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "FStar.Seq.Base.seq", "FStar.Integers.nat", "Prims.l_and", "Prims.b2t", "FStar.Integers.op_Less_Equals", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.Seq.Base.length", "LowStar.RVector.rs_elems_inv", "Prims.op_Equality", "FStar.Seq.Base.empty", "LowStar.Regional.__proj__Rgl__item__repr", "Prims.bool", "FStar.Seq.Properties.snoc", "LowStar.RVector.as_seq_seq", "FStar.Integers.op_Subtraction", "LowStar.Regional.__proj__Rgl__item__r_repr", "FStar.Seq.Base.index", "Prims.int" ]	[ "recursion" ]	false	false	false	false	false	let rec as_seq_seq #a #rst rg h rs i j =	if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1)))	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_RotWord	val va_quick_RotWord (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_RotWord dst src1 src2))	val va_quick_RotWord (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_RotWord dst src1 src2))	let va_quick_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_RotWord dst src1 src2)) = (va_QProc (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_RotWord dst src1 src2) (va_wpProof_RotWord dst src1 src2))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 39, "end_line": 1793, "start_col": 0, "start_line": 1790 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig)) //-- //-- SHA256_Sigma1 val va_code_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma1 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src)) = (va_QProc (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma1 dst src t block hash_orig) (va_wpProof_SHA256_Sigma1 dst src t block hash_orig)) //-- //-- Vsbox val va_code_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsbox : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsbox dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsbox dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsbox dst src)) = (va_QProc (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) (va_wp_Vsbox dst src) (va_wpProof_Vsbox dst src)) //-- //-- RotWord val va_code_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_RotWord : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_RotWord dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_RotWord dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src1: Vale.PPC64LE.Decls.va_operand_vec_opr -> src2: Vale.PPC64LE.Decls.va_operand_vec_opr -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_RotWord dst src1 src2)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_RotWord", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_mod_vec_opr", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_RotWord", "Vale.PPC64LE.InsVector.va_wpProof_RotWord", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_RotWord (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_RotWord dst src1 src2)) =	(va_QProc (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_RotWord dst src1 src2) (va_wpProof_RotWord dst src1 src2))	false
LowStar.RVector.fst	LowStar.RVector.as_seq_preserved	val as_seq_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv_preserved rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv))) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)]	val as_seq_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv_preserved rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv))) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)]	let as_seq_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); as_seq_preserved_ rv p h0 h1	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 30, "end_line": 682, "start_col": 0, "start_line": 678 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv)) let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /// Representation val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j) let rec as_seq_seq #a #rst rg h rs i j = if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1))) val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i}) (decreases (U32.v j)) let as_seq_sub #a #rst #rg h rv i j = as_seq_seq rg h (V.as_seq h rv) (U32.v i) (U32.v j) val as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v (V.size_of rv)}) let as_seq #a #rst #rg h rv = as_seq_sub h rv 0ul (V.size_of rv) val as_seq_sub_as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> Lemma (S.equal (as_seq_sub h rv 0ul (V.size_of rv)) (as_seq h rv)) [SMTPat (as_seq_sub h rv 0ul (V.size_of rv))] let as_seq_sub_as_seq #a #rst #rg h rv = () val as_seq_seq_index: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{k < j - i} -> Lemma (requires true) (ensures (S.index (as_seq_seq rg h rs i j) k == Rgl?.r_repr rg h (S.index rs (i + k)))) (decreases j) [SMTPat (S.index (as_seq_seq rg h rs i j) k)] let rec as_seq_seq_index #a #rst rg h rs i j k = if i = j then () else if k = j - i - 1 then () else as_seq_seq_index rg h rs i (j - 1) k val as_seq_seq_eq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs1:S.seq a -> rs2:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs1 /\ rs_elems_inv rg h rs1 i j} -> k:nat -> l:nat{k <= l /\ l <= S.length rs2 /\ rs_elems_inv rg h rs2 k l} -> Lemma (requires (S.equal (S.slice rs1 i j) (S.slice rs2 k l))) (ensures (S.equal (as_seq_seq rg h rs1 i j) (as_seq_seq rg h rs2 k l))) let as_seq_seq_eq #a #rst rg h rs1 rs2 i j k l = assert (forall (a:nat{a < j - i}). S.index (as_seq_seq rg h rs1 i j) a == Rgl?.r_repr rg h (S.index rs1 (i + a))); assert (forall (a:nat{a < l - k}). S.index (as_seq_seq rg h rs2 k l) a == Rgl?.r_repr rg h (S.index rs2 (k + a))); assert (S.length (S.slice rs1 i j) = j - i); assert (S.length (S.slice rs2 k l) = l - k); assert (forall (a:nat{a < j - i}). S.index (S.slice rs1 i j) a == S.index (S.slice rs2 k l) a); assert (forall (a:nat{a < j - i}). S.index rs1 (i + a) == S.index rs2 (k + a)) val as_seq_seq_slice: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat -> l:nat{k <= l && l <= j - i} -> Lemma (S.equal (S.slice (as_seq_seq rg h rs i j) k l) (as_seq_seq rg h (S.slice rs (i + k) (i + l)) 0 (l - k))) #reset-options "--z3rlimit 10" let rec as_seq_seq_slice #a #rst rg h rs i j k l = if k = l then () else (as_seq_seq_slice rg h rs i j k (l - 1); as_seq_seq_index rg h rs i j (l - 1); as_seq_seq_eq rg h (S.slice rs (i + k) (i + l - 1)) (S.slice rs (i + k) (i + l)) 0 (l - k - 1) 0 (l - k - 1)) val as_seq_seq_upd: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{ i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{i <= k && k < j} -> v:a{rg_inv rg h v} -> Lemma (S.equal (as_seq_seq rg h (S.upd rs k v) i j) (S.upd (as_seq_seq rg h rs i j) (k - i) (Rgl?.r_repr rg h v))) let rec as_seq_seq_upd #a #rst rg h rs i j k v = if i = j then () else if k = j - 1 then () else as_seq_seq_upd rg h rs i (j - 1) k v // Preservation based on disjointness val as_seq_seq_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv_preserved rg rs i j p h0 h1; S.equal (as_seq_seq rg h0 rs i j) (as_seq_seq rg h1 rs i j))) let rec as_seq_seq_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; as_seq_seq_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val as_seq_sub_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ loc_disjoint p (V.loc_vector rv) /\ modifies p h0 h1)) (ensures (rv_elems_inv_preserved rv i j p h0 h1; S.equal (as_seq_sub h0 rv i j) (as_seq_sub h1 rv i j))) let as_seq_sub_preserved #a #rst #rg rv i j p h0 h1 = as_seq_seq_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val as_seq_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv_preserved_ rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv))) let as_seq_preserved_ #a #rst #rg rv p h0 h1 = as_seq_sub_preserved rv 0ul (V.size_of rv) p h0 h1 // The second core lemma of `rvector` val as_seq_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv_preserved rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv))) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv));	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 10, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rv: LowStar.RVector.rvector rg -> p: LowStar.Monotonic.Buffer.loc -> h0: FStar.Monotonic.HyperStack.mem -> h1: FStar.Monotonic.HyperStack.mem -> FStar.Pervasives.Lemma (requires LowStar.RVector.rv_inv h0 rv /\ LowStar.Monotonic.Buffer.loc_disjoint p (LowStar.RVector.loc_rvector rv) /\ LowStar.Monotonic.Buffer.modifies p h0 h1) (ensures (LowStar.RVector.rv_inv_preserved rv p h0 h1; FStar.Seq.Base.equal (LowStar.RVector.as_seq h0 rv) (LowStar.RVector.as_seq h1 rv))) [ SMTPat (LowStar.RVector.rv_inv h0 rv); SMTPat (LowStar.Monotonic.Buffer.loc_disjoint p (LowStar.RVector.loc_rvector rv)); SMTPat (LowStar.Monotonic.Buffer.modifies p h0 h1) ]	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "LowStar.RVector.rvector", "LowStar.Monotonic.Buffer.loc", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.as_seq_preserved_", "Prims.unit", "Prims._assert", "LowStar.Monotonic.Buffer.loc_includes", "LowStar.RVector.loc_rvector", "LowStar.RVector.rv_loc_elems", "FStar.UInt32.__uint_to_t", "LowStar.Vector.size_of", "LowStar.RVector.rv_loc_elems_included", "LowStar.Vector.loc_vector" ]	[]	true	false	true	false	false	let as_seq_preserved #a #rst #rg rv p h0 h1 =	assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); as_seq_preserved_ rv p h0 h1	false
LowStar.RVector.fst	LowStar.RVector.alloc_empty	val alloc_empty: #a:Type0 -> #rst:Type -> rg:regional rst a -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 bv h1 -> h0 == h1 /\ V.size_of bv = 0ul))	val alloc_empty: #a:Type0 -> #rst:Type -> rg:regional rst a -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 bv h1 -> h0 == h1 /\ V.size_of bv = 0ul))	let alloc_empty #a #rst rg = V.alloc_empty a	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 17, "end_line": 692, "start_col": 0, "start_line": 691 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv)) let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /// Representation val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j) let rec as_seq_seq #a #rst rg h rs i j = if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1))) val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i}) (decreases (U32.v j)) let as_seq_sub #a #rst #rg h rv i j = as_seq_seq rg h (V.as_seq h rv) (U32.v i) (U32.v j) val as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v (V.size_of rv)}) let as_seq #a #rst #rg h rv = as_seq_sub h rv 0ul (V.size_of rv) val as_seq_sub_as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> Lemma (S.equal (as_seq_sub h rv 0ul (V.size_of rv)) (as_seq h rv)) [SMTPat (as_seq_sub h rv 0ul (V.size_of rv))] let as_seq_sub_as_seq #a #rst #rg h rv = () val as_seq_seq_index: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{k < j - i} -> Lemma (requires true) (ensures (S.index (as_seq_seq rg h rs i j) k == Rgl?.r_repr rg h (S.index rs (i + k)))) (decreases j) [SMTPat (S.index (as_seq_seq rg h rs i j) k)] let rec as_seq_seq_index #a #rst rg h rs i j k = if i = j then () else if k = j - i - 1 then () else as_seq_seq_index rg h rs i (j - 1) k val as_seq_seq_eq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs1:S.seq a -> rs2:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs1 /\ rs_elems_inv rg h rs1 i j} -> k:nat -> l:nat{k <= l /\ l <= S.length rs2 /\ rs_elems_inv rg h rs2 k l} -> Lemma (requires (S.equal (S.slice rs1 i j) (S.slice rs2 k l))) (ensures (S.equal (as_seq_seq rg h rs1 i j) (as_seq_seq rg h rs2 k l))) let as_seq_seq_eq #a #rst rg h rs1 rs2 i j k l = assert (forall (a:nat{a < j - i}). S.index (as_seq_seq rg h rs1 i j) a == Rgl?.r_repr rg h (S.index rs1 (i + a))); assert (forall (a:nat{a < l - k}). S.index (as_seq_seq rg h rs2 k l) a == Rgl?.r_repr rg h (S.index rs2 (k + a))); assert (S.length (S.slice rs1 i j) = j - i); assert (S.length (S.slice rs2 k l) = l - k); assert (forall (a:nat{a < j - i}). S.index (S.slice rs1 i j) a == S.index (S.slice rs2 k l) a); assert (forall (a:nat{a < j - i}). S.index rs1 (i + a) == S.index rs2 (k + a)) val as_seq_seq_slice: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat -> l:nat{k <= l && l <= j - i} -> Lemma (S.equal (S.slice (as_seq_seq rg h rs i j) k l) (as_seq_seq rg h (S.slice rs (i + k) (i + l)) 0 (l - k))) #reset-options "--z3rlimit 10" let rec as_seq_seq_slice #a #rst rg h rs i j k l = if k = l then () else (as_seq_seq_slice rg h rs i j k (l - 1); as_seq_seq_index rg h rs i j (l - 1); as_seq_seq_eq rg h (S.slice rs (i + k) (i + l - 1)) (S.slice rs (i + k) (i + l)) 0 (l - k - 1) 0 (l - k - 1)) val as_seq_seq_upd: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{ i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{i <= k && k < j} -> v:a{rg_inv rg h v} -> Lemma (S.equal (as_seq_seq rg h (S.upd rs k v) i j) (S.upd (as_seq_seq rg h rs i j) (k - i) (Rgl?.r_repr rg h v))) let rec as_seq_seq_upd #a #rst rg h rs i j k v = if i = j then () else if k = j - 1 then () else as_seq_seq_upd rg h rs i (j - 1) k v // Preservation based on disjointness val as_seq_seq_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv_preserved rg rs i j p h0 h1; S.equal (as_seq_seq rg h0 rs i j) (as_seq_seq rg h1 rs i j))) let rec as_seq_seq_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; as_seq_seq_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val as_seq_sub_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ loc_disjoint p (V.loc_vector rv) /\ modifies p h0 h1)) (ensures (rv_elems_inv_preserved rv i j p h0 h1; S.equal (as_seq_sub h0 rv i j) (as_seq_sub h1 rv i j))) let as_seq_sub_preserved #a #rst #rg rv i j p h0 h1 = as_seq_seq_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val as_seq_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv_preserved_ rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv))) let as_seq_preserved_ #a #rst #rg rv p h0 h1 = as_seq_sub_preserved rv 0ul (V.size_of rv) p h0 h1 // The second core lemma of `rvector` val as_seq_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv_preserved rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv))) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let as_seq_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); as_seq_preserved_ rv p h0 h1 /// Construction val alloc_empty: #a:Type0 -> #rst:Type -> rg:regional rst a -> HST.ST (rvector rg) (requires (fun h0 -> true))	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 10, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> FStar.HyperStack.ST.ST (LowStar.RVector.rvector rg)	FStar.HyperStack.ST.ST	[]	[]	[ "LowStar.Regional.regional", "LowStar.Vector.alloc_empty", "LowStar.RVector.rvector" ]	[]	false	true	false	false	false	let alloc_empty #a #rst rg =	V.alloc_empty a	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_Vncipherlast	val va_quick_Vncipherlast (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_Vncipherlast dst src1 src2))	val va_quick_Vncipherlast (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_Vncipherlast dst src1 src2))	let va_quick_Vncipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vncipherlast dst src1 src2)) = (va_QProc (va_code_Vncipherlast dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vncipherlast dst src1 src2) (va_wpProof_Vncipherlast dst src1 src2))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 55, "end_line": 1948, "start_col": 0, "start_line": 1945 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig)) //-- //-- SHA256_Sigma1 val va_code_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma1 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src)) = (va_QProc (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma1 dst src t block hash_orig) (va_wpProof_SHA256_Sigma1 dst src t block hash_orig)) //-- //-- Vsbox val va_code_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsbox : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsbox dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsbox dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsbox dst src)) = (va_QProc (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) (va_wp_Vsbox dst src) (va_wpProof_Vsbox dst src)) //-- //-- RotWord val va_code_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_RotWord : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_RotWord dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_RotWord dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_RotWord dst src1 src2)) = (va_QProc (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_RotWord dst src1 src2) (va_wpProof_RotWord dst src1 src2)) //-- //-- Vcipher val va_code_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipher : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipher dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcipher dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipher dst src1 src2)) = (va_QProc (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipher dst src1 src2) (va_wpProof_Vcipher dst src1 src2)) //-- //-- Vcipherlast val va_code_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipherlast : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipherlast dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcipherlast dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcipherlast dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipherlast dst src1 src2)) = (va_QProc (va_code_Vcipherlast dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipherlast dst src1 src2) (va_wpProof_Vcipherlast dst src1 src2)) //-- //-- Vncipher val va_code_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vncipher : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vncipher dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.AES.AES_BE_s.inv_mix_columns (Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vncipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.AES.AES_BE_s.inv_mix_columns (Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2)) ==> va_k va_sM (()))) val va_wpProof_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vncipher dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vncipher dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vncipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vncipher dst src1 src2)) = (va_QProc (va_code_Vncipher dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vncipher dst src1 src2) (va_wpProof_Vncipher dst src1 src2)) //-- //-- Vncipherlast val va_code_Vncipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vncipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vncipherlast : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vncipherlast dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vncipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vncipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vncipherlast dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vncipherlast dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src1: Vale.PPC64LE.Decls.va_operand_vec_opr -> src2: Vale.PPC64LE.Decls.va_operand_vec_opr -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_Vncipherlast dst src1 src2)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_Vncipherlast", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_mod_vec_opr", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_Vncipherlast", "Vale.PPC64LE.InsVector.va_wpProof_Vncipherlast", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_Vncipherlast (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_Vncipherlast dst src1 src2)) =	(va_QProc (va_code_Vncipherlast dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vncipherlast dst src1 src2) (va_wpProof_Vncipherlast dst src1 src2))	false
LowStar.RVector.fst	LowStar.RVector.rv_loc_elems_preserved	val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j))	val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j))	let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 53, "end_line": 413, "start_col": 0, "start_line": 407 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j))	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rv: LowStar.RVector.rvector rg -> i: LowStar.Vector.uint32_t -> j: LowStar.Vector.uint32_t{i <= j && j <= LowStar.Vector.size_of rv} -> p: LowStar.Monotonic.Buffer.loc -> h0: FStar.Monotonic.HyperStack.mem -> h1: FStar.Monotonic.HyperStack.mem -> FStar.Pervasives.Lemma (requires LowStar.Vector.live h0 rv /\ LowStar.Monotonic.Buffer.loc_disjoint p (LowStar.Vector.loc_vector_within rv i j) /\ LowStar.Monotonic.Buffer.modifies p h0 h1) (ensures LowStar.RVector.rv_loc_elems h0 rv i j == LowStar.RVector.rv_loc_elems h1 rv i j) (decreases FStar.UInt32.v j)	FStar.Pervasives.Lemma	[ "lemma", "" ]	[]	[ "LowStar.Regional.regional", "LowStar.RVector.rvector", "LowStar.Vector.uint32_t", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Unsigned", "FStar.Integers.W32", "LowStar.Vector.size_of", "LowStar.Monotonic.Buffer.loc", "FStar.Monotonic.HyperStack.mem", "Prims.op_Equality", "Prims.bool", "LowStar.RVector.rv_loc_elems_preserved", "FStar.Integers.op_Subtraction", "FStar.UInt32.__uint_to_t", "Prims.unit", "LowStar.Vector.loc_vector_within_includes", "Prims._assert", "Prims.eq2", "LowStar.Vector.get", "LowStar.Vector.get_preserved" ]	[ "recursion" ]	false	false	true	false	false	let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 =	if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1)	false
LowStar.RVector.fst	LowStar.RVector.as_seq_preserved_	val as_seq_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv_preserved_ rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv)))	val as_seq_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv_preserved_ rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv)))	let as_seq_preserved_ #a #rst #rg rv p h0 h1 = as_seq_sub_preserved rv 0ul (V.size_of rv) p h0 h1	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 52, "end_line": 662, "start_col": 0, "start_line": 661 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv)) let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /// Representation val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j) let rec as_seq_seq #a #rst rg h rs i j = if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1))) val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i}) (decreases (U32.v j)) let as_seq_sub #a #rst #rg h rv i j = as_seq_seq rg h (V.as_seq h rv) (U32.v i) (U32.v j) val as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v (V.size_of rv)}) let as_seq #a #rst #rg h rv = as_seq_sub h rv 0ul (V.size_of rv) val as_seq_sub_as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> Lemma (S.equal (as_seq_sub h rv 0ul (V.size_of rv)) (as_seq h rv)) [SMTPat (as_seq_sub h rv 0ul (V.size_of rv))] let as_seq_sub_as_seq #a #rst #rg h rv = () val as_seq_seq_index: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{k < j - i} -> Lemma (requires true) (ensures (S.index (as_seq_seq rg h rs i j) k == Rgl?.r_repr rg h (S.index rs (i + k)))) (decreases j) [SMTPat (S.index (as_seq_seq rg h rs i j) k)] let rec as_seq_seq_index #a #rst rg h rs i j k = if i = j then () else if k = j - i - 1 then () else as_seq_seq_index rg h rs i (j - 1) k val as_seq_seq_eq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs1:S.seq a -> rs2:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs1 /\ rs_elems_inv rg h rs1 i j} -> k:nat -> l:nat{k <= l /\ l <= S.length rs2 /\ rs_elems_inv rg h rs2 k l} -> Lemma (requires (S.equal (S.slice rs1 i j) (S.slice rs2 k l))) (ensures (S.equal (as_seq_seq rg h rs1 i j) (as_seq_seq rg h rs2 k l))) let as_seq_seq_eq #a #rst rg h rs1 rs2 i j k l = assert (forall (a:nat{a < j - i}). S.index (as_seq_seq rg h rs1 i j) a == Rgl?.r_repr rg h (S.index rs1 (i + a))); assert (forall (a:nat{a < l - k}). S.index (as_seq_seq rg h rs2 k l) a == Rgl?.r_repr rg h (S.index rs2 (k + a))); assert (S.length (S.slice rs1 i j) = j - i); assert (S.length (S.slice rs2 k l) = l - k); assert (forall (a:nat{a < j - i}). S.index (S.slice rs1 i j) a == S.index (S.slice rs2 k l) a); assert (forall (a:nat{a < j - i}). S.index rs1 (i + a) == S.index rs2 (k + a)) val as_seq_seq_slice: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat -> l:nat{k <= l && l <= j - i} -> Lemma (S.equal (S.slice (as_seq_seq rg h rs i j) k l) (as_seq_seq rg h (S.slice rs (i + k) (i + l)) 0 (l - k))) #reset-options "--z3rlimit 10" let rec as_seq_seq_slice #a #rst rg h rs i j k l = if k = l then () else (as_seq_seq_slice rg h rs i j k (l - 1); as_seq_seq_index rg h rs i j (l - 1); as_seq_seq_eq rg h (S.slice rs (i + k) (i + l - 1)) (S.slice rs (i + k) (i + l)) 0 (l - k - 1) 0 (l - k - 1)) val as_seq_seq_upd: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{ i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{i <= k && k < j} -> v:a{rg_inv rg h v} -> Lemma (S.equal (as_seq_seq rg h (S.upd rs k v) i j) (S.upd (as_seq_seq rg h rs i j) (k - i) (Rgl?.r_repr rg h v))) let rec as_seq_seq_upd #a #rst rg h rs i j k v = if i = j then () else if k = j - 1 then () else as_seq_seq_upd rg h rs i (j - 1) k v // Preservation based on disjointness val as_seq_seq_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv_preserved rg rs i j p h0 h1; S.equal (as_seq_seq rg h0 rs i j) (as_seq_seq rg h1 rs i j))) let rec as_seq_seq_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; as_seq_seq_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val as_seq_sub_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ loc_disjoint p (V.loc_vector rv) /\ modifies p h0 h1)) (ensures (rv_elems_inv_preserved rv i j p h0 h1; S.equal (as_seq_sub h0 rv i j) (as_seq_sub h1 rv i j))) let as_seq_sub_preserved #a #rst #rg rv i j p h0 h1 = as_seq_seq_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val as_seq_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv_preserved_ rv p h0 h1;	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 10, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rv: LowStar.RVector.rvector rg -> p: LowStar.Monotonic.Buffer.loc -> h0: FStar.Monotonic.HyperStack.mem -> h1: FStar.Monotonic.HyperStack.mem -> FStar.Pervasives.Lemma (requires LowStar.RVector.rv_inv h0 rv /\ LowStar.Monotonic.Buffer.loc_disjoint p (LowStar.Vector.loc_vector rv) /\ LowStar.Monotonic.Buffer.loc_disjoint p (LowStar.RVector.rv_loc_elems h0 rv 0ul (LowStar.Vector.size_of rv)) /\ LowStar.Monotonic.Buffer.modifies p h0 h1) (ensures (LowStar.RVector.rv_inv_preserved_ rv p h0 h1; FStar.Seq.Base.equal (LowStar.RVector.as_seq h0 rv) (LowStar.RVector.as_seq h1 rv)))	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "LowStar.RVector.rvector", "LowStar.Monotonic.Buffer.loc", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.as_seq_sub_preserved", "FStar.UInt32.__uint_to_t", "LowStar.Vector.size_of", "Prims.unit" ]	[]	true	false	true	false	false	let as_seq_preserved_ #a #rst #rg rv p h0 h1 =	as_seq_sub_preserved rv 0ul (V.size_of rv) p h0 h1	false
LowStar.RVector.fst	LowStar.RVector.alloc_reserve	val alloc_reserve: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> rid:HST.erid -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ V.frameOf rv = rid /\ V.size_of rv = 0ul /\ S.equal (as_seq h1 rv) S.empty /\ Set.equal (Map.domain (HS.get_hmap h0)) (Map.domain (HS.get_hmap h1)) /\ B.fresh_loc (V.loc_vector rv) h0 h1))	val alloc_reserve: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> rid:HST.erid -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ V.frameOf rv = rid /\ V.size_of rv = 0ul /\ S.equal (as_seq h1 rv) S.empty /\ Set.equal (Map.domain (HS.get_hmap h0)) (Map.domain (HS.get_hmap h1)) /\ B.fresh_loc (V.loc_vector rv) h0 h1))	let alloc_reserve #a #rst rg len rid = V.alloc_reserve len (rg_dummy rg) rid	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 39, "end_line": 776, "start_col": 0, "start_line": 775 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv)) let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /// Representation val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j) let rec as_seq_seq #a #rst rg h rs i j = if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1))) val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i}) (decreases (U32.v j)) let as_seq_sub #a #rst #rg h rv i j = as_seq_seq rg h (V.as_seq h rv) (U32.v i) (U32.v j) val as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v (V.size_of rv)}) let as_seq #a #rst #rg h rv = as_seq_sub h rv 0ul (V.size_of rv) val as_seq_sub_as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> Lemma (S.equal (as_seq_sub h rv 0ul (V.size_of rv)) (as_seq h rv)) [SMTPat (as_seq_sub h rv 0ul (V.size_of rv))] let as_seq_sub_as_seq #a #rst #rg h rv = () val as_seq_seq_index: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{k < j - i} -> Lemma (requires true) (ensures (S.index (as_seq_seq rg h rs i j) k == Rgl?.r_repr rg h (S.index rs (i + k)))) (decreases j) [SMTPat (S.index (as_seq_seq rg h rs i j) k)] let rec as_seq_seq_index #a #rst rg h rs i j k = if i = j then () else if k = j - i - 1 then () else as_seq_seq_index rg h rs i (j - 1) k val as_seq_seq_eq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs1:S.seq a -> rs2:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs1 /\ rs_elems_inv rg h rs1 i j} -> k:nat -> l:nat{k <= l /\ l <= S.length rs2 /\ rs_elems_inv rg h rs2 k l} -> Lemma (requires (S.equal (S.slice rs1 i j) (S.slice rs2 k l))) (ensures (S.equal (as_seq_seq rg h rs1 i j) (as_seq_seq rg h rs2 k l))) let as_seq_seq_eq #a #rst rg h rs1 rs2 i j k l = assert (forall (a:nat{a < j - i}). S.index (as_seq_seq rg h rs1 i j) a == Rgl?.r_repr rg h (S.index rs1 (i + a))); assert (forall (a:nat{a < l - k}). S.index (as_seq_seq rg h rs2 k l) a == Rgl?.r_repr rg h (S.index rs2 (k + a))); assert (S.length (S.slice rs1 i j) = j - i); assert (S.length (S.slice rs2 k l) = l - k); assert (forall (a:nat{a < j - i}). S.index (S.slice rs1 i j) a == S.index (S.slice rs2 k l) a); assert (forall (a:nat{a < j - i}). S.index rs1 (i + a) == S.index rs2 (k + a)) val as_seq_seq_slice: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat -> l:nat{k <= l && l <= j - i} -> Lemma (S.equal (S.slice (as_seq_seq rg h rs i j) k l) (as_seq_seq rg h (S.slice rs (i + k) (i + l)) 0 (l - k))) #reset-options "--z3rlimit 10" let rec as_seq_seq_slice #a #rst rg h rs i j k l = if k = l then () else (as_seq_seq_slice rg h rs i j k (l - 1); as_seq_seq_index rg h rs i j (l - 1); as_seq_seq_eq rg h (S.slice rs (i + k) (i + l - 1)) (S.slice rs (i + k) (i + l)) 0 (l - k - 1) 0 (l - k - 1)) val as_seq_seq_upd: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{ i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{i <= k && k < j} -> v:a{rg_inv rg h v} -> Lemma (S.equal (as_seq_seq rg h (S.upd rs k v) i j) (S.upd (as_seq_seq rg h rs i j) (k - i) (Rgl?.r_repr rg h v))) let rec as_seq_seq_upd #a #rst rg h rs i j k v = if i = j then () else if k = j - 1 then () else as_seq_seq_upd rg h rs i (j - 1) k v // Preservation based on disjointness val as_seq_seq_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv_preserved rg rs i j p h0 h1; S.equal (as_seq_seq rg h0 rs i j) (as_seq_seq rg h1 rs i j))) let rec as_seq_seq_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; as_seq_seq_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val as_seq_sub_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ loc_disjoint p (V.loc_vector rv) /\ modifies p h0 h1)) (ensures (rv_elems_inv_preserved rv i j p h0 h1; S.equal (as_seq_sub h0 rv i j) (as_seq_sub h1 rv i j))) let as_seq_sub_preserved #a #rst #rg rv i j p h0 h1 = as_seq_seq_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val as_seq_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv_preserved_ rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv))) let as_seq_preserved_ #a #rst #rg rv p h0 h1 = as_seq_sub_preserved rv 0ul (V.size_of rv) p h0 h1 // The second core lemma of `rvector` val as_seq_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv_preserved rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv))) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let as_seq_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); as_seq_preserved_ rv p h0 h1 /// Construction val alloc_empty: #a:Type0 -> #rst:Type -> rg:regional rst a -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 bv h1 -> h0 == h1 /\ V.size_of bv = 0ul)) let alloc_empty #a #rst rg = V.alloc_empty a val alloc_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> cidx:uint32_t{cidx <= V.size_of rv} -> HST.ST unit (requires (fun h0 -> rv_itself_inv h0 rv)) (ensures (fun h0 _ h1 -> modifies (V.loc_vector_within rv 0ul cidx) h0 h1 /\ rv_itself_inv h1 rv /\ rv_elems_inv h1 rv 0ul cidx /\ rv_elems_reg h1 rv 0ul cidx /\ S.equal (as_seq_sub h1 rv 0ul cidx) (S.create (U32.v cidx) (Ghost.reveal (Rgl?.irepr rg))) /\ // the loop invariant for this function V.forall_ h1 rv 0ul cidx (fun r -> HS.fresh_region (Rgl?.region_of rg r) h0 h1 /\ Rgl?.r_alloc_p rg r) /\ Set.subset (Map.domain (HS.get_hmap h0)) (Map.domain (HS.get_hmap h1)))) (decreases (U32.v cidx)) #reset-options "--z3rlimit 20" let rec alloc_ #a #rst #rg rv cidx = let hh0 = HST.get () in if cidx = 0ul then () else (let nrid = HST.new_region (V.frameOf rv) in let v = rg_alloc rg nrid in let hh1 = HST.get () in V.assign rv (cidx - 1ul) v; let hh2 = HST.get () in V.loc_vector_within_included rv (cidx - 1ul) cidx; Rgl?.r_sep rg (V.get hh2 rv (cidx - 1ul)) (V.loc_vector_within rv (cidx - 1ul) cidx) hh1 hh2; alloc_ rv (cidx - 1ul); let hh3 = HST.get () in V.loc_vector_within_included rv 0ul (cidx - 1ul); Rgl?.r_sep rg (V.get hh3 rv (cidx - 1ul)) (V.loc_vector_within rv 0ul (cidx - 1ul)) hh2 hh3; V.forall2_extend hh3 rv 0ul (cidx - 1ul) (fun r1 r2 -> HS.disjoint (Rgl?.region_of rg r1) (Rgl?.region_of rg r2)); V.loc_vector_within_union_rev rv 0ul cidx) val alloc_rid: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> rid:HST.erid -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ V.frameOf rv = rid /\ V.size_of rv = len /\ V.forall_all h1 rv (fun r -> Rgl?.r_alloc_p rg r) /\ S.equal (as_seq h1 rv) (S.create (U32.v len) (Ghost.reveal (Rgl?.irepr rg))))) let alloc_rid #a #rst rg len rid = let vec = V.alloc_rid len (rg_dummy rg) rid in alloc_ #a #rst #rg vec len; V.loc_vector_within_included vec 0ul len; vec val alloc_reserve: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> rid:HST.erid -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ V.frameOf rv = rid /\ V.size_of rv = 0ul /\ S.equal (as_seq h1 rv) S.empty /\ Set.equal (Map.domain (HS.get_hmap h0)) (Map.domain (HS.get_hmap h1)) /\	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> len: LowStar.Vector.uint32_t{len > 0ul} -> rid: FStar.HyperStack.ST.erid -> FStar.HyperStack.ST.ST (LowStar.RVector.rvector rg)	FStar.HyperStack.ST.ST	[]	[]	[ "LowStar.Regional.regional", "LowStar.Vector.uint32_t", "Prims.b2t", "FStar.Integers.op_Greater", "FStar.Integers.Unsigned", "FStar.Integers.W32", "FStar.UInt32.__uint_to_t", "FStar.HyperStack.ST.erid", "LowStar.Vector.alloc_reserve", "LowStar.Regional.rg_dummy", "LowStar.Vector.vector", "LowStar.RVector.rvector" ]	[]	false	true	false	false	false	let alloc_reserve #a #rst rg len rid =	V.alloc_reserve len (rg_dummy rg) rid	false
Vale.AES.X64.GHash.fst	Vale.AES.X64.GHash.va_code_Compute_Y0	val va_code_Compute_Y0 : va_dummy:unit -> Tot va_code	val va_code_Compute_Y0 : va_dummy:unit -> Tot va_code	let va_code_Compute_Y0 () = (va_Block (va_CCons (va_code_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_CNil ())))	{ "file_name": "obj/Vale.AES.X64.GHash.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 87, "end_line": 34, "start_col": 0, "start_line": 33 }	module Vale.AES.X64.GHash open Vale.Def.Opaque_s open FStar.Seq open Vale.Def.Words_s open Vale.Def.Types_s open Vale.Arch.Types open Vale.AES.AES_s open Vale.AES.GHash_s open Vale.AES.GHash open Vale.AES.GF128_s open Vale.AES.GF128 open Vale.AES.GCTR_s open Vale.AES.GCM_helpers open Vale.Math.Poly2_s open Vale.Poly1305.Math open Vale.AES.X64.GF128_Mul open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsVector open Vale.X64.InsAes open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.X64.CPU_Features_s #reset-options "--z3rlimit 30" //-- Compute_Y0 val va_code_Compute_Y0 : va_dummy:unit -> Tot va_code	{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsVector.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.InsAes.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Poly1305.Math.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Opaque_s.fsti.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.X64.GF128_Mul.fsti.checked", "Vale.AES.GHash_s.fst.checked", "Vale.AES.GHash.fsti.checked", "Vale.AES.GF128_s.fsti.checked", "Vale.AES.GF128.fsti.checked", "Vale.AES.GCTR_s.fst.checked", "Vale.AES.GCM_helpers.fsti.checked", "Vale.AES.AES_s.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": true, "source_file": "Vale.AES.X64.GHash.fst" }	[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.GF128_Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Poly1305.Math", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.GF128_Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Poly1305.Math", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 30, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	va_dummy: Prims.unit -> Vale.X64.Decls.va_code	Prims.Tot	[ "total" ]	[]	[ "Prims.unit", "Vale.X64.Decls.va_Block", "Vale.X64.Decls.va_CCons", "Vale.X64.InsVector.va_code_Pxor", "Vale.X64.Decls.va_op_xmm_xmm", "Vale.X64.Decls.va_CNil", "Vale.X64.Decls.va_code" ]	[]	false	false	false	true	false	let va_code_Compute_Y0 () =	(va_Block (va_CCons (va_code_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_CNil ())))	false
LowStar.RVector.fst	LowStar.RVector.as_seq_seq_index	val as_seq_seq_index: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{k < j - i} -> Lemma (requires true) (ensures (S.index (as_seq_seq rg h rs i j) k == Rgl?.r_repr rg h (S.index rs (i + k)))) (decreases j) [SMTPat (S.index (as_seq_seq rg h rs i j) k)]	val as_seq_seq_index: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{k < j - i} -> Lemma (requires true) (ensures (S.index (as_seq_seq rg h rs i j) k == Rgl?.r_repr rg h (S.index rs (i + k)))) (decreases j) [SMTPat (S.index (as_seq_seq rg h rs i j) k)]	let rec as_seq_seq_index #a #rst rg h rs i j k = if i = j then () else if k = j - i - 1 then () else as_seq_seq_index rg h rs i (j - 1) k	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 43, "end_line": 555, "start_col": 0, "start_line": 552 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv)) let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /// Representation val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j) let rec as_seq_seq #a #rst rg h rs i j = if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1))) val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i}) (decreases (U32.v j)) let as_seq_sub #a #rst #rg h rv i j = as_seq_seq rg h (V.as_seq h rv) (U32.v i) (U32.v j) val as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v (V.size_of rv)}) let as_seq #a #rst #rg h rv = as_seq_sub h rv 0ul (V.size_of rv) val as_seq_sub_as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> Lemma (S.equal (as_seq_sub h rv 0ul (V.size_of rv)) (as_seq h rv)) [SMTPat (as_seq_sub h rv 0ul (V.size_of rv))] let as_seq_sub_as_seq #a #rst #rg h rv = () val as_seq_seq_index: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{k < j - i} -> Lemma (requires true) (ensures (S.index (as_seq_seq rg h rs i j) k == Rgl?.r_repr rg h (S.index rs (i + k)))) (decreases j)	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> h: FStar.Monotonic.HyperStack.mem -> rs: FStar.Seq.Base.seq a -> i: FStar.Integers.nat -> j: FStar.Integers.nat {i <= j /\ j <= FStar.Seq.Base.length rs /\ LowStar.RVector.rs_elems_inv rg h rs i j} -> k: FStar.Integers.nat{k < j - i} -> FStar.Pervasives.Lemma (requires true) (ensures FStar.Seq.Base.index (LowStar.RVector.as_seq_seq rg h rs i j) k == Rgl?.r_repr rg h (FStar.Seq.Base.index rs (i + k))) (decreases j) [SMTPat (FStar.Seq.Base.index (LowStar.RVector.as_seq_seq rg h rs i j) k)]	FStar.Pervasives.Lemma	[ "lemma", "" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "FStar.Seq.Base.seq", "FStar.Integers.nat", "Prims.l_and", "Prims.b2t", "FStar.Integers.op_Less_Equals", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.Seq.Base.length", "LowStar.RVector.rs_elems_inv", "FStar.Integers.op_Less", "FStar.Integers.op_Subtraction", "Prims.op_Equality", "Prims.bool", "FStar.Integers.int_t", "LowStar.RVector.as_seq_seq_index", "Prims.unit" ]	[ "recursion" ]	false	false	true	false	false	let rec as_seq_seq_index #a #rst rg h rs i j k =	if i = j then () else if k = j - i - 1 then () else as_seq_seq_index rg h rs i (j - 1) k	false
Vale.AES.X64.GHash.fst	Vale.AES.X64.GHash.va_codegen_success_Compute_Y0	val va_codegen_success_Compute_Y0 : va_dummy:unit -> Tot va_pbool	val va_codegen_success_Compute_Y0 : va_dummy:unit -> Tot va_pbool	let va_codegen_success_Compute_Y0 () = (va_pbool_and (va_codegen_success_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_ttrue ()))	{ "file_name": "obj/Vale.AES.X64.GHash.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 92, "end_line": 39, "start_col": 0, "start_line": 38 }	module Vale.AES.X64.GHash open Vale.Def.Opaque_s open FStar.Seq open Vale.Def.Words_s open Vale.Def.Types_s open Vale.Arch.Types open Vale.AES.AES_s open Vale.AES.GHash_s open Vale.AES.GHash open Vale.AES.GF128_s open Vale.AES.GF128 open Vale.AES.GCTR_s open Vale.AES.GCM_helpers open Vale.Math.Poly2_s open Vale.Poly1305.Math open Vale.AES.X64.GF128_Mul open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsVector open Vale.X64.InsAes open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.X64.CPU_Features_s #reset-options "--z3rlimit 30" //-- Compute_Y0 val va_code_Compute_Y0 : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Compute_Y0 () = (va_Block (va_CCons (va_code_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_CNil ()))) val va_codegen_success_Compute_Y0 : va_dummy:unit -> Tot va_pbool	{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsVector.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.InsAes.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Poly1305.Math.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Opaque_s.fsti.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.X64.GF128_Mul.fsti.checked", "Vale.AES.GHash_s.fst.checked", "Vale.AES.GHash.fsti.checked", "Vale.AES.GF128_s.fsti.checked", "Vale.AES.GF128.fsti.checked", "Vale.AES.GCTR_s.fst.checked", "Vale.AES.GCM_helpers.fsti.checked", "Vale.AES.AES_s.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": true, "source_file": "Vale.AES.X64.GHash.fst" }	[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.GF128_Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Poly1305.Math", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.GF128_Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Poly1305.Math", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 30, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	va_dummy: Prims.unit -> Vale.X64.Decls.va_pbool	Prims.Tot	[ "total" ]	[]	[ "Prims.unit", "Vale.X64.Decls.va_pbool_and", "Vale.X64.InsVector.va_codegen_success_Pxor", "Vale.X64.Decls.va_op_xmm_xmm", "Vale.X64.Decls.va_ttrue", "Vale.X64.Decls.va_pbool" ]	[]	false	false	false	true	false	let va_codegen_success_Compute_Y0 () =	(va_pbool_and (va_codegen_success_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_ttrue ()))	false
LowStar.RVector.fst	LowStar.RVector.as_seq_seq_preserved	val as_seq_seq_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv_preserved rg rs i j p h0 h1; S.equal (as_seq_seq rg h0 rs i j) (as_seq_seq rg h1 rs i j)))	val as_seq_seq_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv_preserved rg rs i j p h0 h1; S.equal (as_seq_seq rg h0 rs i j) (as_seq_seq rg h1 rs i j)))	let rec as_seq_seq_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; as_seq_seq_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1)	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 50, "end_line": 632, "start_col": 0, "start_line": 628 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv)) let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /// Representation val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j) let rec as_seq_seq #a #rst rg h rs i j = if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1))) val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i}) (decreases (U32.v j)) let as_seq_sub #a #rst #rg h rv i j = as_seq_seq rg h (V.as_seq h rv) (U32.v i) (U32.v j) val as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v (V.size_of rv)}) let as_seq #a #rst #rg h rv = as_seq_sub h rv 0ul (V.size_of rv) val as_seq_sub_as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> Lemma (S.equal (as_seq_sub h rv 0ul (V.size_of rv)) (as_seq h rv)) [SMTPat (as_seq_sub h rv 0ul (V.size_of rv))] let as_seq_sub_as_seq #a #rst #rg h rv = () val as_seq_seq_index: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{k < j - i} -> Lemma (requires true) (ensures (S.index (as_seq_seq rg h rs i j) k == Rgl?.r_repr rg h (S.index rs (i + k)))) (decreases j) [SMTPat (S.index (as_seq_seq rg h rs i j) k)] let rec as_seq_seq_index #a #rst rg h rs i j k = if i = j then () else if k = j - i - 1 then () else as_seq_seq_index rg h rs i (j - 1) k val as_seq_seq_eq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs1:S.seq a -> rs2:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs1 /\ rs_elems_inv rg h rs1 i j} -> k:nat -> l:nat{k <= l /\ l <= S.length rs2 /\ rs_elems_inv rg h rs2 k l} -> Lemma (requires (S.equal (S.slice rs1 i j) (S.slice rs2 k l))) (ensures (S.equal (as_seq_seq rg h rs1 i j) (as_seq_seq rg h rs2 k l))) let as_seq_seq_eq #a #rst rg h rs1 rs2 i j k l = assert (forall (a:nat{a < j - i}). S.index (as_seq_seq rg h rs1 i j) a == Rgl?.r_repr rg h (S.index rs1 (i + a))); assert (forall (a:nat{a < l - k}). S.index (as_seq_seq rg h rs2 k l) a == Rgl?.r_repr rg h (S.index rs2 (k + a))); assert (S.length (S.slice rs1 i j) = j - i); assert (S.length (S.slice rs2 k l) = l - k); assert (forall (a:nat{a < j - i}). S.index (S.slice rs1 i j) a == S.index (S.slice rs2 k l) a); assert (forall (a:nat{a < j - i}). S.index rs1 (i + a) == S.index rs2 (k + a)) val as_seq_seq_slice: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat -> l:nat{k <= l && l <= j - i} -> Lemma (S.equal (S.slice (as_seq_seq rg h rs i j) k l) (as_seq_seq rg h (S.slice rs (i + k) (i + l)) 0 (l - k))) #reset-options "--z3rlimit 10" let rec as_seq_seq_slice #a #rst rg h rs i j k l = if k = l then () else (as_seq_seq_slice rg h rs i j k (l - 1); as_seq_seq_index rg h rs i j (l - 1); as_seq_seq_eq rg h (S.slice rs (i + k) (i + l - 1)) (S.slice rs (i + k) (i + l)) 0 (l - k - 1) 0 (l - k - 1)) val as_seq_seq_upd: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{ i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{i <= k && k < j} -> v:a{rg_inv rg h v} -> Lemma (S.equal (as_seq_seq rg h (S.upd rs k v) i j) (S.upd (as_seq_seq rg h rs i j) (k - i) (Rgl?.r_repr rg h v))) let rec as_seq_seq_upd #a #rst rg h rs i j k v = if i = j then () else if k = j - 1 then () else as_seq_seq_upd rg h rs i (j - 1) k v // Preservation based on disjointness val as_seq_seq_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv_preserved rg rs i j p h0 h1; S.equal (as_seq_seq rg h0 rs i j)	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 10, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> rs: FStar.Seq.Base.seq a -> i: FStar.Integers.nat -> j: FStar.Integers.nat{i <= j && j <= FStar.Seq.Base.length rs} -> p: LowStar.Monotonic.Buffer.loc -> h0: FStar.Monotonic.HyperStack.mem -> h1: FStar.Monotonic.HyperStack.mem -> FStar.Pervasives.Lemma (requires LowStar.RVector.rs_elems_inv rg h0 rs i j /\ LowStar.Monotonic.Buffer.loc_disjoint p (LowStar.RVector.rs_loc_elems rg rs i j) /\ LowStar.Monotonic.Buffer.modifies p h0 h1) (ensures (LowStar.RVector.rs_elems_inv_preserved rg rs i j p h0 h1; FStar.Seq.Base.equal (LowStar.RVector.as_seq_seq rg h0 rs i j) (LowStar.RVector.as_seq_seq rg h1 rs i j)))	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "FStar.Seq.Base.seq", "FStar.Integers.nat", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.Seq.Base.length", "LowStar.Monotonic.Buffer.loc", "FStar.Monotonic.HyperStack.mem", "Prims.op_Equality", "Prims.bool", "LowStar.Regional.__proj__Rgl__item__r_sep", "FStar.Seq.Base.index", "FStar.Integers.op_Subtraction", "Prims.unit", "LowStar.RVector.as_seq_seq_preserved", "LowStar.RVector.rs_elems_inv_preserved" ]	[ "recursion" ]	false	false	true	false	false	let rec as_seq_seq_preserved #a #rst rg rs i j p h0 h1 =	if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; as_seq_seq_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1)	false
Vale.AES.X64.GHash.fst	Vale.AES.X64.GHash.va_wp_ReduceMul128_LE	val va_wp_ReduceMul128_LE (a b: poly) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_ReduceMul128_LE (a b: poly) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_ReduceMul128_LE (a:poly) (b:poly) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (pclmulqdq_enabled /\ avx_enabled /\ sse_enabled /\ Vale.Math.Poly2_s.degree a <= 127 /\ Vale.Math.Poly2_s.degree b <= 127 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 a) /\ va_get_xmm 2 va_s0 == Vale.AES.GF128_s.gf128_to_quad32 b /\ va_get_xmm 8 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051) /\ (forall (va_x_efl:Vale.X64.Flags.t) (va_x_r12:nat64) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) . let va_sM = va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_reg64 rR12 va_x_r12 (va_upd_flags va_x_efl va_s0))))))) in va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 (Vale.AES.GF128_s.gf128_mul a b)) ==> va_k va_sM (())))	{ "file_name": "obj/Vale.AES.X64.GHash.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 59, "end_line": 171, "start_col": 0, "start_line": 158 }	module Vale.AES.X64.GHash open Vale.Def.Opaque_s open FStar.Seq open Vale.Def.Words_s open Vale.Def.Types_s open Vale.Arch.Types open Vale.AES.AES_s open Vale.AES.GHash_s open Vale.AES.GHash open Vale.AES.GF128_s open Vale.AES.GF128 open Vale.AES.GCTR_s open Vale.AES.GCM_helpers open Vale.Math.Poly2_s open Vale.Poly1305.Math open Vale.AES.X64.GF128_Mul open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsVector open Vale.X64.InsAes open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.X64.CPU_Features_s #reset-options "--z3rlimit 30" //-- Compute_Y0 val va_code_Compute_Y0 : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Compute_Y0 () = (va_Block (va_CCons (va_code_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_CNil ()))) val va_codegen_success_Compute_Y0 : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Compute_Y0 () = (va_pbool_and (va_codegen_success_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Compute_Y0 (va_mods:va_mods_t) : (va_quickCode unit (va_code_Compute_Y0 ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QBind va_range1 "*** PRECONDITION NOT MET AT line 83 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "* PRECONDITION NOT MET AT line 84 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (fun (_:unit) -> Vale.Arch.Types.lemma_quad32_xor ()) (va_QEmpty (()))))) val va_lemma_Compute_Y0 : va_b0:va_code -> va_s0:va_state -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Compute_Y0 ()) va_s0 /\ va_get_ok va_s0 /\ sse_enabled)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM va_s0))))) [@"opaque_to_smt"] let va_lemma_Compute_Y0 va_b0 va_s0 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 1; va_Mod_ok] in let va_qc = va_qcode_Compute_Y0 va_mods in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Compute_Y0 ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "* POSTCONDITION NOT MET AT line 77 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_get_ok va_sM) /\ label va_range1 "* POSTCONDITION NOT MET AT line 81 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 1; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Compute_Y0 (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ sse_enabled /\ (forall (va_x_xmm1:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 1 va_x_xmm1 va_s0) in va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 ==> va_k va_sM (()))) val va_wpProof_Compute_Y0 : va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Compute_Y0 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Compute_Y0 ()) ([va_Mod_flags; va_Mod_xmm 1]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Compute_Y0 va_s0 va_k = let (va_sM, va_f0) = va_lemma_Compute_Y0 (va_code_Compute_Y0 ()) va_s0 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM va_s0)))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 1]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Compute_Y0 () : (va_quickCode unit (va_code_Compute_Y0 ())) = (va_QProc (va_code_Compute_Y0 ()) ([va_Mod_flags; va_Mod_xmm 1]) va_wp_Compute_Y0 va_wpProof_Compute_Y0) //-- //-- ReduceMul128_LE val va_code_ReduceMul128_LE : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_ReduceMul128_LE () = (va_Block (va_CCons (va_code_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_CCons (va_code_ReduceMulRev128 ()) (va_CCons (va_code_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_CNil ()))))) val va_codegen_success_ReduceMul128_LE : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_ReduceMul128_LE () = (va_pbool_and (va_codegen_success_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_pbool_and (va_codegen_success_ReduceMulRev128 ()) (va_pbool_and (va_codegen_success_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_ttrue ())))) [@ "opaque_to_smt" va_qattr] let va_qcode_ReduceMul128_LE (va_mods:va_mods_t) (a:poly) (b:poly) : (va_quickCode unit (va_code_ReduceMul128_LE ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "* PRECONDITION NOT MET AT line 104 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_QSeq va_range1 "* PRECONDITION NOT MET AT line 105 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_ReduceMulRev128 a b) (va_QSeq va_range1 "* PRECONDITION NOT MET AT line 106 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_QEmpty (())))))) val va_lemma_ReduceMul128_LE : va_b0:va_code -> va_s0:va_state -> a:poly -> b:poly -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_ReduceMul128_LE ()) va_s0 /\ va_get_ok va_s0 /\ (pclmulqdq_enabled /\ avx_enabled /\ sse_enabled /\ Vale.Math.Poly2_s.degree a <= 127 /\ Vale.Math.Poly2_s.degree b <= 127 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 a) /\ va_get_xmm 2 va_s0 == Vale.AES.GF128_s.gf128_to_quad32 b /\ va_get_xmm 8 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 (Vale.AES.GF128_s.gf128_mul a b)) /\ va_state_eq va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR12 va_sM (va_update_flags va_sM (va_update_ok va_sM va_s0))))))))))) [@"opaque_to_smt"] let va_lemma_ReduceMul128_LE va_b0 va_s0 a b = let (va_mods:va_mods_t) = [va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_flags; va_Mod_ok] in let va_qc = va_qcode_ReduceMul128_LE va_mods a b in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_ReduceMul128_LE ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "* POSTCONDITION NOT MET AT line 87 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_get_ok va_sM) /\ label va_range1 "* POSTCONDITION NOT MET AT line 102 column 71 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf ***" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 (Vale.AES.GF128_s.gf128_mul a b)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_flags; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM)	{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsVector.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.InsAes.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Poly1305.Math.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Opaque_s.fsti.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.X64.GF128_Mul.fsti.checked", "Vale.AES.GHash_s.fst.checked", "Vale.AES.GHash.fsti.checked", "Vale.AES.GF128_s.fsti.checked", "Vale.AES.GF128.fsti.checked", "Vale.AES.GCTR_s.fst.checked", "Vale.AES.GCM_helpers.fsti.checked", "Vale.AES.AES_s.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": true, "source_file": "Vale.AES.X64.GHash.fst" }	[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.GF128_Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Poly1305.Math", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.GF128_Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Poly1305.Math", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 30, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	a: Vale.Math.Poly2_s.poly -> b: Vale.Math.Poly2_s.poly -> va_s0: Vale.X64.Decls.va_state -> va_k: (_: Vale.X64.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.Math.Poly2_s.poly", "Vale.X64.Decls.va_state", "Prims.unit", "Prims.l_and", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Vale.X64.CPU_Features_s.pclmulqdq_enabled", "Vale.X64.CPU_Features_s.avx_enabled", "Vale.X64.CPU_Features_s.sse_enabled", "Prims.op_LessThanOrEqual", "Vale.Math.Poly2_s.degree", "Prims.eq2", "Vale.Def.Types_s.quad32", "Vale.X64.Decls.va_get_xmm", "Vale.Def.Types_s.reverse_bytes_quad32", "Vale.AES.GF128_s.gf128_to_quad32", "Vale.Def.Words_s.four", "Vale.Def.Types_s.nat32", "Vale.Def.Words_s.Mkfour", "Prims.l_Forall", "Vale.X64.Flags.t", "Vale.X64.Memory.nat64", "Vale.X64.Decls.quad32", "Prims.l_imp", "Vale.AES.GF128_s.gf128_mul", "Vale.X64.State.vale_state", "Vale.X64.Decls.va_upd_xmm", "Vale.X64.Decls.va_upd_reg64", "Vale.X64.Machine_s.rR12", "Vale.X64.Decls.va_upd_flags" ]	[]	false	false	false	true	true	let va_wp_ReduceMul128_LE (a b: poly) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_get_ok va_s0 /\ (pclmulqdq_enabled /\ avx_enabled /\ sse_enabled /\ Vale.Math.Poly2_s.degree a <= 127 /\ Vale.Math.Poly2_s.degree b <= 127 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 a) /\ va_get_xmm 2 va_s0 == Vale.AES.GF128_s.gf128_to_quad32 b /\ va_get_xmm 8 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051) /\ (forall (va_x_efl: Vale.X64.Flags.t) (va_x_r12: nat64) (va_x_xmm1: quad32) (va_x_xmm2: quad32) (va_x_xmm3: quad32) (va_x_xmm4: quad32) (va_x_xmm5: quad32) (va_x_xmm6: quad32). let va_sM = va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_reg64 rR12 va_x_r12 (va_upd_flags va_x_efl va_s0))))))) in va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 (Vale.AES.GF128_s.gf128_mul a b)) ==> va_k va_sM (())))	false
LowStar.RVector.fst	LowStar.RVector.as_seq_sub_preserved	val as_seq_sub_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ loc_disjoint p (V.loc_vector rv) /\ modifies p h0 h1)) (ensures (rv_elems_inv_preserved rv i j p h0 h1; S.equal (as_seq_sub h0 rv i j) (as_seq_sub h1 rv i j)))	val as_seq_sub_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ loc_disjoint p (V.loc_vector rv) /\ modifies p h0 h1)) (ensures (rv_elems_inv_preserved rv i j p h0 h1; S.equal (as_seq_sub h0 rv i j) (as_seq_sub h1 rv i j)))	let as_seq_sub_preserved #a #rst #rg rv i j p h0 h1 = as_seq_seq_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 70, "end_line": 648, "start_col": 0, "start_line": 647 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv)) let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /// Representation val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j) let rec as_seq_seq #a #rst rg h rs i j = if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1))) val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i}) (decreases (U32.v j)) let as_seq_sub #a #rst #rg h rv i j = as_seq_seq rg h (V.as_seq h rv) (U32.v i) (U32.v j) val as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v (V.size_of rv)}) let as_seq #a #rst #rg h rv = as_seq_sub h rv 0ul (V.size_of rv) val as_seq_sub_as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> Lemma (S.equal (as_seq_sub h rv 0ul (V.size_of rv)) (as_seq h rv)) [SMTPat (as_seq_sub h rv 0ul (V.size_of rv))] let as_seq_sub_as_seq #a #rst #rg h rv = () val as_seq_seq_index: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{k < j - i} -> Lemma (requires true) (ensures (S.index (as_seq_seq rg h rs i j) k == Rgl?.r_repr rg h (S.index rs (i + k)))) (decreases j) [SMTPat (S.index (as_seq_seq rg h rs i j) k)] let rec as_seq_seq_index #a #rst rg h rs i j k = if i = j then () else if k = j - i - 1 then () else as_seq_seq_index rg h rs i (j - 1) k val as_seq_seq_eq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs1:S.seq a -> rs2:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs1 /\ rs_elems_inv rg h rs1 i j} -> k:nat -> l:nat{k <= l /\ l <= S.length rs2 /\ rs_elems_inv rg h rs2 k l} -> Lemma (requires (S.equal (S.slice rs1 i j) (S.slice rs2 k l))) (ensures (S.equal (as_seq_seq rg h rs1 i j) (as_seq_seq rg h rs2 k l))) let as_seq_seq_eq #a #rst rg h rs1 rs2 i j k l = assert (forall (a:nat{a < j - i}). S.index (as_seq_seq rg h rs1 i j) a == Rgl?.r_repr rg h (S.index rs1 (i + a))); assert (forall (a:nat{a < l - k}). S.index (as_seq_seq rg h rs2 k l) a == Rgl?.r_repr rg h (S.index rs2 (k + a))); assert (S.length (S.slice rs1 i j) = j - i); assert (S.length (S.slice rs2 k l) = l - k); assert (forall (a:nat{a < j - i}). S.index (S.slice rs1 i j) a == S.index (S.slice rs2 k l) a); assert (forall (a:nat{a < j - i}). S.index rs1 (i + a) == S.index rs2 (k + a)) val as_seq_seq_slice: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat -> l:nat{k <= l && l <= j - i} -> Lemma (S.equal (S.slice (as_seq_seq rg h rs i j) k l) (as_seq_seq rg h (S.slice rs (i + k) (i + l)) 0 (l - k))) #reset-options "--z3rlimit 10" let rec as_seq_seq_slice #a #rst rg h rs i j k l = if k = l then () else (as_seq_seq_slice rg h rs i j k (l - 1); as_seq_seq_index rg h rs i j (l - 1); as_seq_seq_eq rg h (S.slice rs (i + k) (i + l - 1)) (S.slice rs (i + k) (i + l)) 0 (l - k - 1) 0 (l - k - 1)) val as_seq_seq_upd: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{ i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{i <= k && k < j} -> v:a{rg_inv rg h v} -> Lemma (S.equal (as_seq_seq rg h (S.upd rs k v) i j) (S.upd (as_seq_seq rg h rs i j) (k - i) (Rgl?.r_repr rg h v))) let rec as_seq_seq_upd #a #rst rg h rs i j k v = if i = j then () else if k = j - 1 then () else as_seq_seq_upd rg h rs i (j - 1) k v // Preservation based on disjointness val as_seq_seq_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv_preserved rg rs i j p h0 h1; S.equal (as_seq_seq rg h0 rs i j) (as_seq_seq rg h1 rs i j))) let rec as_seq_seq_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; as_seq_seq_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val as_seq_sub_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ loc_disjoint p (V.loc_vector rv) /\ modifies p h0 h1)) (ensures (rv_elems_inv_preserved rv i j p h0 h1; S.equal (as_seq_sub h0 rv i j)	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 10, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rv: LowStar.RVector.rvector rg -> i: LowStar.Vector.uint32_t -> j: LowStar.Vector.uint32_t{i <= j && j <= LowStar.Vector.size_of rv} -> p: LowStar.Monotonic.Buffer.loc -> h0: FStar.Monotonic.HyperStack.mem -> h1: FStar.Monotonic.HyperStack.mem -> FStar.Pervasives.Lemma (requires LowStar.Vector.live h0 rv /\ LowStar.RVector.rv_elems_inv h0 rv i j /\ LowStar.Monotonic.Buffer.loc_disjoint p (LowStar.RVector.rv_loc_elems h0 rv i j) /\ LowStar.Monotonic.Buffer.loc_disjoint p (LowStar.Vector.loc_vector rv) /\ LowStar.Monotonic.Buffer.modifies p h0 h1) (ensures (LowStar.RVector.rv_elems_inv_preserved rv i j p h0 h1; FStar.Seq.Base.equal (LowStar.RVector.as_seq_sub h0 rv i j) (LowStar.RVector.as_seq_sub h1 rv i j)))	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "LowStar.RVector.rvector", "LowStar.Vector.uint32_t", "Prims.b2t", "Prims.op_AmpAmp", "FStar.Integers.op_Less_Equals", "FStar.Integers.Unsigned", "FStar.Integers.W32", "LowStar.Vector.size_of", "LowStar.Monotonic.Buffer.loc", "FStar.Monotonic.HyperStack.mem", "LowStar.RVector.as_seq_seq_preserved", "LowStar.Vector.as_seq", "FStar.UInt32.v", "Prims.unit" ]	[]	true	false	true	false	false	let as_seq_sub_preserved #a #rst #rg rv i j p h0 h1 =	as_seq_seq_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1	false
Hacl.Impl.P256.Verify.fst	Hacl.Impl.P256.Verify.ecdsa_verify_msg_as_qelem	val ecdsa_verify_msg_as_qelem: m_q:felem -> public_key:lbuffer uint8 64ul -> signature_r:lbuffer uint8 32ul -> signature_s:lbuffer uint8 32ul -> Stack bool (requires fun h -> live h public_key /\ live h signature_r /\ live h signature_s /\ live h m_q /\ as_nat h m_q < S.order) (ensures fun h0 result h1 -> modifies0 h0 h1 /\ result == S.ecdsa_verify_msg_as_qelem (as_nat h0 m_q) (as_seq h0 public_key) (as_seq h0 signature_r) (as_seq h0 signature_s))	val ecdsa_verify_msg_as_qelem: m_q:felem -> public_key:lbuffer uint8 64ul -> signature_r:lbuffer uint8 32ul -> signature_s:lbuffer uint8 32ul -> Stack bool (requires fun h -> live h public_key /\ live h signature_r /\ live h signature_s /\ live h m_q /\ as_nat h m_q < S.order) (ensures fun h0 result h1 -> modifies0 h0 h1 /\ result == S.ecdsa_verify_msg_as_qelem (as_nat h0 m_q) (as_seq h0 public_key) (as_seq h0 signature_r) (as_seq h0 signature_s))	let ecdsa_verify_msg_as_qelem m_q public_key signature_r signature_s = push_frame (); let tmp = create 28ul (u64 0) in let pk = sub tmp 0ul 12ul in let r_q = sub tmp 12ul 4ul in let s_q = sub tmp 16ul 4ul in let u1 = sub tmp 20ul 4ul in let u2 = sub tmp 24ul 4ul in let is_pk_valid = load_point_vartime pk public_key in let is_rs_valid = load_signature r_q s_q signature_r signature_s in let res = if not (is_pk_valid && is_rs_valid) then false else begin ecdsa_verification_get_u12 u1 u2 r_q s_q m_q; ecdsa_verification_cmpr r_q pk u1 u2 end in pop_frame (); res	{ "file_name": "code/ecdsap256/Hacl.Impl.P256.Verify.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 5, "end_line": 188, "start_col": 0, "start_line": 170 }	module Hacl.Impl.P256.Verify open FStar.Mul open FStar.HyperStack.All open FStar.HyperStack module ST = FStar.HyperStack.ST open Lib.IntTypes open Lib.Buffer open Hacl.Impl.P256.Bignum open Hacl.Impl.P256.Point open Hacl.Impl.P256.Scalar open Hacl.Impl.P256.PointMul module BSeq = Lib.ByteSequence module S = Spec.P256 module SL = Spec.P256.Lemmas module SM = Hacl.Spec.P256.Montgomery module QI = Hacl.Impl.P256.Qinv #set-options "--z3rlimit 50 --fuel 0 --ifuel 0" inline_for_extraction noextract let lbytes len = lbuffer uint8 len val qmul_mont: sinv:felem -> b:felem -> res:felem -> Stack unit (requires fun h -> live h sinv /\ live h b /\ live h res /\ disjoint sinv res /\ disjoint b res /\ as_nat h sinv < S.order /\ as_nat h b < S.order) (ensures fun h0 _ h1 -> modifies (loc res) h0 h1 /\ as_nat h1 res < S.order /\ as_nat h1 res = (as_nat h0 sinv * SM.from_qmont (as_nat h0 b) * SM.qmont_R_inv) % S.order) [@CInline] let qmul_mont sinv b res = let h0 = ST.get () in push_frame (); let tmp = create_felem () in from_qmont tmp b; let h1 = ST.get () in assert (as_nat h1 tmp == SM.from_qmont (as_nat h0 b)); qmul res sinv tmp; let h2 = ST.get () in assert (as_nat h2 res = (as_nat h1 sinv * as_nat h1 tmp * SM.qmont_R_inv) % S.order); pop_frame () inline_for_extraction noextract val ecdsa_verification_get_u12: u1:felem -> u2:felem -> r:felem -> s:felem -> z:felem -> Stack unit (requires fun h -> live h r /\ live h s /\ live h z /\ live h u1 /\ live h u2 /\ disjoint u1 u2 /\ disjoint u1 z /\ disjoint u1 r /\ disjoint u1 s /\ disjoint u2 z /\ disjoint u2 r /\ disjoint u2 s /\ as_nat h s < S.order /\ as_nat h z < S.order /\ as_nat h r < S.order) (ensures fun h0 _ h1 -> modifies (loc u1 \|+\| loc u2) h0 h1 /\ (let sinv = S.qinv (as_nat h0 s) in as_nat h1 u1 == sinv * as_nat h0 z % S.order /\ as_nat h1 u2 == sinv * as_nat h0 r % S.order)) let ecdsa_verification_get_u12 u1 u2 r s z = push_frame (); let h0 = ST.get () in let sinv = create_felem () in QI.qinv sinv s; let h1 = ST.get () in assert (qmont_as_nat h1 sinv == S.qinv (qmont_as_nat h0 s)); //assert (as_nat h2 sinv * SM.qmont_R_inv % S.order == //S.qinv (as_nat h1 sinv * SM.qmont_R_inv % S.order)); SM.qmont_inv_mul_lemma (as_nat h0 s) (as_nat h1 sinv) (as_nat h0 z); SM.qmont_inv_mul_lemma (as_nat h0 s) (as_nat h1 sinv) (as_nat h0 r); qmul_mont sinv z u1; qmul_mont sinv r u2; pop_frame () inline_for_extraction noextract val ecdsa_verify_finv: p:point -> r:felem -> Stack bool (requires fun h -> live h p /\ live h r /\ disjoint p r /\ point_inv h p /\ 0 < as_nat h r /\ as_nat h r < S.order) //not (S.is_point_at_inf (from_mont_point (as_point_nat h p)))) (ensures fun h0 b h1 -> modifies0 h0 h1 /\ (let (_X, _Y, _Z) = from_mont_point (as_point_nat h0 p) in b <==> (S.fmul _X (S.finv _Z) % S.order = as_nat h0 r))) let ecdsa_verify_finv p r_q = push_frame (); let x = create_felem () in to_aff_point_x x p; qmod_short x x; let res = bn_is_eq_vartime4 x r_q in pop_frame (); res inline_for_extraction noextract val ecdsa_verification_cmpr: r:felem -> pk:point -> u1:felem -> u2:felem -> Stack bool (requires fun h -> live h r /\ live h pk /\ live h u1 /\ live h u2 /\ disjoint r u1 /\ disjoint r u2 /\ disjoint r pk /\ disjoint pk u1 /\ disjoint pk u2 /\ point_inv h pk /\ as_nat h u1 < S.order /\ as_nat h u2 < S.order /\ 0 < as_nat h r /\ as_nat h r < S.order) (ensures fun h0 b h1 -> modifies0 h0 h1 /\ (let _X, _Y, _Z = S.point_mul_double_g (as_nat h0 u1) (as_nat h0 u2) (from_mont_point (as_point_nat h0 pk)) in b <==> (if S.is_point_at_inf (_X, _Y, _Z) then false else S.fmul _X (S.finv _Z) % S.order = as_nat h0 r))) let ecdsa_verification_cmpr r pk u1 u2 = push_frame (); let res = create_point () in let h0 = ST.get () in point_mul_double_g res u1 u2 pk; let h1 = ST.get () in assert (S.to_aff_point (from_mont_point (as_point_nat h1 res)) == S.to_aff_point (S.point_mul_double_g (as_nat h0 u1) (as_nat h0 u2) (from_mont_point (as_point_nat h0 pk)))); SL.lemma_aff_is_point_at_inf (from_mont_point (as_point_nat h1 res)); SL.lemma_aff_is_point_at_inf (S.point_mul_double_g (as_nat h0 u1) (as_nat h0 u2) (from_mont_point (as_point_nat h0 pk))); let b = if is_point_at_inf_vartime res then false else ecdsa_verify_finv res r in pop_frame (); b inline_for_extraction noextract val load_signature (r_q s_q:felem) (sign_r sign_s:lbytes 32ul) : Stack bool (requires fun h -> live h sign_r /\ live h sign_s /\ live h r_q /\ live h s_q /\ disjoint r_q s_q /\ disjoint r_q sign_r /\ disjoint r_q sign_s /\ disjoint s_q sign_r /\ disjoint s_q sign_s) (ensures fun h0 res h1 -> modifies (loc r_q \|+\| loc s_q) h0 h1 /\ (let r_q_nat = BSeq.nat_from_bytes_be (as_seq h0 sign_r) in let s_q_nat = BSeq.nat_from_bytes_be (as_seq h0 sign_s) in as_nat h1 r_q = r_q_nat /\ as_nat h1 s_q = s_q_nat /\ res == (0 < r_q_nat && r_q_nat < S.order && 0 < s_q_nat && s_q_nat < S.order))) let load_signature r_q s_q sign_r sign_s = bn_from_bytes_be4 r_q sign_r; bn_from_bytes_be4 s_q sign_s; let is_r_valid = bn_is_lt_order_and_gt_zero_mask4 r_q in let is_s_valid = bn_is_lt_order_and_gt_zero_mask4 s_q in Hacl.Bignum.Base.unsafe_bool_of_limb is_r_valid && Hacl.Bignum.Base.unsafe_bool_of_limb is_s_valid val ecdsa_verify_msg_as_qelem: m_q:felem -> public_key:lbuffer uint8 64ul -> signature_r:lbuffer uint8 32ul -> signature_s:lbuffer uint8 32ul -> Stack bool (requires fun h -> live h public_key /\ live h signature_r /\ live h signature_s /\ live h m_q /\ as_nat h m_q < S.order) (ensures fun h0 result h1 -> modifies0 h0 h1 /\ result == S.ecdsa_verify_msg_as_qelem (as_nat h0 m_q) (as_seq h0 public_key) (as_seq h0 signature_r) (as_seq h0 signature_s))	{ "checked_file": "/", "dependencies": [ "Spec.P256.Lemmas.fsti.checked", "Spec.P256.fst.checked", "prims.fst.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.P256.Montgomery.fsti.checked", "Hacl.Impl.P256.Scalar.fsti.checked", "Hacl.Impl.P256.Qinv.fsti.checked", "Hacl.Impl.P256.PointMul.fsti.checked", "Hacl.Impl.P256.Point.fsti.checked", "Hacl.Impl.P256.Bignum.fsti.checked", "Hacl.Bignum.Base.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.P256.Verify.fst" }	[ { "abbrev": true, "full_module": "Hacl.Impl.P256.Qinv", "short_module": "QI" }, { "abbrev": true, "full_module": "Hacl.Spec.P256.Montgomery", "short_module": "SM" }, { "abbrev": true, "full_module": "Spec.P256.Lemmas", "short_module": "SL" }, { "abbrev": true, "full_module": "Spec.P256", "short_module": "S" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": false, "full_module": "Hacl.Impl.P256.PointMul", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.P256.Scalar", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.P256.Point", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.P256.Bignum", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.P256", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.P256", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 50, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	m_q: Hacl.Impl.P256.Bignum.felem -> public_key: Lib.Buffer.lbuffer Lib.IntTypes.uint8 64ul -> signature_r: Lib.Buffer.lbuffer Lib.IntTypes.uint8 32ul -> signature_s: Lib.Buffer.lbuffer Lib.IntTypes.uint8 32ul -> FStar.HyperStack.ST.Stack Prims.bool	FStar.HyperStack.ST.Stack	[]	[]	[ "Hacl.Impl.P256.Bignum.felem", "Lib.Buffer.lbuffer", "Lib.IntTypes.uint8", "FStar.UInt32.__uint_to_t", "Prims.bool", "Prims.unit", "FStar.HyperStack.ST.pop_frame", "Prims.op_Negation", "Prims.op_AmpAmp", "Hacl.Impl.P256.Verify.ecdsa_verification_cmpr", "Hacl.Impl.P256.Verify.ecdsa_verification_get_u12", "Hacl.Impl.P256.Verify.load_signature", "Hacl.Impl.P256.Point.load_point_vartime", "Lib.Buffer.lbuffer_t", "Lib.Buffer.MUT", "Lib.IntTypes.int_t", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "FStar.UInt32.uint_to_t", "FStar.UInt32.t", "Lib.Buffer.sub", "Lib.IntTypes.uint64", "Lib.Buffer.create", "Lib.IntTypes.u64", "FStar.HyperStack.ST.push_frame" ]	[]	false	true	false	false	false	let ecdsa_verify_msg_as_qelem m_q public_key signature_r signature_s =	push_frame (); let tmp = create 28ul (u64 0) in let pk = sub tmp 0ul 12ul in let r_q = sub tmp 12ul 4ul in let s_q = sub tmp 16ul 4ul in let u1 = sub tmp 20ul 4ul in let u2 = sub tmp 24ul 4ul in let is_pk_valid = load_point_vartime pk public_key in let is_rs_valid = load_signature r_q s_q signature_r signature_s in let res = if not (is_pk_valid && is_rs_valid) then false else (ecdsa_verification_get_u12 u1 u2 r_q s_q m_q; ecdsa_verification_cmpr r_q pk u1 u2) in pop_frame (); res	false
Hacl.K256.PrecompTable.fst	Hacl.K256.PrecompTable.precomp_basepoint_table_lseq_w5	val precomp_basepoint_table_lseq_w5 : LSeq.lseq uint64 480	val precomp_basepoint_table_lseq_w5 : LSeq.lseq uint64 480	let precomp_basepoint_table_lseq_w5 : LSeq.lseq uint64 480 = normalize_term_spec (SPT.precomp_base_table_list mk_k256_precomp_base_table S.g 31); Seq.seq_of_list precomp_basepoint_table_list_w5	{ "file_name": "code/k256/Hacl.K256.PrecompTable.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 49, "end_line": 287, "start_col": 0, "start_line": 285 }	module Hacl.K256.PrecompTable open FStar.HyperStack open FStar.HyperStack.ST open FStar.Mul open Lib.IntTypes open Lib.Buffer module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module LE = Lib.Exponentiation module SE = Spec.Exponentiation module SPT = Hacl.Spec.PrecompBaseTable module SPT256 = Hacl.Spec.PrecompBaseTable256 module SPTK = Hacl.Spec.K256.PrecompTable module S = Spec.K256 module SL = Spec.K256.Lemmas open Hacl.Impl.K256.Point include Hacl.Impl.K256.Group #set-options "--z3rlimit 50 --fuel 0 --ifuel 0" let proj_point_to_list p = SPTK.proj_point_to_list_lemma p; SPTK.proj_point_to_list p let lemma_refl x = SPTK.proj_point_to_list_lemma x //----------------- inline_for_extraction noextract let proj_g_pow2_64 : S.proj_point = [@inline_let] let rX : S.felem = 0x46ec0aa60b0b98c37b29371784676ad967b7beb1a941ddb6fbbff95b44cb788b in [@inline_let] let rY : S.felem = 0x6b946755bbc6b677576579c990a1ccf14a710545251a1428fabbf02f40268e63 in [@inline_let] let rZ : S.felem = 0x3c114b2ac17c199ec9eba9f7cc64dc459ca2e53f5bbead2b4e618b318ffcc00e in (rX, rY, rZ) val lemma_proj_g_pow2_64_eval : unit -> Lemma (SE.exp_pow2 S.mk_k256_concrete_ops S.g 64 == proj_g_pow2_64) let lemma_proj_g_pow2_64_eval () = SPT256.exp_pow2_rec_is_exp_pow2 S.mk_k256_concrete_ops S.g 64; let qX, qY, qZ = normalize_term (SPT256.exp_pow2_rec S.mk_k256_concrete_ops S.g 64) in normalize_term_spec (SPT256.exp_pow2_rec S.mk_k256_concrete_ops S.g 64); let rX : S.felem = 0x46ec0aa60b0b98c37b29371784676ad967b7beb1a941ddb6fbbff95b44cb788b in let rY : S.felem = 0x6b946755bbc6b677576579c990a1ccf14a710545251a1428fabbf02f40268e63 in let rZ : S.felem = 0x3c114b2ac17c199ec9eba9f7cc64dc459ca2e53f5bbead2b4e618b318ffcc00e in assert_norm (qX == rX /\ qY == rY /\ qZ == rZ) inline_for_extraction noextract let proj_g_pow2_128 : S.proj_point = [@inline_let] let rX : S.felem = 0x98299efbc8e459915404ae015b48cac3b929e0158665f3c7fa5489fbd25c4297 in [@inline_let] let rY : S.felem = 0xf1e5cbc9579e7d11a31681e947c2959ae0298a006d1c06ab1ad93d6716ea50cc in [@inline_let] let rZ : S.felem = 0x5c53ffe15001674a2eacb60c9327a8b0ddbd93a0fa6d90309de6cc124133938b in (rX, rY, rZ) val lemma_proj_g_pow2_128_eval : unit -> Lemma (SE.exp_pow2 S.mk_k256_concrete_ops proj_g_pow2_64 64 == proj_g_pow2_128) let lemma_proj_g_pow2_128_eval () = SPT256.exp_pow2_rec_is_exp_pow2 S.mk_k256_concrete_ops proj_g_pow2_64 64; let qX, qY, qZ = normalize_term (SPT256.exp_pow2_rec S.mk_k256_concrete_ops proj_g_pow2_64 64) in normalize_term_spec (SPT256.exp_pow2_rec S.mk_k256_concrete_ops proj_g_pow2_64 64); let rX : S.felem = 0x98299efbc8e459915404ae015b48cac3b929e0158665f3c7fa5489fbd25c4297 in let rY : S.felem = 0xf1e5cbc9579e7d11a31681e947c2959ae0298a006d1c06ab1ad93d6716ea50cc in let rZ : S.felem = 0x5c53ffe15001674a2eacb60c9327a8b0ddbd93a0fa6d90309de6cc124133938b in assert_norm (qX == rX /\ qY == rY /\ qZ == rZ) inline_for_extraction noextract let proj_g_pow2_192 : S.proj_point = [@inline_let] let rX : S.felem = 0xbd382b67d20492b1480ca58a6d7d617ba413a9bc7c2f1cff51301ef960fb245c in [@inline_let] let rY : S.felem = 0x0b232afcf692673aa714357c524c07867a64ea3b9dfab53f0e74622159e86b0d in [@inline_let] let rZ : S.felem = 0x028a1380449aede5df8219420b458d464a6a4773ac91e8305237878cef1cffa6 in (rX, rY, rZ) val lemma_proj_g_pow2_192_eval : unit -> Lemma (SE.exp_pow2 S.mk_k256_concrete_ops proj_g_pow2_128 64 == proj_g_pow2_192) let lemma_proj_g_pow2_192_eval () = SPT256.exp_pow2_rec_is_exp_pow2 S.mk_k256_concrete_ops proj_g_pow2_128 64; let qX, qY, qZ = normalize_term (SPT256.exp_pow2_rec S.mk_k256_concrete_ops proj_g_pow2_128 64) in normalize_term_spec (SPT256.exp_pow2_rec S.mk_k256_concrete_ops proj_g_pow2_128 64); let rX : S.felem = 0xbd382b67d20492b1480ca58a6d7d617ba413a9bc7c2f1cff51301ef960fb245c in let rY : S.felem = 0x0b232afcf692673aa714357c524c07867a64ea3b9dfab53f0e74622159e86b0d in let rZ : S.felem = 0x028a1380449aede5df8219420b458d464a6a4773ac91e8305237878cef1cffa6 in assert_norm (qX == rX /\ qY == rY /\ qZ == rZ) // let proj_g_pow2_64 : S.proj_point = // normalize_term (SPT256.exp_pow2_rec S.mk_k256_concrete_ops S.g 64) // let proj_g_pow2_128 : S.proj_point = // normalize_term (SPT256.exp_pow2_rec S.mk_k256_concrete_ops proj_g_pow2_64 64) // let proj_g_pow2_192 : S.proj_point = // normalize_term (SPT256.exp_pow2_rec S.mk_k256_concrete_ops proj_g_pow2_128 64) inline_for_extraction noextract let proj_g_pow2_64_list : SPTK.point_list = normalize_term (SPTK.proj_point_to_list proj_g_pow2_64) inline_for_extraction noextract let proj_g_pow2_128_list : SPTK.point_list = normalize_term (SPTK.proj_point_to_list proj_g_pow2_128) inline_for_extraction noextract let proj_g_pow2_192_list : SPTK.point_list = normalize_term (SPTK.proj_point_to_list proj_g_pow2_192) let proj_g_pow2_64_lseq : LSeq.lseq uint64 15 = normalize_term_spec (SPTK.proj_point_to_list proj_g_pow2_64); Seq.seq_of_list proj_g_pow2_64_list let proj_g_pow2_128_lseq : LSeq.lseq uint64 15 = normalize_term_spec (SPTK.proj_point_to_list proj_g_pow2_128); Seq.seq_of_list proj_g_pow2_128_list let proj_g_pow2_192_lseq : LSeq.lseq uint64 15 = normalize_term_spec (SPTK.proj_point_to_list proj_g_pow2_192); Seq.seq_of_list proj_g_pow2_192_list val proj_g_pow2_64_lemma: unit -> Lemma (S.to_aff_point proj_g_pow2_64 == pow_point (pow2 64) g_aff) let proj_g_pow2_64_lemma () = lemma_proj_g_pow2_64_eval (); SPT256.a_pow2_64_lemma S.mk_k256_concrete_ops S.g val proj_g_pow2_128_lemma: unit -> Lemma (S.to_aff_point proj_g_pow2_128 == pow_point (pow2 128) g_aff) let proj_g_pow2_128_lemma () = lemma_proj_g_pow2_128_eval (); lemma_proj_g_pow2_64_eval (); SPT256.a_pow2_128_lemma S.mk_k256_concrete_ops S.g val proj_g_pow2_192_lemma: unit -> Lemma (S.to_aff_point proj_g_pow2_192 == pow_point (pow2 192) g_aff) let proj_g_pow2_192_lemma () = lemma_proj_g_pow2_192_eval (); lemma_proj_g_pow2_128_eval (); lemma_proj_g_pow2_64_eval (); SPT256.a_pow2_192_lemma S.mk_k256_concrete_ops S.g let proj_g_pow2_64_lseq_lemma () = normalize_term_spec (SPTK.proj_point_to_list proj_g_pow2_64); proj_g_pow2_64_lemma (); SPTK.proj_point_to_list_lemma proj_g_pow2_64 let proj_g_pow2_128_lseq_lemma () = normalize_term_spec (SPTK.proj_point_to_list proj_g_pow2_128); proj_g_pow2_128_lemma (); SPTK.proj_point_to_list_lemma proj_g_pow2_128 let proj_g_pow2_192_lseq_lemma () = normalize_term_spec (SPTK.proj_point_to_list proj_g_pow2_192); proj_g_pow2_192_lemma (); SPTK.proj_point_to_list_lemma proj_g_pow2_192 let mk_proj_g_pow2_64 () = createL proj_g_pow2_64_list let mk_proj_g_pow2_128 () = createL proj_g_pow2_128_list let mk_proj_g_pow2_192 () = createL proj_g_pow2_192_list //---------------- /// window size = 4; precomputed table = [[0]G, [1]G, ..., [15]G] inline_for_extraction noextract let precomp_basepoint_table_list_w4: x:list uint64{FStar.List.Tot.length x = 240} = normalize_term (SPT.precomp_base_table_list mk_k256_precomp_base_table S.g 15) let precomp_basepoint_table_lseq_w4 : LSeq.lseq uint64 240 = normalize_term_spec (SPT.precomp_base_table_list mk_k256_precomp_base_table S.g 15); Seq.seq_of_list precomp_basepoint_table_list_w4 let precomp_basepoint_table_lemma_w4 () = normalize_term_spec (SPT.precomp_base_table_list mk_k256_precomp_base_table S.g 15); SPT.precomp_base_table_lemma mk_k256_precomp_base_table S.g 16 precomp_basepoint_table_lseq_w4 let precomp_basepoint_table_w4: x:glbuffer uint64 240ul{witnessed x precomp_basepoint_table_lseq_w4 /\ recallable x} = createL_global precomp_basepoint_table_list_w4 /// window size = 4; precomputed table = [[0]([pow2 64]G), [1]([pow2 64]G), ..., [15]([pow2 64]G)] inline_for_extraction noextract let precomp_g_pow2_64_table_list_w4: x:list uint64{FStar.List.Tot.length x = 240} = normalize_term (SPT.precomp_base_table_list mk_k256_precomp_base_table proj_g_pow2_64 15) let precomp_g_pow2_64_table_lseq_w4 : LSeq.lseq uint64 240 = normalize_term_spec (SPT.precomp_base_table_list mk_k256_precomp_base_table proj_g_pow2_64 15); Seq.seq_of_list precomp_g_pow2_64_table_list_w4 let precomp_g_pow2_64_table_lemma_w4 () = normalize_term_spec (SPT.precomp_base_table_list mk_k256_precomp_base_table proj_g_pow2_64 15); SPT.precomp_base_table_lemma mk_k256_precomp_base_table proj_g_pow2_64 16 precomp_g_pow2_64_table_lseq_w4; proj_g_pow2_64_lemma () let precomp_g_pow2_64_table_w4: x:glbuffer uint64 240ul{witnessed x precomp_g_pow2_64_table_lseq_w4 /\ recallable x} = createL_global precomp_g_pow2_64_table_list_w4 /// window size = 4; precomputed table = [[0]([pow2 128]G), [1]([pow2 128]G),...,[15]([pow2 128]G)] inline_for_extraction noextract let precomp_g_pow2_128_table_list_w4: x:list uint64{FStar.List.Tot.length x = 240} = normalize_term (SPT.precomp_base_table_list mk_k256_precomp_base_table proj_g_pow2_128 15) let precomp_g_pow2_128_table_lseq_w4 : LSeq.lseq uint64 240 = normalize_term_spec (SPT.precomp_base_table_list mk_k256_precomp_base_table proj_g_pow2_128 15); Seq.seq_of_list precomp_g_pow2_128_table_list_w4 let precomp_g_pow2_128_table_lemma_w4 () = normalize_term_spec (SPT.precomp_base_table_list mk_k256_precomp_base_table proj_g_pow2_128 15); SPT.precomp_base_table_lemma mk_k256_precomp_base_table proj_g_pow2_128 16 precomp_g_pow2_64_table_lseq_w4; proj_g_pow2_128_lemma () let precomp_g_pow2_128_table_w4: x:glbuffer uint64 240ul{witnessed x precomp_g_pow2_128_table_lseq_w4 /\ recallable x} = createL_global precomp_g_pow2_128_table_list_w4 /// window size = 4; precomputed table = [[0]([pow2 192]G), [1]([pow2 192]G),...,[15]([pow2 192]G)] inline_for_extraction noextract let precomp_g_pow2_192_table_list_w4: x:list uint64{FStar.List.Tot.length x = 240} = normalize_term (SPT.precomp_base_table_list mk_k256_precomp_base_table proj_g_pow2_192 15) let precomp_g_pow2_192_table_lseq_w4 : LSeq.lseq uint64 240 = normalize_term_spec (SPT.precomp_base_table_list mk_k256_precomp_base_table proj_g_pow2_192 15); Seq.seq_of_list precomp_g_pow2_192_table_list_w4 let precomp_g_pow2_192_table_lemma_w4 () = normalize_term_spec (SPT.precomp_base_table_list mk_k256_precomp_base_table proj_g_pow2_192 15); SPT.precomp_base_table_lemma mk_k256_precomp_base_table proj_g_pow2_192 16 precomp_g_pow2_64_table_lseq_w4; proj_g_pow2_192_lemma () let precomp_g_pow2_192_table_w4: x:glbuffer uint64 240ul{witnessed x precomp_g_pow2_192_table_lseq_w4 /\ recallable x} = createL_global precomp_g_pow2_192_table_list_w4 /// window size = 5; precomputed table = [[0]G, [1]G, ..., [31]G] inline_for_extraction noextract let precomp_basepoint_table_list_w5: x:list uint64{FStar.List.Tot.length x = 480} = normalize_term (SPT.precomp_base_table_list mk_k256_precomp_base_table S.g 31)	{ "checked_file": "/", "dependencies": [ "Spec.K256.Lemmas.fsti.checked", "Spec.K256.fst.checked", "Spec.Exponentiation.fsti.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.Exponentiation.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.PrecompBaseTable256.fsti.checked", "Hacl.Spec.PrecompBaseTable.fsti.checked", "Hacl.Spec.K256.PrecompTable.fsti.checked", "Hacl.Impl.K256.Point.fsti.checked", "Hacl.Impl.K256.Group.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.List.Tot.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked" ], "interface_file": true, "source_file": "Hacl.K256.PrecompTable.fst" }	[ { "abbrev": true, "full_module": "Spec.K256.Lemmas", "short_module": "SL" }, { "abbrev": true, "full_module": "Hacl.Spec.K256.PrecompTable", "short_module": "SPTK" }, { "abbrev": true, "full_module": "Hacl.Spec.PrecompBaseTable256", "short_module": "SPT256" }, { "abbrev": true, "full_module": "Lib.Exponentiation", "short_module": "LE" }, { "abbrev": false, "full_module": "Hacl.Impl.K256.Group", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.K256.Point", "short_module": null }, { "abbrev": true, "full_module": "Spec.K256", "short_module": "S" }, { "abbrev": true, "full_module": "Hacl.Spec.PrecompBaseTable", "short_module": "SPT" }, { "abbrev": true, "full_module": "Hacl.Impl.Exponentiation.Definitions", "short_module": "BE" }, { "abbrev": true, "full_module": "Spec.Exponentiation", "short_module": "SE" }, { "abbrev": true, "full_module": "Lib.Exponentiation.Definition", "short_module": "LE" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.ST", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.K256", "short_module": null }, { "abbrev": false, "full_module": "Hacl.K256", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 50, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	Lib.Sequence.lseq Lib.IntTypes.uint64 480	Prims.Tot	[ "total" ]	[]	[ "FStar.Seq.Base.seq_of_list", "Lib.IntTypes.int_t", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "Hacl.K256.PrecompTable.precomp_basepoint_table_list_w5", "Prims.unit", "FStar.Pervasives.normalize_term_spec", "Prims.list", "Lib.IntTypes.uint_t", "Prims.b2t", "Prims.op_Equality", "Prims.int", "FStar.List.Tot.Base.length", "FStar.Mul.op_Star", "Prims.op_Addition", "Lib.IntTypes.v", "Lib.IntTypes.U32", "Lib.IntTypes.PUB", "FStar.UInt32.uint_to_t", "Hacl.Spec.PrecompBaseTable.precomp_base_table_list", "Spec.K256.PointOps.proj_point", "Hacl.K256.PrecompTable.mk_k256_precomp_base_table", "Spec.K256.PointOps.g", "Lib.Sequence.lseq", "Lib.IntTypes.uint64" ]	[]	false	false	false	false	false	let precomp_basepoint_table_lseq_w5:LSeq.lseq uint64 480 =	normalize_term_spec (SPT.precomp_base_table_list mk_k256_precomp_base_table S.g 31); Seq.seq_of_list precomp_basepoint_table_list_w5	false
Vale.AES.X64.GHash.fst	Vale.AES.X64.GHash.va_code_ReduceMul128_LE	val va_code_ReduceMul128_LE : va_dummy:unit -> Tot va_code	val va_code_ReduceMul128_LE : va_dummy:unit -> Tot va_code	let va_code_ReduceMul128_LE () = (va_Block (va_CCons (va_code_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_CCons (va_code_ReduceMulRev128 ()) (va_CCons (va_code_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_CNil ())))))	{ "file_name": "obj/Vale.AES.X64.GHash.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 20, "end_line": 106, "start_col": 0, "start_line": 103 }	module Vale.AES.X64.GHash open Vale.Def.Opaque_s open FStar.Seq open Vale.Def.Words_s open Vale.Def.Types_s open Vale.Arch.Types open Vale.AES.AES_s open Vale.AES.GHash_s open Vale.AES.GHash open Vale.AES.GF128_s open Vale.AES.GF128 open Vale.AES.GCTR_s open Vale.AES.GCM_helpers open Vale.Math.Poly2_s open Vale.Poly1305.Math open Vale.AES.X64.GF128_Mul open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsVector open Vale.X64.InsAes open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.X64.CPU_Features_s #reset-options "--z3rlimit 30" //-- Compute_Y0 val va_code_Compute_Y0 : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Compute_Y0 () = (va_Block (va_CCons (va_code_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_CNil ()))) val va_codegen_success_Compute_Y0 : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Compute_Y0 () = (va_pbool_and (va_codegen_success_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Compute_Y0 (va_mods:va_mods_t) : (va_quickCode unit (va_code_Compute_Y0 ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QBind va_range1 "*** PRECONDITION NOT MET AT line 83 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "* PRECONDITION NOT MET AT line 84 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (fun (_:unit) -> Vale.Arch.Types.lemma_quad32_xor ()) (va_QEmpty (()))))) val va_lemma_Compute_Y0 : va_b0:va_code -> va_s0:va_state -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Compute_Y0 ()) va_s0 /\ va_get_ok va_s0 /\ sse_enabled)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM va_s0))))) [@"opaque_to_smt"] let va_lemma_Compute_Y0 va_b0 va_s0 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 1; va_Mod_ok] in let va_qc = va_qcode_Compute_Y0 va_mods in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Compute_Y0 ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "* POSTCONDITION NOT MET AT line 77 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_get_ok va_sM) /\ label va_range1 "* POSTCONDITION NOT MET AT line 81 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf ***" (va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 1; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Compute_Y0 (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ sse_enabled /\ (forall (va_x_xmm1:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 1 va_x_xmm1 va_s0) in va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 ==> va_k va_sM (()))) val va_wpProof_Compute_Y0 : va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Compute_Y0 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Compute_Y0 ()) ([va_Mod_flags; va_Mod_xmm 1]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Compute_Y0 va_s0 va_k = let (va_sM, va_f0) = va_lemma_Compute_Y0 (va_code_Compute_Y0 ()) va_s0 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM va_s0)))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 1]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Compute_Y0 () : (va_quickCode unit (va_code_Compute_Y0 ())) = (va_QProc (va_code_Compute_Y0 ()) ([va_Mod_flags; va_Mod_xmm 1]) va_wp_Compute_Y0 va_wpProof_Compute_Y0) //-- //-- ReduceMul128_LE val va_code_ReduceMul128_LE : va_dummy:unit -> Tot va_code	{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsVector.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.InsAes.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Poly1305.Math.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Opaque_s.fsti.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.X64.GF128_Mul.fsti.checked", "Vale.AES.GHash_s.fst.checked", "Vale.AES.GHash.fsti.checked", "Vale.AES.GF128_s.fsti.checked", "Vale.AES.GF128.fsti.checked", "Vale.AES.GCTR_s.fst.checked", "Vale.AES.GCM_helpers.fsti.checked", "Vale.AES.AES_s.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": true, "source_file": "Vale.AES.X64.GHash.fst" }	[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.GF128_Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Poly1305.Math", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.GF128_Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Poly1305.Math", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 30, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	va_dummy: Prims.unit -> Vale.X64.Decls.va_code	Prims.Tot	[ "total" ]	[]	[ "Prims.unit", "Vale.X64.Decls.va_Block", "Vale.X64.Decls.va_CCons", "Vale.X64.InsVector.va_code_Pshufb", "Vale.X64.Decls.va_op_xmm_xmm", "Vale.AES.X64.GF128_Mul.va_code_ReduceMulRev128", "Vale.X64.Decls.va_CNil", "Vale.X64.Decls.va_code" ]	[]	false	false	false	true	false	let va_code_ReduceMul128_LE () =	(va_Block (va_CCons (va_code_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_CCons (va_code_ReduceMulRev128 ()) (va_CCons (va_code_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_CNil ())))))	false
Vale.AES.X64.GHash.fst	Vale.AES.X64.GHash.va_wp_Compute_Y0	val va_wp_Compute_Y0 (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	val va_wp_Compute_Y0 (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0	let va_wp_Compute_Y0 (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ sse_enabled /\ (forall (va_x_xmm1:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 1 va_x_xmm1 va_s0) in va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 ==> va_k va_sM (())))	{ "file_name": "obj/Vale.AES.X64.GHash.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 90, "end_line": 76, "start_col": 0, "start_line": 73 }	module Vale.AES.X64.GHash open Vale.Def.Opaque_s open FStar.Seq open Vale.Def.Words_s open Vale.Def.Types_s open Vale.Arch.Types open Vale.AES.AES_s open Vale.AES.GHash_s open Vale.AES.GHash open Vale.AES.GF128_s open Vale.AES.GF128 open Vale.AES.GCTR_s open Vale.AES.GCM_helpers open Vale.Math.Poly2_s open Vale.Poly1305.Math open Vale.AES.X64.GF128_Mul open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsVector open Vale.X64.InsAes open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.X64.CPU_Features_s #reset-options "--z3rlimit 30" //-- Compute_Y0 val va_code_Compute_Y0 : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Compute_Y0 () = (va_Block (va_CCons (va_code_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_CNil ()))) val va_codegen_success_Compute_Y0 : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Compute_Y0 () = (va_pbool_and (va_codegen_success_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Compute_Y0 (va_mods:va_mods_t) : (va_quickCode unit (va_code_Compute_Y0 ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QBind va_range1 "*** PRECONDITION NOT MET AT line 83 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "* PRECONDITION NOT MET AT line 84 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (fun (_:unit) -> Vale.Arch.Types.lemma_quad32_xor ()) (va_QEmpty (()))))) val va_lemma_Compute_Y0 : va_b0:va_code -> va_s0:va_state -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Compute_Y0 ()) va_s0 /\ va_get_ok va_s0 /\ sse_enabled)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM va_s0))))) [@"opaque_to_smt"] let va_lemma_Compute_Y0 va_b0 va_s0 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 1; va_Mod_ok] in let va_qc = va_qcode_Compute_Y0 va_mods in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Compute_Y0 ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "* POSTCONDITION NOT MET AT line 77 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_get_ok va_sM) /\ label va_range1 "* POSTCONDITION NOT MET AT line 81 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf ***" (va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 1; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM)	{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsVector.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.InsAes.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Poly1305.Math.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Opaque_s.fsti.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.X64.GF128_Mul.fsti.checked", "Vale.AES.GHash_s.fst.checked", "Vale.AES.GHash.fsti.checked", "Vale.AES.GF128_s.fsti.checked", "Vale.AES.GF128.fsti.checked", "Vale.AES.GCTR_s.fst.checked", "Vale.AES.GCM_helpers.fsti.checked", "Vale.AES.AES_s.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": true, "source_file": "Vale.AES.X64.GHash.fst" }	[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.GF128_Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Poly1305.Math", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.GF128_Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Poly1305.Math", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 30, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	va_s0: Vale.X64.Decls.va_state -> va_k: (_: Vale.X64.Decls.va_state -> _: Prims.unit -> Type0) -> Type0	Prims.Tot	[ "total" ]	[]	[ "Vale.X64.Decls.va_state", "Prims.unit", "Prims.l_and", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Vale.X64.CPU_Features_s.sse_enabled", "Prims.l_Forall", "Vale.X64.Decls.quad32", "Vale.X64.Flags.t", "Prims.l_imp", "Prims.eq2", "Vale.Def.Words_s.four", "Vale.Def.Types_s.nat32", "Vale.X64.Decls.va_get_xmm", "Vale.Def.Words_s.Mkfour", "Vale.X64.State.vale_state", "Vale.X64.Decls.va_upd_flags", "Vale.X64.Decls.va_upd_xmm" ]	[]	false	false	false	true	true	let va_wp_Compute_Y0 (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =	(va_get_ok va_s0 /\ sse_enabled /\ (forall (va_x_xmm1: quad32) (va_x_efl: Vale.X64.Flags.t). let va_sM = va_upd_flags va_x_efl (va_upd_xmm 1 va_x_xmm1 va_s0) in va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 ==> va_k va_sM (())))	false
Vale.AES.X64.GHash.fst	Vale.AES.X64.GHash.va_codegen_success_ReduceMul128_LE	val va_codegen_success_ReduceMul128_LE : va_dummy:unit -> Tot va_pbool	val va_codegen_success_ReduceMul128_LE : va_dummy:unit -> Tot va_pbool	let va_codegen_success_ReduceMul128_LE () = (va_pbool_and (va_codegen_success_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_pbool_and (va_codegen_success_ReduceMulRev128 ()) (va_pbool_and (va_codegen_success_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_ttrue ()))))	{ "file_name": "obj/Vale.AES.X64.GHash.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 42, "end_line": 113, "start_col": 0, "start_line": 110 }	module Vale.AES.X64.GHash open Vale.Def.Opaque_s open FStar.Seq open Vale.Def.Words_s open Vale.Def.Types_s open Vale.Arch.Types open Vale.AES.AES_s open Vale.AES.GHash_s open Vale.AES.GHash open Vale.AES.GF128_s open Vale.AES.GF128 open Vale.AES.GCTR_s open Vale.AES.GCM_helpers open Vale.Math.Poly2_s open Vale.Poly1305.Math open Vale.AES.X64.GF128_Mul open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsVector open Vale.X64.InsAes open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.X64.CPU_Features_s #reset-options "--z3rlimit 30" //-- Compute_Y0 val va_code_Compute_Y0 : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Compute_Y0 () = (va_Block (va_CCons (va_code_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_CNil ()))) val va_codegen_success_Compute_Y0 : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Compute_Y0 () = (va_pbool_and (va_codegen_success_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Compute_Y0 (va_mods:va_mods_t) : (va_quickCode unit (va_code_Compute_Y0 ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QBind va_range1 "*** PRECONDITION NOT MET AT line 83 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "* PRECONDITION NOT MET AT line 84 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (fun (_:unit) -> Vale.Arch.Types.lemma_quad32_xor ()) (va_QEmpty (()))))) val va_lemma_Compute_Y0 : va_b0:va_code -> va_s0:va_state -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Compute_Y0 ()) va_s0 /\ va_get_ok va_s0 /\ sse_enabled)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM va_s0))))) [@"opaque_to_smt"] let va_lemma_Compute_Y0 va_b0 va_s0 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 1; va_Mod_ok] in let va_qc = va_qcode_Compute_Y0 va_mods in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Compute_Y0 ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "* POSTCONDITION NOT MET AT line 77 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_get_ok va_sM) /\ label va_range1 "* POSTCONDITION NOT MET AT line 81 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf ***" (va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 1; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Compute_Y0 (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ sse_enabled /\ (forall (va_x_xmm1:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 1 va_x_xmm1 va_s0) in va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 ==> va_k va_sM (()))) val va_wpProof_Compute_Y0 : va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Compute_Y0 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Compute_Y0 ()) ([va_Mod_flags; va_Mod_xmm 1]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Compute_Y0 va_s0 va_k = let (va_sM, va_f0) = va_lemma_Compute_Y0 (va_code_Compute_Y0 ()) va_s0 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM va_s0)))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 1]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Compute_Y0 () : (va_quickCode unit (va_code_Compute_Y0 ())) = (va_QProc (va_code_Compute_Y0 ()) ([va_Mod_flags; va_Mod_xmm 1]) va_wp_Compute_Y0 va_wpProof_Compute_Y0) //-- //-- ReduceMul128_LE val va_code_ReduceMul128_LE : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_ReduceMul128_LE () = (va_Block (va_CCons (va_code_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_CCons (va_code_ReduceMulRev128 ()) (va_CCons (va_code_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_CNil ()))))) val va_codegen_success_ReduceMul128_LE : va_dummy:unit -> Tot va_pbool	{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsVector.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.InsAes.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Poly1305.Math.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Opaque_s.fsti.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.X64.GF128_Mul.fsti.checked", "Vale.AES.GHash_s.fst.checked", "Vale.AES.GHash.fsti.checked", "Vale.AES.GF128_s.fsti.checked", "Vale.AES.GF128.fsti.checked", "Vale.AES.GCTR_s.fst.checked", "Vale.AES.GCM_helpers.fsti.checked", "Vale.AES.AES_s.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": true, "source_file": "Vale.AES.X64.GHash.fst" }	[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.GF128_Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Poly1305.Math", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.GF128_Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Poly1305.Math", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 30, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	va_dummy: Prims.unit -> Vale.X64.Decls.va_pbool	Prims.Tot	[ "total" ]	[]	[ "Prims.unit", "Vale.X64.Decls.va_pbool_and", "Vale.X64.InsVector.va_codegen_success_Pshufb", "Vale.X64.Decls.va_op_xmm_xmm", "Vale.AES.X64.GF128_Mul.va_codegen_success_ReduceMulRev128", "Vale.X64.Decls.va_ttrue", "Vale.X64.Decls.va_pbool" ]	[]	false	false	false	true	false	let va_codegen_success_ReduceMul128_LE () =	(va_pbool_and (va_codegen_success_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_pbool_and (va_codegen_success_ReduceMulRev128 ()) (va_pbool_and (va_codegen_success_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_ttrue ())) ))	false
Vale.AES.X64.GHash.fst	Vale.AES.X64.GHash.va_qcode_ReduceMul128_LE	val va_qcode_ReduceMul128_LE (va_mods: va_mods_t) (a b: poly) : (va_quickCode unit (va_code_ReduceMul128_LE ()))	val va_qcode_ReduceMul128_LE (va_mods: va_mods_t) (a b: poly) : (va_quickCode unit (va_code_ReduceMul128_LE ()))	let va_qcode_ReduceMul128_LE (va_mods:va_mods_t) (a:poly) (b:poly) : (va_quickCode unit (va_code_ReduceMul128_LE ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "*** PRECONDITION NOT MET AT line 104 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_QSeq va_range1 "* PRECONDITION NOT MET AT line 105 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_ReduceMulRev128 a b) (va_QSeq va_range1 "* PRECONDITION NOT MET AT line 106 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf ***" (va_quick_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_QEmpty (()))))))	{ "file_name": "obj/Vale.AES.X64.GHash.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 78, "end_line": 124, "start_col": 0, "start_line": 116 }	module Vale.AES.X64.GHash open Vale.Def.Opaque_s open FStar.Seq open Vale.Def.Words_s open Vale.Def.Types_s open Vale.Arch.Types open Vale.AES.AES_s open Vale.AES.GHash_s open Vale.AES.GHash open Vale.AES.GF128_s open Vale.AES.GF128 open Vale.AES.GCTR_s open Vale.AES.GCM_helpers open Vale.Math.Poly2_s open Vale.Poly1305.Math open Vale.AES.X64.GF128_Mul open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsVector open Vale.X64.InsAes open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.X64.CPU_Features_s #reset-options "--z3rlimit 30" //-- Compute_Y0 val va_code_Compute_Y0 : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Compute_Y0 () = (va_Block (va_CCons (va_code_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_CNil ()))) val va_codegen_success_Compute_Y0 : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Compute_Y0 () = (va_pbool_and (va_codegen_success_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Compute_Y0 (va_mods:va_mods_t) : (va_quickCode unit (va_code_Compute_Y0 ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QBind va_range1 "*** PRECONDITION NOT MET AT line 83 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "* PRECONDITION NOT MET AT line 84 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (fun (_:unit) -> Vale.Arch.Types.lemma_quad32_xor ()) (va_QEmpty (()))))) val va_lemma_Compute_Y0 : va_b0:va_code -> va_s0:va_state -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Compute_Y0 ()) va_s0 /\ va_get_ok va_s0 /\ sse_enabled)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM va_s0))))) [@"opaque_to_smt"] let va_lemma_Compute_Y0 va_b0 va_s0 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 1; va_Mod_ok] in let va_qc = va_qcode_Compute_Y0 va_mods in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Compute_Y0 ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "* POSTCONDITION NOT MET AT line 77 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_get_ok va_sM) /\ label va_range1 "* POSTCONDITION NOT MET AT line 81 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf ***" (va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 1; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Compute_Y0 (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ sse_enabled /\ (forall (va_x_xmm1:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 1 va_x_xmm1 va_s0) in va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 ==> va_k va_sM (()))) val va_wpProof_Compute_Y0 : va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Compute_Y0 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Compute_Y0 ()) ([va_Mod_flags; va_Mod_xmm 1]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Compute_Y0 va_s0 va_k = let (va_sM, va_f0) = va_lemma_Compute_Y0 (va_code_Compute_Y0 ()) va_s0 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM va_s0)))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 1]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Compute_Y0 () : (va_quickCode unit (va_code_Compute_Y0 ())) = (va_QProc (va_code_Compute_Y0 ()) ([va_Mod_flags; va_Mod_xmm 1]) va_wp_Compute_Y0 va_wpProof_Compute_Y0) //-- //-- ReduceMul128_LE val va_code_ReduceMul128_LE : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_ReduceMul128_LE () = (va_Block (va_CCons (va_code_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_CCons (va_code_ReduceMulRev128 ()) (va_CCons (va_code_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_CNil ()))))) val va_codegen_success_ReduceMul128_LE : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_ReduceMul128_LE () = (va_pbool_and (va_codegen_success_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_pbool_and (va_codegen_success_ReduceMulRev128 ()) (va_pbool_and (va_codegen_success_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_ttrue ()))))	{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsVector.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.InsAes.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Poly1305.Math.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Opaque_s.fsti.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.X64.GF128_Mul.fsti.checked", "Vale.AES.GHash_s.fst.checked", "Vale.AES.GHash.fsti.checked", "Vale.AES.GF128_s.fsti.checked", "Vale.AES.GF128.fsti.checked", "Vale.AES.GCTR_s.fst.checked", "Vale.AES.GCM_helpers.fsti.checked", "Vale.AES.AES_s.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": true, "source_file": "Vale.AES.X64.GHash.fst" }	[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.GF128_Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Poly1305.Math", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.GF128_Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Poly1305.Math", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 30, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	va_mods: Vale.X64.QuickCode.va_mods_t -> a: Vale.Math.Poly2_s.poly -> b: Vale.Math.Poly2_s.poly -> Vale.X64.QuickCode.va_quickCode Prims.unit (Vale.AES.X64.GHash.va_code_ReduceMul128_LE ())	Prims.Tot	[ "total" ]	[]	[ "Vale.X64.QuickCode.va_mods_t", "Vale.Math.Poly2_s.poly", "Vale.X64.QuickCodes.qblock", "Prims.unit", "Prims.Cons", "Vale.X64.Decls.va_code", "Vale.X64.InsVector.va_code_Pshufb", "Vale.X64.Decls.va_op_xmm_xmm", "Vale.AES.X64.GF128_Mul.va_code_ReduceMulRev128", "Prims.Nil", "Vale.X64.Machine_s.precode", "Vale.X64.Decls.ins", "Vale.X64.Decls.ocmp", "Vale.X64.Decls.va_state", "Vale.X64.QuickCodes.va_QSeq", "Vale.X64.QuickCodes.va_range1", "Vale.X64.InsVector.va_quick_Pshufb", "Vale.AES.X64.GF128_Mul.va_quick_ReduceMulRev128", "Vale.X64.QuickCodes.va_QEmpty", "Vale.X64.State.vale_state", "Vale.X64.QuickCodes.quickCodes", "Vale.X64.QuickCode.va_quickCode", "Vale.AES.X64.GHash.va_code_ReduceMul128_LE" ]	[]	false	false	false	false	false	let va_qcode_ReduceMul128_LE (va_mods: va_mods_t) (a b: poly) : (va_quickCode unit (va_code_ReduceMul128_LE ())) =	(qblock va_mods (fun (va_s: va_state) -> let va_old_s:va_state = va_s in va_QSeq va_range1 "*** PRECONDITION NOT MET AT line 104 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_QSeq va_range1 "* PRECONDITION NOT MET AT line 105 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_ReduceMulRev128 a b) (va_QSeq va_range1 "* PRECONDITION NOT MET AT line 106 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf ***" (va_quick_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_QEmpty (()))))))	false
LowStar.RVector.fst	LowStar.RVector.r_sep_forall	val r_sep_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> p:loc -> h0:HS.mem -> h1:HS.mem -> v:a{rg_inv rg h0 v} -> Lemma (requires (loc_disjoint (loc_all_regions_from false (Rgl?.region_of rg v)) p /\ modifies p h0 h1)) (ensures (rg_inv rg h1 v /\ Rgl?.r_repr rg h0 v == Rgl?.r_repr rg h1 v))	val r_sep_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> p:loc -> h0:HS.mem -> h1:HS.mem -> v:a{rg_inv rg h0 v} -> Lemma (requires (loc_disjoint (loc_all_regions_from false (Rgl?.region_of rg v)) p /\ modifies p h0 h1)) (ensures (rg_inv rg h1 v /\ Rgl?.r_repr rg h0 v == Rgl?.r_repr rg h1 v))	let r_sep_forall #a #rst rg p h0 h1 v = Rgl?.r_sep rg v p h0 h1	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 25, "end_line": 941, "start_col": 8, "start_line": 940 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv)) let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /// Representation val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j) let rec as_seq_seq #a #rst rg h rs i j = if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1))) val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i}) (decreases (U32.v j)) let as_seq_sub #a #rst #rg h rv i j = as_seq_seq rg h (V.as_seq h rv) (U32.v i) (U32.v j) val as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v (V.size_of rv)}) let as_seq #a #rst #rg h rv = as_seq_sub h rv 0ul (V.size_of rv) val as_seq_sub_as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> Lemma (S.equal (as_seq_sub h rv 0ul (V.size_of rv)) (as_seq h rv)) [SMTPat (as_seq_sub h rv 0ul (V.size_of rv))] let as_seq_sub_as_seq #a #rst #rg h rv = () val as_seq_seq_index: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{k < j - i} -> Lemma (requires true) (ensures (S.index (as_seq_seq rg h rs i j) k == Rgl?.r_repr rg h (S.index rs (i + k)))) (decreases j) [SMTPat (S.index (as_seq_seq rg h rs i j) k)] let rec as_seq_seq_index #a #rst rg h rs i j k = if i = j then () else if k = j - i - 1 then () else as_seq_seq_index rg h rs i (j - 1) k val as_seq_seq_eq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs1:S.seq a -> rs2:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs1 /\ rs_elems_inv rg h rs1 i j} -> k:nat -> l:nat{k <= l /\ l <= S.length rs2 /\ rs_elems_inv rg h rs2 k l} -> Lemma (requires (S.equal (S.slice rs1 i j) (S.slice rs2 k l))) (ensures (S.equal (as_seq_seq rg h rs1 i j) (as_seq_seq rg h rs2 k l))) let as_seq_seq_eq #a #rst rg h rs1 rs2 i j k l = assert (forall (a:nat{a < j - i}). S.index (as_seq_seq rg h rs1 i j) a == Rgl?.r_repr rg h (S.index rs1 (i + a))); assert (forall (a:nat{a < l - k}). S.index (as_seq_seq rg h rs2 k l) a == Rgl?.r_repr rg h (S.index rs2 (k + a))); assert (S.length (S.slice rs1 i j) = j - i); assert (S.length (S.slice rs2 k l) = l - k); assert (forall (a:nat{a < j - i}). S.index (S.slice rs1 i j) a == S.index (S.slice rs2 k l) a); assert (forall (a:nat{a < j - i}). S.index rs1 (i + a) == S.index rs2 (k + a)) val as_seq_seq_slice: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat -> l:nat{k <= l && l <= j - i} -> Lemma (S.equal (S.slice (as_seq_seq rg h rs i j) k l) (as_seq_seq rg h (S.slice rs (i + k) (i + l)) 0 (l - k))) #reset-options "--z3rlimit 10" let rec as_seq_seq_slice #a #rst rg h rs i j k l = if k = l then () else (as_seq_seq_slice rg h rs i j k (l - 1); as_seq_seq_index rg h rs i j (l - 1); as_seq_seq_eq rg h (S.slice rs (i + k) (i + l - 1)) (S.slice rs (i + k) (i + l)) 0 (l - k - 1) 0 (l - k - 1)) val as_seq_seq_upd: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{ i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{i <= k && k < j} -> v:a{rg_inv rg h v} -> Lemma (S.equal (as_seq_seq rg h (S.upd rs k v) i j) (S.upd (as_seq_seq rg h rs i j) (k - i) (Rgl?.r_repr rg h v))) let rec as_seq_seq_upd #a #rst rg h rs i j k v = if i = j then () else if k = j - 1 then () else as_seq_seq_upd rg h rs i (j - 1) k v // Preservation based on disjointness val as_seq_seq_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv_preserved rg rs i j p h0 h1; S.equal (as_seq_seq rg h0 rs i j) (as_seq_seq rg h1 rs i j))) let rec as_seq_seq_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; as_seq_seq_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val as_seq_sub_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ loc_disjoint p (V.loc_vector rv) /\ modifies p h0 h1)) (ensures (rv_elems_inv_preserved rv i j p h0 h1; S.equal (as_seq_sub h0 rv i j) (as_seq_sub h1 rv i j))) let as_seq_sub_preserved #a #rst #rg rv i j p h0 h1 = as_seq_seq_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val as_seq_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv_preserved_ rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv))) let as_seq_preserved_ #a #rst #rg rv p h0 h1 = as_seq_sub_preserved rv 0ul (V.size_of rv) p h0 h1 // The second core lemma of `rvector` val as_seq_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv_preserved rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv))) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let as_seq_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); as_seq_preserved_ rv p h0 h1 /// Construction val alloc_empty: #a:Type0 -> #rst:Type -> rg:regional rst a -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 bv h1 -> h0 == h1 /\ V.size_of bv = 0ul)) let alloc_empty #a #rst rg = V.alloc_empty a val alloc_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> cidx:uint32_t{cidx <= V.size_of rv} -> HST.ST unit (requires (fun h0 -> rv_itself_inv h0 rv)) (ensures (fun h0 _ h1 -> modifies (V.loc_vector_within rv 0ul cidx) h0 h1 /\ rv_itself_inv h1 rv /\ rv_elems_inv h1 rv 0ul cidx /\ rv_elems_reg h1 rv 0ul cidx /\ S.equal (as_seq_sub h1 rv 0ul cidx) (S.create (U32.v cidx) (Ghost.reveal (Rgl?.irepr rg))) /\ // the loop invariant for this function V.forall_ h1 rv 0ul cidx (fun r -> HS.fresh_region (Rgl?.region_of rg r) h0 h1 /\ Rgl?.r_alloc_p rg r) /\ Set.subset (Map.domain (HS.get_hmap h0)) (Map.domain (HS.get_hmap h1)))) (decreases (U32.v cidx)) #reset-options "--z3rlimit 20" let rec alloc_ #a #rst #rg rv cidx = let hh0 = HST.get () in if cidx = 0ul then () else (let nrid = HST.new_region (V.frameOf rv) in let v = rg_alloc rg nrid in let hh1 = HST.get () in V.assign rv (cidx - 1ul) v; let hh2 = HST.get () in V.loc_vector_within_included rv (cidx - 1ul) cidx; Rgl?.r_sep rg (V.get hh2 rv (cidx - 1ul)) (V.loc_vector_within rv (cidx - 1ul) cidx) hh1 hh2; alloc_ rv (cidx - 1ul); let hh3 = HST.get () in V.loc_vector_within_included rv 0ul (cidx - 1ul); Rgl?.r_sep rg (V.get hh3 rv (cidx - 1ul)) (V.loc_vector_within rv 0ul (cidx - 1ul)) hh2 hh3; V.forall2_extend hh3 rv 0ul (cidx - 1ul) (fun r1 r2 -> HS.disjoint (Rgl?.region_of rg r1) (Rgl?.region_of rg r2)); V.loc_vector_within_union_rev rv 0ul cidx) val alloc_rid: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> rid:HST.erid -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ V.frameOf rv = rid /\ V.size_of rv = len /\ V.forall_all h1 rv (fun r -> Rgl?.r_alloc_p rg r) /\ S.equal (as_seq h1 rv) (S.create (U32.v len) (Ghost.reveal (Rgl?.irepr rg))))) let alloc_rid #a #rst rg len rid = let vec = V.alloc_rid len (rg_dummy rg) rid in alloc_ #a #rst #rg vec len; V.loc_vector_within_included vec 0ul len; vec val alloc_reserve: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> rid:HST.erid -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ V.frameOf rv = rid /\ V.size_of rv = 0ul /\ S.equal (as_seq h1 rv) S.empty /\ Set.equal (Map.domain (HS.get_hmap h0)) (Map.domain (HS.get_hmap h1)) /\ B.fresh_loc (V.loc_vector rv) h0 h1)) let alloc_reserve #a #rst rg len rid = V.alloc_reserve len (rg_dummy rg) rid val alloc: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ HS.fresh_region (V.frameOf rv) h0 h1 /\ V.size_of rv = len /\ V.forall_all h1 rv (fun r -> Rgl?.r_alloc_p rg r) /\ S.equal (as_seq h1 rv) (S.create (U32.v len) (Ghost.reveal (Rgl?.irepr rg))))) let alloc #a #rst rg len = let nrid = HST.new_region HS.root in alloc_rid rg len nrid val insert: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg{not (V.is_full rv)} -> v:a -> HST.ST (rvector rg) (requires (fun h0 -> rv_inv h0 rv /\ rg_inv rg h0 v /\ HS.extends (Rgl?.region_of rg v) (V.frameOf rv) /\ V.forall_all h0 rv (fun b -> HS.disjoint (Rgl?.region_of rg b) (Rgl?.region_of rg v)))) (ensures (fun h0 irv h1 -> V.size_of irv = V.size_of rv + 1ul /\ V.frameOf rv = V.frameOf irv /\ modifies (loc_union (V.loc_addr_of_vector rv) (V.loc_vector irv)) h0 h1 /\ rv_inv h1 irv /\ V.get h1 irv (V.size_of rv) == v /\ S.equal (as_seq h1 irv) (S.snoc (as_seq h0 rv) (Rgl?.r_repr rg h0 v)))) #reset-options "--z3rlimit 20" let insert #a #rst #rg rv v = let hh0 = HST.get () in let irv = V.insert rv v in let hh1 = HST.get () in // Safety rs_loc_elems_parent_disj rg (V.as_seq hh0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)); rs_elems_inv_preserved rg (V.as_seq hh0 rv) 0 (U32.v (V.size_of rv)) (loc_region_only false (V.frameOf rv)) hh0 hh1; Rgl?.r_sep rg v (loc_region_only false (V.frameOf rv)) hh0 hh1; // Correctness assert (S.equal (V.as_seq hh0 rv) (S.slice (V.as_seq hh1 irv) 0 (U32.v (V.size_of rv)))); as_seq_seq_preserved rg (V.as_seq hh0 rv) 0 (U32.v (V.size_of rv)) (loc_region_only false (V.frameOf rv)) hh0 hh1; as_seq_seq_slice rg hh1 (V.as_seq hh1 irv) 0 (U32.v (V.size_of irv)) 0 (U32.v (V.size_of rv)); irv val insert_copy: #a:Type0 -> #rst:Type -> #rg:regional rst a -> cp:copyable #rst a rg -> rv:rvector rg{not (V.is_full rv)} -> v:a -> HST.ST (rvector rg) (requires (fun h0 -> rv_inv h0 rv /\ rg_inv rg h0 v /\ HS.disjoint (Rgl?.region_of rg v) (V.frameOf rv))) (ensures (fun h0 irv h1 -> V.size_of irv = V.size_of rv + 1ul /\ V.frameOf rv = V.frameOf irv /\ modifies (loc_rvector rv) h0 h1 /\ rv_inv h1 irv /\ S.equal (as_seq h1 irv) (S.snoc (as_seq h0 rv) (Rgl?.r_repr rg h0 v)))) let insert_copy #a #rst #rg cp rv v = let hh0 = HST.get () in rv_elems_inv_live_region hh0 rv 0ul (V.size_of rv); let nrid = HST.new_region (V.frameOf rv) in let nv = rg_alloc rg nrid in let hh1 = HST.get () in Rgl?.r_sep rg v loc_none hh0 hh1; rv_inv_preserved rv loc_none hh0 hh1; as_seq_preserved rv loc_none hh0 hh1; Cpy?.copy cp (Rgl?.state rg) v nv; let hh2 = HST.get () in rv_loc_elems_each_disj hh2 rv 0ul (V.size_of rv) nrid; rv_inv_preserved_ rv (loc_all_regions_from false nrid) hh1 hh2; as_seq_preserved_ rv (loc_all_regions_from false nrid) hh1 hh2; insert rv nv val assign: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> v:a -> HST.ST unit (requires (fun h0 -> // rv_inv h0 rv /\ rv_itself_inv h0 rv /\ rv_elems_inv h0 rv 0ul i /\ rv_elems_inv h0 rv (i + 1ul) (V.size_of rv) /\ elems_reg h0 rv /\ V.forall_ h0 rv 0ul i (fun b -> HS.disjoint (Rgl?.region_of rg b) (Rgl?.region_of rg v)) /\ V.forall_ h0 rv (i + 1ul) (V.size_of rv) (fun b -> HS.disjoint (Rgl?.region_of rg b) (Rgl?.region_of rg v)) /\ rg_inv rg h0 v /\ HS.extends (Rgl?.region_of rg v) (V.frameOf rv))) (ensures (fun h0 _ h1 -> modifies (V.loc_vector_within rv i (i + 1ul)) h0 h1 /\ rv_inv h1 rv /\ V.get h1 rv i == v /\ S.equal (as_seq h1 rv) (S.append (as_seq_sub h0 rv 0ul i) (S.cons (Rgl?.r_repr rg h0 v) (as_seq_sub h0 rv (i + 1ul) (V.size_of rv)))))) let assign #a #rst #rg rv i v = let hh0 = HST.get () in V.assign rv i v; let hh1 = HST.get () in // Safety rs_loc_elems_parent_disj rg (V.as_seq hh0 rv) (V.frameOf rv) 0 (U32.v i); rs_loc_elems_parent_disj rg (V.as_seq hh0 rv) (V.frameOf rv) (U32.v i + 1) (U32.v (V.size_of rv)); rs_elems_inv_preserved rg (V.as_seq hh0 rv) 0 (U32.v i) (V.loc_vector rv) hh0 hh1; rs_elems_inv_preserved rg (V.as_seq hh0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (V.loc_vector rv) hh0 hh1; Rgl?.r_sep rg v (V.loc_vector rv) hh0 hh1; // Correctness rs_loc_elems_parent_disj rg (V.as_seq hh1 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)); as_seq_seq_preserved rg (V.as_seq hh1 rv) 0 (U32.v (V.size_of rv)) (V.loc_vector rv) hh0 hh1 private val r_sep_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> p:loc -> h0:HS.mem -> h1:HS.mem -> v:a{rg_inv rg h0 v} -> Lemma (requires (loc_disjoint (loc_all_regions_from false (Rgl?.region_of rg v)) p /\ modifies p h0 h1)) (ensures (rg_inv rg h1 v /\	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> p: LowStar.Monotonic.Buffer.loc -> h0: FStar.Monotonic.HyperStack.mem -> h1: FStar.Monotonic.HyperStack.mem -> v: a{LowStar.Regional.rg_inv rg h0 v} -> FStar.Pervasives.Lemma (requires LowStar.Monotonic.Buffer.loc_disjoint (LowStar.Monotonic.Buffer.loc_all_regions_from false (Rgl?.region_of rg v)) p /\ LowStar.Monotonic.Buffer.modifies p h0 h1) (ensures LowStar.Regional.rg_inv rg h1 v /\ Rgl?.r_repr rg h0 v == Rgl?.r_repr rg h1 v)	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "LowStar.Monotonic.Buffer.loc", "FStar.Monotonic.HyperStack.mem", "LowStar.Regional.rg_inv", "LowStar.Regional.__proj__Rgl__item__r_sep", "Prims.unit" ]	[]	true	false	true	false	false	let r_sep_forall #a #rst rg p h0 h1 v =	Rgl?.r_sep rg v p h0 h1	false
Vale.PPC64LE.InsVector.fsti	Vale.PPC64LE.InsVector.va_quick_Vpmsumd	val va_quick_Vpmsumd (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_Vpmsumd dst src1 src2))	val va_quick_Vpmsumd (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_Vpmsumd dst src1 src2))	let va_quick_Vpmsumd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vpmsumd dst src1 src2)) = (va_QProc (va_code_Vpmsumd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vpmsumd dst src1 src2) (va_wpProof_Vpmsumd dst src1 src2))	{ "file_name": "obj/Vale.PPC64LE.InsVector.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 39, "end_line": 1996, "start_col": 0, "start_line": 1993 }	module Vale.PPC64LE.InsVector open FStar.Seq open FStar.Mul open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Types_s open Vale.PPC64LE.Machine_s open Vale.PPC64LE.State open Vale.PPC64LE.Decls open Vale.PPC64LE.QuickCode open Vale.PPC64LE.InsBasic open Vale.PPC64LE.InsMem open Vale.PPC64LE.Memory open Vale.Def.Sel open Spec.SHA2 open Spec.Hash.Definitions open Vale.SHA.PPC64LE.SHA_helpers open Vale.AES.AES_BE_s open Vale.Math.Poly2_s open Vale.Math.Poly2.Bits_s let buffer128_write (b:buffer128) (i:int) (v:quad32) (h:vale_heap) : Ghost vale_heap (requires buffer_readable h b /\ buffer_writeable b) (ensures fun _ -> True) = buffer_write b i v h //-- Vmr val va_code_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmr : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmr dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == va_eval_vec_opr va_sM src ==> va_k va_sM (()))) val va_wpProof_Vmr : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmr dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmr dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmr (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmr dst src)) = (va_QProc (va_code_Vmr dst src) ([va_mod_vec_opr dst]) (va_wp_Vmr dst src) (va_wpProof_Vmr dst src)) //-- //-- Mfvsrd val va_code_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrd dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.hi64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrd : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrd dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrd (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrd dst src)) = (va_QProc (va_code_Mfvsrd dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrd dst src) (va_wpProof_Mfvsrd dst src)) //-- //-- Mfvsrld val va_code_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Mfvsrld : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mfvsrld dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_reg_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.lo64 (va_eval_vec_opr va_sM src) ==> va_k va_sM (()))) val va_wpProof_Mfvsrld : dst:va_operand_reg_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mfvsrld dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mfvsrld (dst:va_operand_reg_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Mfvsrld dst src)) = (va_QProc (va_code_Mfvsrld dst src) ([va_mod_reg_opr dst]) (va_wp_Mfvsrld dst src) (va_wpProof_Mfvsrld dst src)) //-- //-- Mtvsrdd val va_code_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrdd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrdd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src1 /\ va_mul_nat pow2_32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst)) + Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src2 /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.two_two_to_four #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.Mktwo #(Vale.Def.Words_s.two Vale.Def.Types_s.nat32) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src2 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src2 `op_Division` pow2_32)) (Vale.Def.Words_s.Mktwo #Vale.Def.Types_s.nat32 (va_eval_reg_opr va_s0 src1 `op_Modulus` pow2_32) (va_eval_reg_opr va_s0 src1 `op_Division` pow2_32))) ==> va_k va_sM (()))) val va_wpProof_Mtvsrdd : dst:va_operand_vec_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrdd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrdd (dst:va_operand_vec_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrdd dst src1 src2)) = (va_QProc (va_code_Mtvsrdd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Mtvsrdd dst src1 src2) (va_wpProof_Mtvsrdd dst src1 src2)) //-- //-- Mtvsrws val va_code_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_code val va_codegen_success_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Tot va_pbool val va_lemma_Mtvsrws : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_reg_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Mtvsrws dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == va_eval_reg_opr va_s0 src `op_Modulus` pow2_32 ==> va_k va_sM (()))) val va_wpProof_Mtvsrws : dst:va_operand_vec_opr -> src:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Mtvsrws dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Mtvsrws (dst:va_operand_vec_opr) (src:va_operand_reg_opr) : (va_quickCode unit (va_code_Mtvsrws dst src)) = (va_QProc (va_code_Mtvsrws dst src) ([va_mod_vec_opr dst]) (va_wp_Mtvsrws dst src) (va_wpProof_Mtvsrws dst src)) //-- //-- Vadduwm val va_code_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vadduwm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vadduwm dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Arch.Types.add_wrap_quad32 (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vadduwm : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vadduwm dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vadduwm (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vadduwm dst src1 src2)) = (va_QProc (va_code_Vadduwm dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vadduwm dst src1 src2) (va_wpProof_Vadduwm dst src1 src2)) //-- //-- Vxor val va_code_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vxor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vxor dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vxor : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vxor dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vxor (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vxor dst src1 src2)) = (va_QProc (va_code_Vxor dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vxor dst src1 src2) (va_wpProof_Vxor dst src1 src2)) //-- //-- Vand val va_code_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vand : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vand dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words.Four_s.four_map2 #nat32 #Vale.Def.Types_s.nat32 (fun (di:nat32) (si:nat32) -> Vale.Arch.Types.iand32 di si) (va_eval_vec_opr va_s0 src1) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vand : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vand dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vand (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vand dst src1 src2)) = (va_QProc (va_code_Vand dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vand dst src1 src2) (va_wpProof_Vand dst src1 src2)) //-- //-- Vslw val va_code_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vslw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vslw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishl32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vslw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vslw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vslw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vslw dst src1 src2)) = (va_QProc (va_code_Vslw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vslw dst src1 src2) (va_wpProof_Vslw dst src1 src2)) //-- //-- Vsrw val va_code_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsrw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsrw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) (Vale.Arch.Types.ishr32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) `op_Modulus` 32)) ==> va_k va_sM (()))) val va_wpProof_Vsrw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsrw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsrw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsrw dst src1 src2)) = (va_QProc (va_code_Vsrw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsrw dst src1 src2) (va_wpProof_Vsrw dst src1 src2)) //-- //-- Vsl val va_code_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsl : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsl dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let chk = fun (v:nat32) (sh:nat8) -> let bytes = Vale.Def.Types_s.nat32_to_be_bytes v in l_and (l_and (l_and (sh = FStar.Seq.Base.index #nat8 bytes 3 `op_Modulus` 8) (sh = FStar.Seq.Base.index #nat8 bytes 2 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 1 `op_Modulus` 8)) (sh = FStar.Seq.Base.index #nat8 bytes 0 `op_Modulus` 8) in l_and (l_and (l_and (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) sh) (chk (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) sh)) (chk (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) sh)) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let sh = FStar.Seq.Base.index #nat8 (Vale.Def.Types_s.nat32_to_be_bytes (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2))) 3 `op_Modulus` 8 in let l = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishl32 i sh) (va_eval_vec_opr va_s0 src1) in let r = Vale.Def.Words.Four_s.four_map #nat32 #Vale.Def.Words_s.nat32 (fun (i:nat32) -> Vale.Arch.Types.ishr32 i (32 - sh)) (va_eval_vec_opr va_s0 src1) in va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor l (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 r) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 r) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 r))) ==> va_k va_sM (()))) val va_wpProof_Vsl : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsl dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsl (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsl dst src1 src2)) = (va_QProc (va_code_Vsl dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vsl dst src1 src2) (va_wpProof_Vsl dst src1 src2)) //-- //-- Vcmpequw val va_code_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcmpequw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcmpequw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) (if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) then 4294967295 else 0) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) (va_if (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1) = Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (fun _ -> 4294967295) (fun _ -> 0)) ==> va_k va_sM (()))) val va_wpProof_Vcmpequw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcmpequw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcmpequw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcmpequw dst src1 src2)) = (va_QProc (va_code_Vcmpequw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcmpequw dst src1 src2) (va_wpProof_Vcmpequw dst src1 src2)) //-- //-- Vsldoi val va_code_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_code val va_codegen_success_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Tot va_pbool val va_lemma_Vsldoi : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsldoi dst src1 src2 count) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (count == 4 \/ count == 8 \/ count == 12) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (count == 4 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) /\ (count == 8 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) /\ (count == 12 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_Vsldoi : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> count:quad32bytes -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsldoi dst src1 src2 count va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsldoi (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (count:quad32bytes) : (va_quickCode unit (va_code_Vsldoi dst src1 src2 count)) = (va_QProc (va_code_Vsldoi dst src1 src2 count) ([va_mod_vec_opr dst]) (va_wp_Vsldoi dst src1 src2 count) (va_wpProof_Vsldoi dst src1 src2 count)) //-- //-- Vmrghw val va_code_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vmrghw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vmrghw dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Vmrghw : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vmrghw dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vmrghw (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vmrghw dst src1 src2)) = (va_QProc (va_code_Vmrghw dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vmrghw dst src1 src2) (va_wpProof_Vmrghw dst src1 src2)) //-- //-- Xxmrghd val va_code_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Xxmrghd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Xxmrghd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) ==> va_k va_sM (()))) val va_wpProof_Xxmrghd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Xxmrghd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Xxmrghd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Xxmrghd dst src1 src2)) = (va_QProc (va_code_Xxmrghd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Xxmrghd dst src1 src2) (va_wpProof_Xxmrghd dst src1 src2)) //-- //-- Vsel val va_code_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsel : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsel dst src1 src2 sel) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_is_src_vec_opr sel va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 sel)) /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Sel.isel32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 sel)) ==> va_k va_sM (()))) val va_wpProof_Vsel : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> sel:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsel dst src1 src2 sel va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsel (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (sel:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsel dst src1 src2 sel)) = (va_QProc (va_code_Vsel dst src1 src2 sel) ([va_mod_vec_opr dst]) (va_wp_Vsel dst src1 src2 sel) (va_wpProof_Vsel dst src1 src2 sel)) //-- //-- Vspltw val va_code_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_code val va_codegen_success_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Tot va_pbool val va_lemma_Vspltw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltw dst src uim) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (uim == 0 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ (uim == 1 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) /\ (uim == 2 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) /\ (uim == 3 ==> va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vspltw : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> uim:nat2 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltw dst src uim va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltw (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (uim:nat2) : (va_quickCode unit (va_code_Vspltw dst src uim)) = (va_QProc (va_code_Vspltw dst src uim) ([va_mod_vec_opr dst]) (va_wp_Vspltw dst src uim) (va_wpProof_Vspltw dst src uim)) //-- //-- Vspltisw val va_code_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisw : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisw : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisw dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisw (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat32 = Vale.PPC64LE.Machine_s.int_to_nat32 src in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisw : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisw dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisw (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisw dst src)) = (va_QProc (va_code_Vspltisw dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisw dst src) (va_wpProof_Vspltisw dst src)) //-- //-- Vspltisb val va_code_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_code val va_codegen_success_Vspltisb : dst:va_operand_vec_opr -> src:sim -> Tot va_pbool val va_lemma_Vspltisb : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:sim -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vspltisb dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vspltisb (dst:va_operand_vec_opr) (src:sim) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let src_nat8 = Vale.PPC64LE.Machine_s.int_to_nat8 src in let src_nat32 = Vale.Def.Types_s.be_bytes_to_nat32 (Vale.Def.Words.Seq_s.four_to_seq_BE #Vale.Def.Types_s.nat8 (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat8 src_nat8 src_nat8 src_nat8 src_nat8)) in va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 src_nat32 src_nat32 src_nat32 src_nat32) ==> va_k va_sM (()))) val va_wpProof_Vspltisb : dst:va_operand_vec_opr -> src:sim -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vspltisb dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vspltisb (dst:va_operand_vec_opr) (src:sim) : (va_quickCode unit (va_code_Vspltisb dst src)) = (va_QProc (va_code_Vspltisb dst src) ([va_mod_vec_opr dst]) (va_wp_Vspltisb dst src) (va_wpProof_Vspltisb dst src)) //-- //-- Load128_buffer val va_code_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_buffer h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) ==> va_k va_sM (()))) val va_wpProof_Load128_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_buffer h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_buffer h dst base offset t)) = (va_QProc (va_code_Load128_buffer h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_buffer h dst base offset t b index) (va_wpProof_Load128_buffer h dst base offset t b index)) //-- //-- Store128_buffer val va_code_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_buffer h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (va_eval_vec_opr va_s0 src) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_buffer h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_buffer h src base offset t)) = (va_QProc (va_code_Store128_buffer h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_buffer h src base offset t b index) (va_wpProof_Store128_buffer h src base offset t b index)) //-- //-- Load128_word4_buffer val va_code_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer h dst base t)) = (va_QProc (va_code_Load128_word4_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer h dst base t b index) (va_wpProof_Load128_word4_buffer h dst base t b index)) //-- //-- Load128_word4_buffer_index val va_code_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_word4_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (let buf = Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h) in l_and (l_and (l_and (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi3 buf) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__hi2 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo1 buf)) (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.Def.Words_s.__proj__Mkfour__item__lo0 buf)) ==> va_k va_sM (()))) val va_wpProof_Load128_word4_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_word4_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_word4_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_word4_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_word4_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_word4_buffer_index h dst base offset t b index) (va_wpProof_Load128_word4_buffer_index h dst base offset t b index)) //-- //-- Store128_word4_buffer val va_code_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer h src base t)) = (va_QProc (va_code_Store128_word4_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer h src base t b index) (va_wpProof_Store128_word4_buffer h src base t b index)) //-- //-- Store128_word4_buffer_index val va_code_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_word4_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_word4_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src)) (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_word4_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_word4_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_word4_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_word4_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_word4_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_word4_buffer_index h src base offset t b index) (va_wpProof_Store128_word4_buffer_index h src base offset t b index)) //-- //-- Load128_byte16_buffer val va_code_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer h dst base t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer h dst base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer h dst base t)) = (va_QProc (va_code_Load128_byte16_buffer h dst base t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer h dst base t b index) (va_wpProof_Load128_byte16_buffer h dst base t b index)) //-- //-- Load128_byte16_buffer_index val va_code_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Load128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load128_byte16_buffer_index h dst base offset t) va_s0 /\ va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_src_heaplet h va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_src_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) false /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read b index (va_eval_heaplet va_sM h)) ==> va_k va_sM (()))) val va_wpProof_Load128_byte16_buffer_index : h:va_operand_heaplet -> dst:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load128_byte16_buffer_index h dst base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Load128_byte16_buffer_index (h:va_operand_heaplet) (dst:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Load128_byte16_buffer_index h dst base offset t)) = (va_QProc (va_code_Load128_byte16_buffer_index h dst base offset t) ([va_mod_vec_opr dst]) (va_wp_Load128_byte16_buffer_index h dst base offset t b index) (va_wpProof_Load128_byte16_buffer_index h dst base offset t b index)) //-- //-- Store128_byte16_buffer val va_code_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer h src base t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_get_ok va_s0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer h src base t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer h src base t)) = (va_QProc (va_code_Store128_byte16_buffer h src base t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer h src base t b index) (va_wpProof_Store128_byte16_buffer h src base t b index)) //-- //-- Store128_byte16_buffer_index val va_code_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_code val va_codegen_success_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> Tot va_pbool val va_lemma_Store128_byte16_buffer_index : va_b0:va_code -> va_s0:va_state -> h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Store128_byte16_buffer_index h src base offset t) va_s0 /\ va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) /\ va_state_eq va_sM (va_update_mem va_sM (va_update_ok va_sM (va_update_operand_heaplet h va_sM va_s0))))) [@ va_qattr] let va_wp_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_heaplet h va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_is_src_reg_opr base va_s0 /\ va_is_src_reg_opr offset va_s0 /\ va_get_ok va_s0 /\ offset =!= 0 /\ Vale.PPC64LE.Decls.valid_dst_addr #Vale.PPC64LE.Memory.vuint128 (va_eval_heaplet va_s0 h) b index /\ Vale.PPC64LE.Memory.valid_layout_buffer #Vale.PPC64LE.Memory.vuint128 b (va_get_mem_layout va_s0) (va_eval_heaplet va_s0 h) true /\ Vale.PPC64LE.Memory.valid_taint_buf128 b (va_eval_heaplet va_s0 h) ((va_get_mem_layout va_s0).vl_taint) t /\ va_eval_reg_opr va_s0 base + va_eval_reg_opr va_s0 offset == Vale.PPC64LE.Memory.buffer_addr #Vale.PPC64LE.Memory.vuint128 b (va_eval_heaplet va_s0 h) + 16 `op_Multiply` index /\ (forall (va_x_h:va_value_heaplet) (va_x_mem:vale_heap) . let va_sM = va_upd_mem va_x_mem (va_upd_operand_heaplet h va_x_h va_s0) in va_get_ok va_sM /\ va_eval_heaplet va_sM h == buffer128_write b index (Vale.Def.Types_s.reverse_bytes_quad32 (va_eval_vec_opr va_s0 src)) (va_eval_heaplet va_s0 h) ==> va_k va_sM (()))) val va_wpProof_Store128_byte16_buffer_index : h:va_operand_heaplet -> src:va_operand_vec_opr -> base:va_operand_reg_opr -> offset:va_operand_reg_opr -> t:taint -> b:buffer128 -> index:int -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Store128_byte16_buffer_index h src base offset t b index va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Store128_byte16_buffer_index (h:va_operand_heaplet) (src:va_operand_vec_opr) (base:va_operand_reg_opr) (offset:va_operand_reg_opr) (t:taint) (b:buffer128) (index:int) : (va_quickCode unit (va_code_Store128_byte16_buffer_index h src base offset t)) = (va_QProc (va_code_Store128_byte16_buffer_index h src base offset t) ([va_Mod_mem; va_mod_heaplet h]) (va_wp_Store128_byte16_buffer_index h src base offset t b index) (va_wpProof_Store128_byte16_buffer_index h src base offset t b index)) //-- //-- SHA256_sigma0 val va_code_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 15) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_0_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma0 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma0 dst src)) = (va_QProc (va_code_SHA256_sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma0 dst src t block) (va_wpProof_SHA256_sigma0 dst src t block)) //-- //-- SHA256_sigma1 val va_code_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ ((16 <= t && t < size_k_w_256)) /\ (va_eval_vec_opr va_s0 src).hi3 == ws_opaque block (t - 2) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ (va_eval_vec_opr va_sM dst).hi3 == sigma_0_1_partial t block ==> va_k va_sM (()))) val va_wpProof_SHA256_sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_sigma1 dst src t block va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) : (va_quickCode unit (va_code_SHA256_sigma1 dst src)) = (va_QProc (va_code_SHA256_sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_sigma1 dst src t block) (va_wpProof_SHA256_sigma1 dst src t block)) //-- //-- SHA256_Sigma0 val va_code_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma0 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma0 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 0) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_0_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma0 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma0 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma0 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma0 dst src)) = (va_QProc (va_code_SHA256_Sigma0 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma0 dst src t block hash_orig) (va_wpProof_SHA256_Sigma0 dst src t block hash_orig)) //-- //-- SHA256_Sigma1 val va_code_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_SHA256_Sigma1 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_SHA256_Sigma1 dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ t < size_k_w_256 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src) == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word (Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale t block hash_orig) 4) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_sM dst) == Vale.SHA.PPC64LE.SHA_helpers.sigma_1_1_partial t block hash_orig ==> va_k va_sM (()))) val va_wpProof_SHA256_Sigma1 : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> t:counter -> block:block_w -> hash_orig:hash256 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_SHA256_Sigma1 dst src t block hash_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_SHA256_Sigma1 (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (t:counter) (block:block_w) (hash_orig:hash256) : (va_quickCode unit (va_code_SHA256_Sigma1 dst src)) = (va_QProc (va_code_SHA256_Sigma1 dst src) ([va_mod_vec_opr dst]) (va_wp_SHA256_Sigma1 dst src t block hash_orig) (va_wpProof_SHA256_Sigma1 dst src t block hash_orig)) //-- //-- Vsbox val va_code_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vsbox : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vsbox dst src) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src))) (Vale.AES.AES_common_s.sub_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src))) ==> va_k va_sM (()))) val va_wpProof_Vsbox : dst:va_operand_vec_opr -> src:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vsbox dst src va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vsbox (dst:va_operand_vec_opr) (src:va_operand_vec_opr) : (va_quickCode unit (va_code_Vsbox dst src)) = (va_QProc (va_code_Vsbox dst src) ([va_mod_vec_opr dst]) (va_wp_Vsbox dst src) (va_wpProof_Vsbox dst src)) //-- //-- RotWord val va_code_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_RotWord : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_RotWord dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src2) == 8 /\ Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src2) == 8) /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo0 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__lo1 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi2 (va_eval_vec_opr va_s0 src1))) (Vale.AES.AES_BE_s.rot_word (Vale.Def.Words_s.__proj__Mkfour__item__hi3 (va_eval_vec_opr va_s0 src1))) ==> va_k va_sM (()))) val va_wpProof_RotWord : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_RotWord dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_RotWord (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_RotWord dst src1 src2)) = (va_QProc (va_code_RotWord dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_RotWord dst src1 src2) (va_wpProof_RotWord dst src1 src2)) //-- //-- Vcipher val va_code_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipher : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipher dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1)))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vcipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcipher dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipher dst src1 src2)) = (va_QProc (va_code_Vcipher dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipher dst src1 src2) (va_wpProof_Vcipher dst src1 src2)) //-- //-- Vcipherlast val va_code_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vcipherlast : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vcipherlast dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vcipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_common_s.sub_bytes (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vcipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vcipherlast dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vcipherlast dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vcipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vcipherlast dst src1 src2)) = (va_QProc (va_code_Vcipherlast dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vcipherlast dst src1 src2) (va_wpProof_Vcipherlast dst src1 src2)) //-- //-- Vncipher val va_code_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vncipher : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vncipher dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.AES.AES_BE_s.inv_mix_columns (Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2)) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vncipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.AES.AES_BE_s.inv_mix_columns (Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2)) ==> va_k va_sM (()))) val va_wpProof_Vncipher : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vncipher dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vncipher dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vncipher (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vncipher dst src1 src2)) = (va_QProc (va_code_Vncipher dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vncipher dst src1 src2) (va_wpProof_Vncipher dst src1 src2)) //-- //-- Vncipherlast val va_code_Vncipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vncipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vncipherlast : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vncipherlast dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vncipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Def.Types_s.quad32_xor (Vale.AES.AES_common_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (va_eval_vec_opr va_s0 src1))) (va_eval_vec_opr va_s0 src2) ==> va_k va_sM (()))) val va_wpProof_Vncipherlast : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vncipherlast dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vncipherlast dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Vncipherlast (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) : (va_quickCode unit (va_code_Vncipherlast dst src1 src2)) = (va_QProc (va_code_Vncipherlast dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vncipherlast dst src1 src2) (va_wpProof_Vncipherlast dst src1 src2)) //-- //-- Vpmsumd val va_code_Vpmsumd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_code val va_codegen_success_Vpmsumd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Tot va_pbool val va_lemma_Vpmsumd : va_b0:va_code -> va_s0:va_state -> dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Vpmsumd dst src1 src2) va_s0 /\ va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2_s.add (Vale.Math.Poly2_s.mul (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_lo (va_eval_vec_opr va_s0 src1))) (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_lo (va_eval_vec_opr va_s0 src2)))) (Vale.Math.Poly2_s.mul (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_hi (va_eval_vec_opr va_s0 src1))) (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_hi (va_eval_vec_opr va_s0 src2))))) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_vec_opr dst va_sM va_s0)))) [@ va_qattr] let va_wp_Vpmsumd (dst:va_operand_vec_opr) (src1:va_operand_vec_opr) (src2:va_operand_vec_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_is_dst_vec_opr dst va_s0 /\ va_is_src_vec_opr src1 va_s0 /\ va_is_src_vec_opr src2 va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_vec_opr) . let va_sM = va_upd_operand_vec_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_vec_opr va_sM dst == Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2_s.add (Vale.Math.Poly2_s.mul (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_lo (va_eval_vec_opr va_s0 src1))) (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_lo (va_eval_vec_opr va_s0 src2)))) (Vale.Math.Poly2_s.mul (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_hi (va_eval_vec_opr va_s0 src1))) (Vale.Math.Poly2.Bits_s.of_double32 (Vale.Arch.Types.quad32_double_hi (va_eval_vec_opr va_s0 src2))))) ==> va_k va_sM (()))) val va_wpProof_Vpmsumd : dst:va_operand_vec_opr -> src1:va_operand_vec_opr -> src2:va_operand_vec_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Vpmsumd dst src1 src2 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Vpmsumd dst src1 src2) ([va_mod_vec_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))	{ "checked_file": "/", "dependencies": [ "Vale.SHA.PPC64LE.SHA_helpers.fsti.checked", "Vale.PPC64LE.State.fsti.checked", "Vale.PPC64LE.QuickCode.fst.checked", "Vale.PPC64LE.Memory.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.PPC64LE.InsMem.fsti.checked", "Vale.PPC64LE.InsBasic.fsti.checked", "Vale.PPC64LE.Decls.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "Vale.AES.AES_BE_s.fst.checked", "Spec.SHA2.fsti.checked", "Spec.Hash.Definitions.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.InsVector.fsti" }	[ { "abbrev": true, "full_module": "Vale.PPC64LE.Semantics_s", "short_module": "S" }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_BE_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.SHA.PPC64LE.SHA_helpers", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Spec.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	dst: Vale.PPC64LE.Decls.va_operand_vec_opr -> src1: Vale.PPC64LE.Decls.va_operand_vec_opr -> src2: Vale.PPC64LE.Decls.va_operand_vec_opr -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsVector.va_code_Vpmsumd dst src1 src2)	Prims.Tot	[ "total" ]	[]	[ "Vale.PPC64LE.Decls.va_operand_vec_opr", "Vale.PPC64LE.QuickCode.va_QProc", "Prims.unit", "Vale.PPC64LE.InsVector.va_code_Vpmsumd", "Prims.Cons", "Vale.PPC64LE.QuickCode.mod_t", "Vale.PPC64LE.QuickCode.va_mod_vec_opr", "Prims.Nil", "Vale.PPC64LE.InsVector.va_wp_Vpmsumd", "Vale.PPC64LE.InsVector.va_wpProof_Vpmsumd", "Vale.PPC64LE.QuickCode.va_quickCode" ]	[]	false	false	false	false	false	let va_quick_Vpmsumd (dst src1 src2: va_operand_vec_opr) : (va_quickCode unit (va_code_Vpmsumd dst src1 src2)) =	(va_QProc (va_code_Vpmsumd dst src1 src2) ([va_mod_vec_opr dst]) (va_wp_Vpmsumd dst src1 src2) (va_wpProof_Vpmsumd dst src1 src2))	false
Steel.Effect.fsti	Steel.Effect.return_req	val return_req (p: vprop) : req_t p	val return_req (p: vprop) : req_t p	let return_req (p:vprop) : req_t p = fun _ -> True	{ "file_name": "lib/steel/Steel.Effect.fsti", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }	{ "end_col": 50, "end_line": 42, "start_col": 0, "start_line": 42 }	(* Copyright 2020 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. ) module Steel.Effect open Steel.Memory module Mem = Steel.Memory module FExt = FStar.FunctionalExtensionality open FStar.Ghost module T = FStar.Tactics include Steel.Effect.Common /// This module defines the main Steel effect, with requires and ensures predicates operating on /// selectors, which will be discharged by SMT #set-options "--warn_error -330" //turn off the experimental feature warning #set-options "--ide_id_info_off" ( Defining the Steel effect with selectors *) /// The underlying representation of Steel computations. /// The framed bit indicates whether this computation has already been framed. This corresponds to the \|- and \|-_F modalities /// in the ICFP21 paper val repr (a:Type) (framed:bool) (pre:pre_t) (post:post_t a) (req:req_t pre) (ens:ens_t pre a post) : Type u#2 /// Logical precondition of the return combinator	{ "checked_file": "/", "dependencies": [ "Steel.Memory.fsti.checked", "Steel.Effect.Common.fsti.checked", "prims.fst.checked", "FStar.Tactics.fst.checked", "FStar.Set.fsti.checked", "FStar.Pervasives.fsti.checked", "FStar.Ghost.fsti.checked", "FStar.FunctionalExtensionality.fsti.checked" ], "interface_file": false, "source_file": "Steel.Effect.fsti" }	[ { "abbrev": false, "full_module": "Steel.Effect.Common", "short_module": null }, { "abbrev": true, "full_module": "FStar.Tactics", "short_module": "T" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": true, "full_module": "FStar.FunctionalExtensionality", "short_module": "FExt" }, { "abbrev": true, "full_module": "Steel.Memory", "short_module": "Mem" }, { "abbrev": false, "full_module": "Steel.Memory", "short_module": null }, { "abbrev": false, "full_module": "Steel", "short_module": null }, { "abbrev": false, "full_module": "Steel", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	p: Steel.Effect.Common.vprop -> Steel.Effect.Common.req_t p	Prims.Tot	[ "total" ]	[]	[ "Steel.Effect.Common.vprop", "Steel.Effect.Common.rmem", "Prims.l_True", "Steel.Effect.Common.req_t" ]	[]	false	false	false	false	false	let return_req (p: vprop) : req_t p =	fun _ -> True	false
LowStar.RVector.fst	LowStar.RVector.alloc	val alloc: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ HS.fresh_region (V.frameOf rv) h0 h1 /\ V.size_of rv = len /\ V.forall_all h1 rv (fun r -> Rgl?.r_alloc_p rg r) /\ S.equal (as_seq h1 rv) (S.create (U32.v len) (Ghost.reveal (Rgl?.irepr rg)))))	val alloc: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ HS.fresh_region (V.frameOf rv) h0 h1 /\ V.size_of rv = len /\ V.forall_all h1 rv (fun r -> Rgl?.r_alloc_p rg r) /\ S.equal (as_seq h1 rv) (S.create (U32.v len) (Ghost.reveal (Rgl?.irepr rg)))))	let alloc #a #rst rg len = let nrid = HST.new_region HS.root in alloc_rid rg len nrid	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 23, "end_line": 793, "start_col": 0, "start_line": 791 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv)) let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /// Representation val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j) let rec as_seq_seq #a #rst rg h rs i j = if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1))) val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i}) (decreases (U32.v j)) let as_seq_sub #a #rst #rg h rv i j = as_seq_seq rg h (V.as_seq h rv) (U32.v i) (U32.v j) val as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v (V.size_of rv)}) let as_seq #a #rst #rg h rv = as_seq_sub h rv 0ul (V.size_of rv) val as_seq_sub_as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> Lemma (S.equal (as_seq_sub h rv 0ul (V.size_of rv)) (as_seq h rv)) [SMTPat (as_seq_sub h rv 0ul (V.size_of rv))] let as_seq_sub_as_seq #a #rst #rg h rv = () val as_seq_seq_index: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{k < j - i} -> Lemma (requires true) (ensures (S.index (as_seq_seq rg h rs i j) k == Rgl?.r_repr rg h (S.index rs (i + k)))) (decreases j) [SMTPat (S.index (as_seq_seq rg h rs i j) k)] let rec as_seq_seq_index #a #rst rg h rs i j k = if i = j then () else if k = j - i - 1 then () else as_seq_seq_index rg h rs i (j - 1) k val as_seq_seq_eq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs1:S.seq a -> rs2:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs1 /\ rs_elems_inv rg h rs1 i j} -> k:nat -> l:nat{k <= l /\ l <= S.length rs2 /\ rs_elems_inv rg h rs2 k l} -> Lemma (requires (S.equal (S.slice rs1 i j) (S.slice rs2 k l))) (ensures (S.equal (as_seq_seq rg h rs1 i j) (as_seq_seq rg h rs2 k l))) let as_seq_seq_eq #a #rst rg h rs1 rs2 i j k l = assert (forall (a:nat{a < j - i}). S.index (as_seq_seq rg h rs1 i j) a == Rgl?.r_repr rg h (S.index rs1 (i + a))); assert (forall (a:nat{a < l - k}). S.index (as_seq_seq rg h rs2 k l) a == Rgl?.r_repr rg h (S.index rs2 (k + a))); assert (S.length (S.slice rs1 i j) = j - i); assert (S.length (S.slice rs2 k l) = l - k); assert (forall (a:nat{a < j - i}). S.index (S.slice rs1 i j) a == S.index (S.slice rs2 k l) a); assert (forall (a:nat{a < j - i}). S.index rs1 (i + a) == S.index rs2 (k + a)) val as_seq_seq_slice: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat -> l:nat{k <= l && l <= j - i} -> Lemma (S.equal (S.slice (as_seq_seq rg h rs i j) k l) (as_seq_seq rg h (S.slice rs (i + k) (i + l)) 0 (l - k))) #reset-options "--z3rlimit 10" let rec as_seq_seq_slice #a #rst rg h rs i j k l = if k = l then () else (as_seq_seq_slice rg h rs i j k (l - 1); as_seq_seq_index rg h rs i j (l - 1); as_seq_seq_eq rg h (S.slice rs (i + k) (i + l - 1)) (S.slice rs (i + k) (i + l)) 0 (l - k - 1) 0 (l - k - 1)) val as_seq_seq_upd: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{ i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{i <= k && k < j} -> v:a{rg_inv rg h v} -> Lemma (S.equal (as_seq_seq rg h (S.upd rs k v) i j) (S.upd (as_seq_seq rg h rs i j) (k - i) (Rgl?.r_repr rg h v))) let rec as_seq_seq_upd #a #rst rg h rs i j k v = if i = j then () else if k = j - 1 then () else as_seq_seq_upd rg h rs i (j - 1) k v // Preservation based on disjointness val as_seq_seq_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv_preserved rg rs i j p h0 h1; S.equal (as_seq_seq rg h0 rs i j) (as_seq_seq rg h1 rs i j))) let rec as_seq_seq_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; as_seq_seq_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val as_seq_sub_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ loc_disjoint p (V.loc_vector rv) /\ modifies p h0 h1)) (ensures (rv_elems_inv_preserved rv i j p h0 h1; S.equal (as_seq_sub h0 rv i j) (as_seq_sub h1 rv i j))) let as_seq_sub_preserved #a #rst #rg rv i j p h0 h1 = as_seq_seq_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val as_seq_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv_preserved_ rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv))) let as_seq_preserved_ #a #rst #rg rv p h0 h1 = as_seq_sub_preserved rv 0ul (V.size_of rv) p h0 h1 // The second core lemma of `rvector` val as_seq_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv_preserved rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv))) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let as_seq_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); as_seq_preserved_ rv p h0 h1 /// Construction val alloc_empty: #a:Type0 -> #rst:Type -> rg:regional rst a -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 bv h1 -> h0 == h1 /\ V.size_of bv = 0ul)) let alloc_empty #a #rst rg = V.alloc_empty a val alloc_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> cidx:uint32_t{cidx <= V.size_of rv} -> HST.ST unit (requires (fun h0 -> rv_itself_inv h0 rv)) (ensures (fun h0 _ h1 -> modifies (V.loc_vector_within rv 0ul cidx) h0 h1 /\ rv_itself_inv h1 rv /\ rv_elems_inv h1 rv 0ul cidx /\ rv_elems_reg h1 rv 0ul cidx /\ S.equal (as_seq_sub h1 rv 0ul cidx) (S.create (U32.v cidx) (Ghost.reveal (Rgl?.irepr rg))) /\ // the loop invariant for this function V.forall_ h1 rv 0ul cidx (fun r -> HS.fresh_region (Rgl?.region_of rg r) h0 h1 /\ Rgl?.r_alloc_p rg r) /\ Set.subset (Map.domain (HS.get_hmap h0)) (Map.domain (HS.get_hmap h1)))) (decreases (U32.v cidx)) #reset-options "--z3rlimit 20" let rec alloc_ #a #rst #rg rv cidx = let hh0 = HST.get () in if cidx = 0ul then () else (let nrid = HST.new_region (V.frameOf rv) in let v = rg_alloc rg nrid in let hh1 = HST.get () in V.assign rv (cidx - 1ul) v; let hh2 = HST.get () in V.loc_vector_within_included rv (cidx - 1ul) cidx; Rgl?.r_sep rg (V.get hh2 rv (cidx - 1ul)) (V.loc_vector_within rv (cidx - 1ul) cidx) hh1 hh2; alloc_ rv (cidx - 1ul); let hh3 = HST.get () in V.loc_vector_within_included rv 0ul (cidx - 1ul); Rgl?.r_sep rg (V.get hh3 rv (cidx - 1ul)) (V.loc_vector_within rv 0ul (cidx - 1ul)) hh2 hh3; V.forall2_extend hh3 rv 0ul (cidx - 1ul) (fun r1 r2 -> HS.disjoint (Rgl?.region_of rg r1) (Rgl?.region_of rg r2)); V.loc_vector_within_union_rev rv 0ul cidx) val alloc_rid: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> rid:HST.erid -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ V.frameOf rv = rid /\ V.size_of rv = len /\ V.forall_all h1 rv (fun r -> Rgl?.r_alloc_p rg r) /\ S.equal (as_seq h1 rv) (S.create (U32.v len) (Ghost.reveal (Rgl?.irepr rg))))) let alloc_rid #a #rst rg len rid = let vec = V.alloc_rid len (rg_dummy rg) rid in alloc_ #a #rst #rg vec len; V.loc_vector_within_included vec 0ul len; vec val alloc_reserve: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> rid:HST.erid -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ V.frameOf rv = rid /\ V.size_of rv = 0ul /\ S.equal (as_seq h1 rv) S.empty /\ Set.equal (Map.domain (HS.get_hmap h0)) (Map.domain (HS.get_hmap h1)) /\ B.fresh_loc (V.loc_vector rv) h0 h1)) let alloc_reserve #a #rst rg len rid = V.alloc_reserve len (rg_dummy rg) rid val alloc: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ HS.fresh_region (V.frameOf rv) h0 h1 /\ V.size_of rv = len /\ V.forall_all h1 rv (fun r -> Rgl?.r_alloc_p rg r) /\ S.equal (as_seq h1 rv)	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> len: LowStar.Vector.uint32_t{len > 0ul} -> FStar.HyperStack.ST.ST (LowStar.RVector.rvector rg)	FStar.HyperStack.ST.ST	[]	[]	[ "LowStar.Regional.regional", "LowStar.Vector.uint32_t", "Prims.b2t", "FStar.Integers.op_Greater", "FStar.Integers.Unsigned", "FStar.Integers.W32", "FStar.UInt32.__uint_to_t", "LowStar.RVector.alloc_rid", "LowStar.RVector.rvector", "FStar.Monotonic.HyperHeap.rid", "FStar.HyperStack.ST.new_region", "FStar.Monotonic.HyperHeap.root" ]	[]	false	true	false	false	false	let alloc #a #rst rg len =	let nrid = HST.new_region HS.root in alloc_rid rg len nrid	false
FStar.Universe.fst	FStar.Universe.raise_t	val raise_t ([@@@ strictly_positive] _ : Type u#a) : Type u#(max a b)	val raise_t ([@@@ strictly_positive] _ : Type u#a) : Type u#(max a b)	let raise_t a = raise0 a	{ "file_name": "ulib/FStar.Universe.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 24, "end_line": 26, "start_col": 0, "start_line": 26 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. ) module FStar.Universe (* This module implements some basic facilities to raise the universe of a type * * The type [raise_t a] is supposed to be isomorphic to [a] but in a higher * * universe. The two functions [raise_val] and [downgrade_val] allow to coerce * * from [a] to [raise_t a] and back. **) noeq type raise0 (a : Type u#a) : Type u#(max a b) = \| Ret : a -> raise0 a	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": true, "source_file": "FStar.Universe.fst" }	[ { "abbrev": false, "full_module": "FStar", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	a: Type -> Type	Prims.Tot	[ "total" ]	[]	[ "FStar.Universe.raise0" ]	[]	false	false	false	true	true	let raise_t a =	raise0 a	false
LowStar.RVector.fst	LowStar.RVector.as_seq_seq_eq	val as_seq_seq_eq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs1:S.seq a -> rs2:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs1 /\ rs_elems_inv rg h rs1 i j} -> k:nat -> l:nat{k <= l /\ l <= S.length rs2 /\ rs_elems_inv rg h rs2 k l} -> Lemma (requires (S.equal (S.slice rs1 i j) (S.slice rs2 k l))) (ensures (S.equal (as_seq_seq rg h rs1 i j) (as_seq_seq rg h rs2 k l)))	val as_seq_seq_eq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs1:S.seq a -> rs2:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs1 /\ rs_elems_inv rg h rs1 i j} -> k:nat -> l:nat{k <= l /\ l <= S.length rs2 /\ rs_elems_inv rg h rs2 k l} -> Lemma (requires (S.equal (S.slice rs1 i j) (S.slice rs2 k l))) (ensures (S.equal (as_seq_seq rg h rs1 i j) (as_seq_seq rg h rs2 k l)))	let as_seq_seq_eq #a #rst rg h rs1 rs2 i j k l = assert (forall (a:nat{a < j - i}). S.index (as_seq_seq rg h rs1 i j) a == Rgl?.r_repr rg h (S.index rs1 (i + a))); assert (forall (a:nat{a < l - k}). S.index (as_seq_seq rg h rs2 k l) a == Rgl?.r_repr rg h (S.index rs2 (k + a))); assert (S.length (S.slice rs1 i j) = j - i); assert (S.length (S.slice rs2 k l) = l - k); assert (forall (a:nat{a < j - i}). S.index (S.slice rs1 i j) a == S.index (S.slice rs2 k l) a); assert (forall (a:nat{a < j - i}). S.index rs1 (i + a) == S.index rs2 (k + a))	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 54, "end_line": 580, "start_col": 0, "start_line": 567 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv)) let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /// Representation val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j) let rec as_seq_seq #a #rst rg h rs i j = if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1))) val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i}) (decreases (U32.v j)) let as_seq_sub #a #rst #rg h rv i j = as_seq_seq rg h (V.as_seq h rv) (U32.v i) (U32.v j) val as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v (V.size_of rv)}) let as_seq #a #rst #rg h rv = as_seq_sub h rv 0ul (V.size_of rv) val as_seq_sub_as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> Lemma (S.equal (as_seq_sub h rv 0ul (V.size_of rv)) (as_seq h rv)) [SMTPat (as_seq_sub h rv 0ul (V.size_of rv))] let as_seq_sub_as_seq #a #rst #rg h rv = () val as_seq_seq_index: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{k < j - i} -> Lemma (requires true) (ensures (S.index (as_seq_seq rg h rs i j) k == Rgl?.r_repr rg h (S.index rs (i + k)))) (decreases j) [SMTPat (S.index (as_seq_seq rg h rs i j) k)] let rec as_seq_seq_index #a #rst rg h rs i j k = if i = j then () else if k = j - i - 1 then () else as_seq_seq_index rg h rs i (j - 1) k val as_seq_seq_eq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs1:S.seq a -> rs2:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs1 /\ rs_elems_inv rg h rs1 i j} -> k:nat -> l:nat{k <= l /\ l <= S.length rs2 /\ rs_elems_inv rg h rs2 k l} -> Lemma (requires (S.equal (S.slice rs1 i j) (S.slice rs2 k l))) (ensures (S.equal (as_seq_seq rg h rs1 i j)	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> h: FStar.Monotonic.HyperStack.mem -> rs1: FStar.Seq.Base.seq a -> rs2: FStar.Seq.Base.seq a -> i: FStar.Integers.nat -> j: FStar.Integers.nat {i <= j /\ j <= FStar.Seq.Base.length rs1 /\ LowStar.RVector.rs_elems_inv rg h rs1 i j} -> k: FStar.Integers.nat -> l: FStar.Integers.nat {k <= l /\ l <= FStar.Seq.Base.length rs2 /\ LowStar.RVector.rs_elems_inv rg h rs2 k l} -> FStar.Pervasives.Lemma (requires FStar.Seq.Base.equal (FStar.Seq.Base.slice rs1 i j) (FStar.Seq.Base.slice rs2 k l)) (ensures FStar.Seq.Base.equal (LowStar.RVector.as_seq_seq rg h rs1 i j) (LowStar.RVector.as_seq_seq rg h rs2 k l))	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "FStar.Seq.Base.seq", "FStar.Integers.nat", "Prims.l_and", "Prims.b2t", "FStar.Integers.op_Less_Equals", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.Seq.Base.length", "LowStar.RVector.rs_elems_inv", "Prims._assert", "Prims.l_Forall", "FStar.Integers.op_Less", "FStar.Integers.op_Subtraction", "Prims.eq2", "FStar.Seq.Base.index", "FStar.Integers.op_Plus", "Prims.unit", "FStar.Seq.Base.slice", "Prims.op_Equality", "Prims.int", "LowStar.Regional.__proj__Rgl__item__repr", "LowStar.RVector.as_seq_seq", "LowStar.Regional.__proj__Rgl__item__r_repr" ]	[]	false	false	true	false	false	let as_seq_seq_eq #a #rst rg h rs1 rs2 i j k l =	assert (forall (a: nat{a < j - i}). S.index (as_seq_seq rg h rs1 i j) a == Rgl?.r_repr rg h (S.index rs1 (i + a))); assert (forall (a: nat{a < l - k}). S.index (as_seq_seq rg h rs2 k l) a == Rgl?.r_repr rg h (S.index rs2 (k + a))); assert (S.length (S.slice rs1 i j) = j - i); assert (S.length (S.slice rs2 k l) = l - k); assert (forall (a: nat{a < j - i}). S.index (S.slice rs1 i j) a == S.index (S.slice rs2 k l) a); assert (forall (a: nat{a < j - i}). S.index rs1 (i + a) == S.index rs2 (k + a))	false
FStar.Universe.fst	FStar.Universe.raise_val	val raise_val : #a:Type u#a -> x:a -> raise_t u#a u#b a	val raise_val : #a:Type u#a -> x:a -> raise_t u#a u#b a	let raise_val #a x = Ret x	{ "file_name": "ulib/FStar.Universe.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 26, "end_line": 27, "start_col": 0, "start_line": 27 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. ) module FStar.Universe (* This module implements some basic facilities to raise the universe of a type * * The type [raise_t a] is supposed to be isomorphic to [a] but in a higher * * universe. The two functions [raise_val] and [downgrade_val] allow to coerce * * from [a] to [raise_t a] and back. **) noeq type raise0 (a : Type u#a) : Type u#(max a b) = \| Ret : a -> raise0 a	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": true, "source_file": "FStar.Universe.fst" }	[ { "abbrev": false, "full_module": "FStar", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	x: a -> FStar.Universe.raise_t a	Prims.Tot	[ "total" ]	[]	[ "FStar.Universe.Ret", "FStar.Universe.raise_t" ]	[]	false	false	false	true	false	let raise_val #a x =	Ret x	false
LowStar.RVector.fst	LowStar.RVector.as_seq_seq_upd	val as_seq_seq_upd: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{ i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{i <= k && k < j} -> v:a{rg_inv rg h v} -> Lemma (S.equal (as_seq_seq rg h (S.upd rs k v) i j) (S.upd (as_seq_seq rg h rs i j) (k - i) (Rgl?.r_repr rg h v)))	val as_seq_seq_upd: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{ i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{i <= k && k < j} -> v:a{rg_inv rg h v} -> Lemma (S.equal (as_seq_seq rg h (S.upd rs k v) i j) (S.upd (as_seq_seq rg h rs i j) (k - i) (Rgl?.r_repr rg h v)))	let rec as_seq_seq_upd #a #rst rg h rs i j k v = if i = j then () else if k = j - 1 then () else as_seq_seq_upd rg h rs i (j - 1) k v	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 43, "end_line": 614, "start_col": 0, "start_line": 611 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv)) let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /// Representation val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j) let rec as_seq_seq #a #rst rg h rs i j = if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1))) val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i}) (decreases (U32.v j)) let as_seq_sub #a #rst #rg h rv i j = as_seq_seq rg h (V.as_seq h rv) (U32.v i) (U32.v j) val as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v (V.size_of rv)}) let as_seq #a #rst #rg h rv = as_seq_sub h rv 0ul (V.size_of rv) val as_seq_sub_as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> Lemma (S.equal (as_seq_sub h rv 0ul (V.size_of rv)) (as_seq h rv)) [SMTPat (as_seq_sub h rv 0ul (V.size_of rv))] let as_seq_sub_as_seq #a #rst #rg h rv = () val as_seq_seq_index: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{k < j - i} -> Lemma (requires true) (ensures (S.index (as_seq_seq rg h rs i j) k == Rgl?.r_repr rg h (S.index rs (i + k)))) (decreases j) [SMTPat (S.index (as_seq_seq rg h rs i j) k)] let rec as_seq_seq_index #a #rst rg h rs i j k = if i = j then () else if k = j - i - 1 then () else as_seq_seq_index rg h rs i (j - 1) k val as_seq_seq_eq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs1:S.seq a -> rs2:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs1 /\ rs_elems_inv rg h rs1 i j} -> k:nat -> l:nat{k <= l /\ l <= S.length rs2 /\ rs_elems_inv rg h rs2 k l} -> Lemma (requires (S.equal (S.slice rs1 i j) (S.slice rs2 k l))) (ensures (S.equal (as_seq_seq rg h rs1 i j) (as_seq_seq rg h rs2 k l))) let as_seq_seq_eq #a #rst rg h rs1 rs2 i j k l = assert (forall (a:nat{a < j - i}). S.index (as_seq_seq rg h rs1 i j) a == Rgl?.r_repr rg h (S.index rs1 (i + a))); assert (forall (a:nat{a < l - k}). S.index (as_seq_seq rg h rs2 k l) a == Rgl?.r_repr rg h (S.index rs2 (k + a))); assert (S.length (S.slice rs1 i j) = j - i); assert (S.length (S.slice rs2 k l) = l - k); assert (forall (a:nat{a < j - i}). S.index (S.slice rs1 i j) a == S.index (S.slice rs2 k l) a); assert (forall (a:nat{a < j - i}). S.index rs1 (i + a) == S.index rs2 (k + a)) val as_seq_seq_slice: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat -> l:nat{k <= l && l <= j - i} -> Lemma (S.equal (S.slice (as_seq_seq rg h rs i j) k l) (as_seq_seq rg h (S.slice rs (i + k) (i + l)) 0 (l - k))) #reset-options "--z3rlimit 10" let rec as_seq_seq_slice #a #rst rg h rs i j k l = if k = l then () else (as_seq_seq_slice rg h rs i j k (l - 1); as_seq_seq_index rg h rs i j (l - 1); as_seq_seq_eq rg h (S.slice rs (i + k) (i + l - 1)) (S.slice rs (i + k) (i + l)) 0 (l - k - 1) 0 (l - k - 1)) val as_seq_seq_upd: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{ i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{i <= k && k < j} -> v:a{rg_inv rg h v} -> Lemma (S.equal (as_seq_seq rg h (S.upd rs k v) i j) (S.upd (as_seq_seq rg h rs i j) (k - i)	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 10, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> h: FStar.Monotonic.HyperStack.mem -> rs: FStar.Seq.Base.seq a -> i: FStar.Integers.nat -> j: FStar.Integers.nat {i <= j /\ j <= FStar.Seq.Base.length rs /\ LowStar.RVector.rs_elems_inv rg h rs i j} -> k: FStar.Integers.nat{i <= k && k < j} -> v: a{LowStar.Regional.rg_inv rg h v} -> FStar.Pervasives.Lemma (ensures FStar.Seq.Base.equal (LowStar.RVector.as_seq_seq rg h (FStar.Seq.Base.upd rs k v) i j) (FStar.Seq.Base.upd (LowStar.RVector.as_seq_seq rg h rs i j) (k - i) (Rgl?.r_repr rg h v)))	FStar.Pervasives.Lemma	[ "lemma" ]	[]	[ "LowStar.Regional.regional", "FStar.Monotonic.HyperStack.mem", "FStar.Seq.Base.seq", "FStar.Integers.nat", "Prims.l_and", "Prims.b2t", "FStar.Integers.op_Less_Equals", "FStar.Integers.Signed", "FStar.Integers.Winfinite", "FStar.Seq.Base.length", "LowStar.RVector.rs_elems_inv", "Prims.op_AmpAmp", "FStar.Integers.op_Less", "LowStar.Regional.rg_inv", "Prims.op_Equality", "Prims.bool", "FStar.Integers.int_t", "FStar.Integers.op_Subtraction", "LowStar.RVector.as_seq_seq_upd", "Prims.unit" ]	[ "recursion" ]	false	false	true	false	false	let rec as_seq_seq_upd #a #rst rg h rs i j k v =	if i = j then () else if k = j - 1 then () else as_seq_seq_upd rg h rs i (j - 1) k v	false
FStar.Universe.fst	FStar.Universe.downgrade_val	val downgrade_val : #a:Type u#a -> x:raise_t u#a u#b a -> a	val downgrade_val : #a:Type u#a -> x:raise_t u#a u#b a -> a	let downgrade_val #a x = match x with Ret x0 -> x0	{ "file_name": "ulib/FStar.Universe.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 50, "end_line": 28, "start_col": 0, "start_line": 28 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. ) module FStar.Universe (* This module implements some basic facilities to raise the universe of a type * * The type [raise_t a] is supposed to be isomorphic to [a] but in a higher * * universe. The two functions [raise_val] and [downgrade_val] allow to coerce * * from [a] to [raise_t a] and back. **) noeq type raise0 (a : Type u#a) : Type u#(max a b) = \| Ret : a -> raise0 a let raise_t a = raise0 a	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": true, "source_file": "FStar.Universe.fst" }	[ { "abbrev": false, "full_module": "FStar", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	x: FStar.Universe.raise_t a -> a	Prims.Tot	[ "total" ]	[]	[ "FStar.Universe.raise_t" ]	[]	false	false	false	true	false	let downgrade_val #a x =	match x with \| Ret x0 -> x0	false
Vale.AES.X64.GHash.fst	Vale.AES.X64.GHash.va_codegen_success_Compute_ghash_incremental_register	val va_codegen_success_Compute_ghash_incremental_register : va_dummy:unit -> Tot va_pbool	val va_codegen_success_Compute_ghash_incremental_register : va_dummy:unit -> Tot va_pbool	let va_codegen_success_Compute_ghash_incremental_register () = (va_pbool_and (va_codegen_success_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_Mov128 (va_op_xmm_xmm 2) (va_op_xmm_xmm 11)) (va_pbool_and (va_codegen_success_ReduceMul128_LE ()) (va_ttrue ()))))	{ "file_name": "obj/Vale.AES.X64.GHash.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 60, "end_line": 210, "start_col": 0, "start_line": 207 }	module Vale.AES.X64.GHash open Vale.Def.Opaque_s open FStar.Seq open Vale.Def.Words_s open Vale.Def.Types_s open Vale.Arch.Types open Vale.AES.AES_s open Vale.AES.GHash_s open Vale.AES.GHash open Vale.AES.GF128_s open Vale.AES.GF128 open Vale.AES.GCTR_s open Vale.AES.GCM_helpers open Vale.Math.Poly2_s open Vale.Poly1305.Math open Vale.AES.X64.GF128_Mul open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsVector open Vale.X64.InsAes open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.X64.CPU_Features_s #reset-options "--z3rlimit 30" //-- Compute_Y0 val va_code_Compute_Y0 : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Compute_Y0 () = (va_Block (va_CCons (va_code_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_CNil ()))) val va_codegen_success_Compute_Y0 : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Compute_Y0 () = (va_pbool_and (va_codegen_success_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Compute_Y0 (va_mods:va_mods_t) : (va_quickCode unit (va_code_Compute_Y0 ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QBind va_range1 "*** PRECONDITION NOT MET AT line 83 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "* PRECONDITION NOT MET AT line 84 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (fun (_:unit) -> Vale.Arch.Types.lemma_quad32_xor ()) (va_QEmpty (()))))) val va_lemma_Compute_Y0 : va_b0:va_code -> va_s0:va_state -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Compute_Y0 ()) va_s0 /\ va_get_ok va_s0 /\ sse_enabled)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM va_s0))))) [@"opaque_to_smt"] let va_lemma_Compute_Y0 va_b0 va_s0 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 1; va_Mod_ok] in let va_qc = va_qcode_Compute_Y0 va_mods in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Compute_Y0 ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "* POSTCONDITION NOT MET AT line 77 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_get_ok va_sM) /\ label va_range1 "* POSTCONDITION NOT MET AT line 81 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 1; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Compute_Y0 (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ sse_enabled /\ (forall (va_x_xmm1:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 1 va_x_xmm1 va_s0) in va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 ==> va_k va_sM (()))) val va_wpProof_Compute_Y0 : va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Compute_Y0 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Compute_Y0 ()) ([va_Mod_flags; va_Mod_xmm 1]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Compute_Y0 va_s0 va_k = let (va_sM, va_f0) = va_lemma_Compute_Y0 (va_code_Compute_Y0 ()) va_s0 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM va_s0)))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 1]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Compute_Y0 () : (va_quickCode unit (va_code_Compute_Y0 ())) = (va_QProc (va_code_Compute_Y0 ()) ([va_Mod_flags; va_Mod_xmm 1]) va_wp_Compute_Y0 va_wpProof_Compute_Y0) //-- //-- ReduceMul128_LE val va_code_ReduceMul128_LE : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_ReduceMul128_LE () = (va_Block (va_CCons (va_code_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_CCons (va_code_ReduceMulRev128 ()) (va_CCons (va_code_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_CNil ()))))) val va_codegen_success_ReduceMul128_LE : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_ReduceMul128_LE () = (va_pbool_and (va_codegen_success_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_pbool_and (va_codegen_success_ReduceMulRev128 ()) (va_pbool_and (va_codegen_success_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_ttrue ())))) [@ "opaque_to_smt" va_qattr] let va_qcode_ReduceMul128_LE (va_mods:va_mods_t) (a:poly) (b:poly) : (va_quickCode unit (va_code_ReduceMul128_LE ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "* PRECONDITION NOT MET AT line 104 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_QSeq va_range1 "* PRECONDITION NOT MET AT line 105 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_ReduceMulRev128 a b) (va_QSeq va_range1 "* PRECONDITION NOT MET AT line 106 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_QEmpty (())))))) val va_lemma_ReduceMul128_LE : va_b0:va_code -> va_s0:va_state -> a:poly -> b:poly -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_ReduceMul128_LE ()) va_s0 /\ va_get_ok va_s0 /\ (pclmulqdq_enabled /\ avx_enabled /\ sse_enabled /\ Vale.Math.Poly2_s.degree a <= 127 /\ Vale.Math.Poly2_s.degree b <= 127 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 a) /\ va_get_xmm 2 va_s0 == Vale.AES.GF128_s.gf128_to_quad32 b /\ va_get_xmm 8 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 (Vale.AES.GF128_s.gf128_mul a b)) /\ va_state_eq va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR12 va_sM (va_update_flags va_sM (va_update_ok va_sM va_s0))))))))))) [@"opaque_to_smt"] let va_lemma_ReduceMul128_LE va_b0 va_s0 a b = let (va_mods:va_mods_t) = [va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_flags; va_Mod_ok] in let va_qc = va_qcode_ReduceMul128_LE va_mods a b in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_ReduceMul128_LE ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "* POSTCONDITION NOT MET AT line 87 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_get_ok va_sM) /\ label va_range1 "* POSTCONDITION NOT MET AT line 102 column 71 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf ***" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 (Vale.AES.GF128_s.gf128_mul a b)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_flags; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_ReduceMul128_LE (a:poly) (b:poly) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (pclmulqdq_enabled /\ avx_enabled /\ sse_enabled /\ Vale.Math.Poly2_s.degree a <= 127 /\ Vale.Math.Poly2_s.degree b <= 127 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 a) /\ va_get_xmm 2 va_s0 == Vale.AES.GF128_s.gf128_to_quad32 b /\ va_get_xmm 8 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051) /\ (forall (va_x_efl:Vale.X64.Flags.t) (va_x_r12:nat64) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) . let va_sM = va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_reg64 rR12 va_x_r12 (va_upd_flags va_x_efl va_s0))))))) in va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 (Vale.AES.GF128_s.gf128_mul a b)) ==> va_k va_sM (()))) val va_wpProof_ReduceMul128_LE : a:poly -> b:poly -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_ReduceMul128_LE a b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_ReduceMul128_LE ()) ([va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_flags]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_ReduceMul128_LE a b va_s0 va_k = let (va_sM, va_f0) = va_lemma_ReduceMul128_LE (va_code_ReduceMul128_LE ()) va_s0 a b in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR12 va_sM (va_update_flags va_sM (va_update_ok va_sM va_s0)))))))))); va_lemma_norm_mods ([va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_flags]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_ReduceMul128_LE (a:poly) (b:poly) : (va_quickCode unit (va_code_ReduceMul128_LE ())) = (va_QProc (va_code_ReduceMul128_LE ()) ([va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_flags]) (va_wp_ReduceMul128_LE a b) (va_wpProof_ReduceMul128_LE a b)) //-- //-- Compute_ghash_incremental_register [@ "opaque_to_smt" va_qattr] let va_code_Compute_ghash_incremental_register () = (va_Block (va_CCons (va_code_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_CCons (va_code_Mov128 (va_op_xmm_xmm 2) (va_op_xmm_xmm 11)) (va_CCons (va_code_ReduceMul128_LE ()) (va_CNil ())))))	{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsVector.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.InsAes.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Poly1305.Math.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Opaque_s.fsti.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.X64.GF128_Mul.fsti.checked", "Vale.AES.GHash_s.fst.checked", "Vale.AES.GHash.fsti.checked", "Vale.AES.GF128_s.fsti.checked", "Vale.AES.GF128.fsti.checked", "Vale.AES.GCTR_s.fst.checked", "Vale.AES.GCM_helpers.fsti.checked", "Vale.AES.AES_s.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": true, "source_file": "Vale.AES.X64.GHash.fst" }	[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.GF128_Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Poly1305.Math", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 30, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	va_dummy: Prims.unit -> Vale.X64.Decls.va_pbool	Prims.Tot	[ "total" ]	[]	[ "Prims.unit", "Vale.X64.Decls.va_pbool_and", "Vale.X64.InsVector.va_codegen_success_Pxor", "Vale.X64.Decls.va_op_xmm_xmm", "Vale.X64.InsVector.va_codegen_success_Mov128", "Vale.AES.X64.GHash.va_codegen_success_ReduceMul128_LE", "Vale.X64.Decls.va_ttrue", "Vale.X64.Decls.va_pbool" ]	[]	false	false	false	true	false	let va_codegen_success_Compute_ghash_incremental_register () =	(va_pbool_and (va_codegen_success_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_Mov128 (va_op_xmm_xmm 2) (va_op_xmm_xmm 11)) (va_pbool_and (va_codegen_success_ReduceMul128_LE ()) (va_ttrue ()))))	false
Vale.AES.X64.GHash.fst	Vale.AES.X64.GHash.va_code_Compute_ghash_incremental_register	val va_code_Compute_ghash_incremental_register : va_dummy:unit -> Tot va_code	val va_code_Compute_ghash_incremental_register : va_dummy:unit -> Tot va_code	let va_code_Compute_ghash_incremental_register () = (va_Block (va_CCons (va_code_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_CCons (va_code_Mov128 (va_op_xmm_xmm 2) (va_op_xmm_xmm 11)) (va_CCons (va_code_ReduceMul128_LE ()) (va_CNil ())))))	{ "file_name": "obj/Vale.AES.X64.GHash.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }	{ "end_col": 97, "end_line": 204, "start_col": 0, "start_line": 202 }	module Vale.AES.X64.GHash open Vale.Def.Opaque_s open FStar.Seq open Vale.Def.Words_s open Vale.Def.Types_s open Vale.Arch.Types open Vale.AES.AES_s open Vale.AES.GHash_s open Vale.AES.GHash open Vale.AES.GF128_s open Vale.AES.GF128 open Vale.AES.GCTR_s open Vale.AES.GCM_helpers open Vale.Math.Poly2_s open Vale.Poly1305.Math open Vale.AES.X64.GF128_Mul open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsVector open Vale.X64.InsAes open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.X64.CPU_Features_s #reset-options "--z3rlimit 30" //-- Compute_Y0 val va_code_Compute_Y0 : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Compute_Y0 () = (va_Block (va_CCons (va_code_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_CNil ()))) val va_codegen_success_Compute_Y0 : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Compute_Y0 () = (va_pbool_and (va_codegen_success_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Compute_Y0 (va_mods:va_mods_t) : (va_quickCode unit (va_code_Compute_Y0 ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QBind va_range1 "*** PRECONDITION NOT MET AT line 83 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "* PRECONDITION NOT MET AT line 84 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (fun (_:unit) -> Vale.Arch.Types.lemma_quad32_xor ()) (va_QEmpty (()))))) val va_lemma_Compute_Y0 : va_b0:va_code -> va_s0:va_state -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Compute_Y0 ()) va_s0 /\ va_get_ok va_s0 /\ sse_enabled)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM va_s0))))) [@"opaque_to_smt"] let va_lemma_Compute_Y0 va_b0 va_s0 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 1; va_Mod_ok] in let va_qc = va_qcode_Compute_Y0 va_mods in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Compute_Y0 ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "* POSTCONDITION NOT MET AT line 77 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_get_ok va_sM) /\ label va_range1 "* POSTCONDITION NOT MET AT line 81 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 1; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Compute_Y0 (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ sse_enabled /\ (forall (va_x_xmm1:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 1 va_x_xmm1 va_s0) in va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 ==> va_k va_sM (()))) val va_wpProof_Compute_Y0 : va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Compute_Y0 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Compute_Y0 ()) ([va_Mod_flags; va_Mod_xmm 1]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Compute_Y0 va_s0 va_k = let (va_sM, va_f0) = va_lemma_Compute_Y0 (va_code_Compute_Y0 ()) va_s0 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM va_s0)))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 1]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Compute_Y0 () : (va_quickCode unit (va_code_Compute_Y0 ())) = (va_QProc (va_code_Compute_Y0 ()) ([va_Mod_flags; va_Mod_xmm 1]) va_wp_Compute_Y0 va_wpProof_Compute_Y0) //-- //-- ReduceMul128_LE val va_code_ReduceMul128_LE : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_ReduceMul128_LE () = (va_Block (va_CCons (va_code_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_CCons (va_code_ReduceMulRev128 ()) (va_CCons (va_code_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_CNil ()))))) val va_codegen_success_ReduceMul128_LE : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_ReduceMul128_LE () = (va_pbool_and (va_codegen_success_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_pbool_and (va_codegen_success_ReduceMulRev128 ()) (va_pbool_and (va_codegen_success_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_ttrue ())))) [@ "opaque_to_smt" va_qattr] let va_qcode_ReduceMul128_LE (va_mods:va_mods_t) (a:poly) (b:poly) : (va_quickCode unit (va_code_ReduceMul128_LE ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "* PRECONDITION NOT MET AT line 104 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_QSeq va_range1 "* PRECONDITION NOT MET AT line 105 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_ReduceMulRev128 a b) (va_QSeq va_range1 "* PRECONDITION NOT MET AT line 106 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_quick_Pshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 8)) (va_QEmpty (())))))) val va_lemma_ReduceMul128_LE : va_b0:va_code -> va_s0:va_state -> a:poly -> b:poly -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_ReduceMul128_LE ()) va_s0 /\ va_get_ok va_s0 /\ (pclmulqdq_enabled /\ avx_enabled /\ sse_enabled /\ Vale.Math.Poly2_s.degree a <= 127 /\ Vale.Math.Poly2_s.degree b <= 127 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 a) /\ va_get_xmm 2 va_s0 == Vale.AES.GF128_s.gf128_to_quad32 b /\ va_get_xmm 8 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 (Vale.AES.GF128_s.gf128_mul a b)) /\ va_state_eq va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR12 va_sM (va_update_flags va_sM (va_update_ok va_sM va_s0))))))))))) [@"opaque_to_smt"] let va_lemma_ReduceMul128_LE va_b0 va_s0 a b = let (va_mods:va_mods_t) = [va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_flags; va_Mod_ok] in let va_qc = va_qcode_ReduceMul128_LE va_mods a b in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_ReduceMul128_LE ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "* POSTCONDITION NOT MET AT line 87 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf *" (va_get_ok va_sM) /\ label va_range1 "* POSTCONDITION NOT MET AT line 102 column 71 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/crypto/aes/x64/Vale.AES.X64.GHash.vaf ***" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 (Vale.AES.GF128_s.gf128_mul a b)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_flags; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_ReduceMul128_LE (a:poly) (b:poly) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (pclmulqdq_enabled /\ avx_enabled /\ sse_enabled /\ Vale.Math.Poly2_s.degree a <= 127 /\ Vale.Math.Poly2_s.degree b <= 127 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 a) /\ va_get_xmm 2 va_s0 == Vale.AES.GF128_s.gf128_to_quad32 b /\ va_get_xmm 8 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051) /\ (forall (va_x_efl:Vale.X64.Flags.t) (va_x_r12:nat64) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) . let va_sM = va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_reg64 rR12 va_x_r12 (va_upd_flags va_x_efl va_s0))))))) in va_get_ok va_sM /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GF128_s.gf128_to_quad32 (Vale.AES.GF128_s.gf128_mul a b)) ==> va_k va_sM (()))) val va_wpProof_ReduceMul128_LE : a:poly -> b:poly -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_ReduceMul128_LE a b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_ReduceMul128_LE ()) ([va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_flags]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_ReduceMul128_LE a b va_s0 va_k = let (va_sM, va_f0) = va_lemma_ReduceMul128_LE (va_code_ReduceMul128_LE ()) va_s0 a b in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR12 va_sM (va_update_flags va_sM (va_update_ok va_sM va_s0)))))))))); va_lemma_norm_mods ([va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_flags]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_ReduceMul128_LE (a:poly) (b:poly) : (va_quickCode unit (va_code_ReduceMul128_LE ())) = (va_QProc (va_code_ReduceMul128_LE ()) ([va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_flags]) (va_wp_ReduceMul128_LE a b) (va_wpProof_ReduceMul128_LE a b)) //-- //-- Compute_ghash_incremental_register	{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsVector.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.InsAes.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Poly1305.Math.fsti.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Opaque_s.fsti.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.X64.GF128_Mul.fsti.checked", "Vale.AES.GHash_s.fst.checked", "Vale.AES.GHash.fsti.checked", "Vale.AES.GF128_s.fsti.checked", "Vale.AES.GF128.fsti.checked", "Vale.AES.GCTR_s.fst.checked", "Vale.AES.GCM_helpers.fsti.checked", "Vale.AES.AES_s.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": true, "source_file": "Vale.AES.X64.GHash.fst" }	[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.GF128_Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Poly1305.Math", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 30, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	va_dummy: Prims.unit -> Vale.X64.Decls.va_code	Prims.Tot	[ "total" ]	[]	[ "Prims.unit", "Vale.X64.Decls.va_Block", "Vale.X64.Decls.va_CCons", "Vale.X64.InsVector.va_code_Pxor", "Vale.X64.Decls.va_op_xmm_xmm", "Vale.X64.InsVector.va_code_Mov128", "Vale.AES.X64.GHash.va_code_ReduceMul128_LE", "Vale.X64.Decls.va_CNil", "Vale.X64.Decls.va_code" ]	[]	false	false	false	true	false	let va_code_Compute_ghash_incremental_register () =	(va_Block (va_CCons (va_code_Pxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_CCons (va_code_Mov128 (va_op_xmm_xmm 2) (va_op_xmm_xmm 11)) (va_CCons (va_code_ReduceMul128_LE ()) (va_CNil ())))))	false
LowStar.RVector.fst	LowStar.RVector.alloc_rid	val alloc_rid: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> rid:HST.erid -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ V.frameOf rv = rid /\ V.size_of rv = len /\ V.forall_all h1 rv (fun r -> Rgl?.r_alloc_p rg r) /\ S.equal (as_seq h1 rv) (S.create (U32.v len) (Ghost.reveal (Rgl?.irepr rg)))))	val alloc_rid: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> rid:HST.erid -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ V.frameOf rv = rid /\ V.size_of rv = len /\ V.forall_all h1 rv (fun r -> Rgl?.r_alloc_p rg r) /\ S.equal (as_seq h1 rv) (S.create (U32.v len) (Ghost.reveal (Rgl?.irepr rg)))))	let alloc_rid #a #rst rg len rid = let vec = V.alloc_rid len (rg_dummy rg) rid in alloc_ #a #rst #rg vec len; V.loc_vector_within_included vec 0ul len; vec	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 5, "end_line": 759, "start_col": 0, "start_line": 755 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv)) let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /// Representation val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j) let rec as_seq_seq #a #rst rg h rs i j = if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1))) val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i}) (decreases (U32.v j)) let as_seq_sub #a #rst #rg h rv i j = as_seq_seq rg h (V.as_seq h rv) (U32.v i) (U32.v j) val as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v (V.size_of rv)}) let as_seq #a #rst #rg h rv = as_seq_sub h rv 0ul (V.size_of rv) val as_seq_sub_as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> Lemma (S.equal (as_seq_sub h rv 0ul (V.size_of rv)) (as_seq h rv)) [SMTPat (as_seq_sub h rv 0ul (V.size_of rv))] let as_seq_sub_as_seq #a #rst #rg h rv = () val as_seq_seq_index: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{k < j - i} -> Lemma (requires true) (ensures (S.index (as_seq_seq rg h rs i j) k == Rgl?.r_repr rg h (S.index rs (i + k)))) (decreases j) [SMTPat (S.index (as_seq_seq rg h rs i j) k)] let rec as_seq_seq_index #a #rst rg h rs i j k = if i = j then () else if k = j - i - 1 then () else as_seq_seq_index rg h rs i (j - 1) k val as_seq_seq_eq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs1:S.seq a -> rs2:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs1 /\ rs_elems_inv rg h rs1 i j} -> k:nat -> l:nat{k <= l /\ l <= S.length rs2 /\ rs_elems_inv rg h rs2 k l} -> Lemma (requires (S.equal (S.slice rs1 i j) (S.slice rs2 k l))) (ensures (S.equal (as_seq_seq rg h rs1 i j) (as_seq_seq rg h rs2 k l))) let as_seq_seq_eq #a #rst rg h rs1 rs2 i j k l = assert (forall (a:nat{a < j - i}). S.index (as_seq_seq rg h rs1 i j) a == Rgl?.r_repr rg h (S.index rs1 (i + a))); assert (forall (a:nat{a < l - k}). S.index (as_seq_seq rg h rs2 k l) a == Rgl?.r_repr rg h (S.index rs2 (k + a))); assert (S.length (S.slice rs1 i j) = j - i); assert (S.length (S.slice rs2 k l) = l - k); assert (forall (a:nat{a < j - i}). S.index (S.slice rs1 i j) a == S.index (S.slice rs2 k l) a); assert (forall (a:nat{a < j - i}). S.index rs1 (i + a) == S.index rs2 (k + a)) val as_seq_seq_slice: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat -> l:nat{k <= l && l <= j - i} -> Lemma (S.equal (S.slice (as_seq_seq rg h rs i j) k l) (as_seq_seq rg h (S.slice rs (i + k) (i + l)) 0 (l - k))) #reset-options "--z3rlimit 10" let rec as_seq_seq_slice #a #rst rg h rs i j k l = if k = l then () else (as_seq_seq_slice rg h rs i j k (l - 1); as_seq_seq_index rg h rs i j (l - 1); as_seq_seq_eq rg h (S.slice rs (i + k) (i + l - 1)) (S.slice rs (i + k) (i + l)) 0 (l - k - 1) 0 (l - k - 1)) val as_seq_seq_upd: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{ i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{i <= k && k < j} -> v:a{rg_inv rg h v} -> Lemma (S.equal (as_seq_seq rg h (S.upd rs k v) i j) (S.upd (as_seq_seq rg h rs i j) (k - i) (Rgl?.r_repr rg h v))) let rec as_seq_seq_upd #a #rst rg h rs i j k v = if i = j then () else if k = j - 1 then () else as_seq_seq_upd rg h rs i (j - 1) k v // Preservation based on disjointness val as_seq_seq_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv_preserved rg rs i j p h0 h1; S.equal (as_seq_seq rg h0 rs i j) (as_seq_seq rg h1 rs i j))) let rec as_seq_seq_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; as_seq_seq_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val as_seq_sub_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ loc_disjoint p (V.loc_vector rv) /\ modifies p h0 h1)) (ensures (rv_elems_inv_preserved rv i j p h0 h1; S.equal (as_seq_sub h0 rv i j) (as_seq_sub h1 rv i j))) let as_seq_sub_preserved #a #rst #rg rv i j p h0 h1 = as_seq_seq_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val as_seq_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv_preserved_ rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv))) let as_seq_preserved_ #a #rst #rg rv p h0 h1 = as_seq_sub_preserved rv 0ul (V.size_of rv) p h0 h1 // The second core lemma of `rvector` val as_seq_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv_preserved rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv))) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let as_seq_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); as_seq_preserved_ rv p h0 h1 /// Construction val alloc_empty: #a:Type0 -> #rst:Type -> rg:regional rst a -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 bv h1 -> h0 == h1 /\ V.size_of bv = 0ul)) let alloc_empty #a #rst rg = V.alloc_empty a val alloc_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> cidx:uint32_t{cidx <= V.size_of rv} -> HST.ST unit (requires (fun h0 -> rv_itself_inv h0 rv)) (ensures (fun h0 _ h1 -> modifies (V.loc_vector_within rv 0ul cidx) h0 h1 /\ rv_itself_inv h1 rv /\ rv_elems_inv h1 rv 0ul cidx /\ rv_elems_reg h1 rv 0ul cidx /\ S.equal (as_seq_sub h1 rv 0ul cidx) (S.create (U32.v cidx) (Ghost.reveal (Rgl?.irepr rg))) /\ // the loop invariant for this function V.forall_ h1 rv 0ul cidx (fun r -> HS.fresh_region (Rgl?.region_of rg r) h0 h1 /\ Rgl?.r_alloc_p rg r) /\ Set.subset (Map.domain (HS.get_hmap h0)) (Map.domain (HS.get_hmap h1)))) (decreases (U32.v cidx)) #reset-options "--z3rlimit 20" let rec alloc_ #a #rst #rg rv cidx = let hh0 = HST.get () in if cidx = 0ul then () else (let nrid = HST.new_region (V.frameOf rv) in let v = rg_alloc rg nrid in let hh1 = HST.get () in V.assign rv (cidx - 1ul) v; let hh2 = HST.get () in V.loc_vector_within_included rv (cidx - 1ul) cidx; Rgl?.r_sep rg (V.get hh2 rv (cidx - 1ul)) (V.loc_vector_within rv (cidx - 1ul) cidx) hh1 hh2; alloc_ rv (cidx - 1ul); let hh3 = HST.get () in V.loc_vector_within_included rv 0ul (cidx - 1ul); Rgl?.r_sep rg (V.get hh3 rv (cidx - 1ul)) (V.loc_vector_within rv 0ul (cidx - 1ul)) hh2 hh3; V.forall2_extend hh3 rv 0ul (cidx - 1ul) (fun r1 r2 -> HS.disjoint (Rgl?.region_of rg r1) (Rgl?.region_of rg r2)); V.loc_vector_within_union_rev rv 0ul cidx) val alloc_rid: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> rid:HST.erid -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ V.frameOf rv = rid /\ V.size_of rv = len /\ V.forall_all h1 rv (fun r -> Rgl?.r_alloc_p rg r) /\ S.equal (as_seq h1 rv)	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rg: LowStar.Regional.regional rst a -> len: LowStar.Vector.uint32_t{len > 0ul} -> rid: FStar.HyperStack.ST.erid -> FStar.HyperStack.ST.ST (LowStar.RVector.rvector rg)	FStar.HyperStack.ST.ST	[]	[]	[ "LowStar.Regional.regional", "LowStar.Vector.uint32_t", "Prims.b2t", "FStar.Integers.op_Greater", "FStar.Integers.Unsigned", "FStar.Integers.W32", "FStar.UInt32.__uint_to_t", "FStar.HyperStack.ST.erid", "Prims.unit", "LowStar.Vector.loc_vector_within_included", "LowStar.RVector.rvector", "LowStar.RVector.alloc_", "LowStar.Vector.vector", "LowStar.Vector.alloc_rid", "LowStar.Regional.rg_dummy" ]	[]	false	true	false	false	false	let alloc_rid #a #rst rg len rid =	let vec = V.alloc_rid len (rg_dummy rg) rid in alloc_ #a #rst #rg vec len; V.loc_vector_within_included vec 0ul len; vec	false
LowStar.RVector.fst	LowStar.RVector.free	val free: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> HST.ST unit (requires (fun h0 -> rv_inv h0 rv)) (ensures (fun h0 _ h1 -> modifies (loc_rvector rv) h0 h1))	val free: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> HST.ST unit (requires (fun h0 -> rv_inv h0 rv)) (ensures (fun h0 _ h1 -> modifies (loc_rvector rv) h0 h1))	let free #a #rst #rg rv = let hh0 = HST.get () in (if V.size_of rv = 0ul then () else free_elems rv (V.size_of rv - 1ul)); let hh1 = HST.get () in rv_loc_elems_included hh0 rv 0ul (V.size_of rv); V.free rv	{ "file_name": "ulib/LowStar.RVector.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }	{ "end_col": 11, "end_line": 1184, "start_col": 0, "start_line": 1178 }	(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.RVector open FStar.Classical open FStar.Integers open LowStar.Modifies open LowStar.Regional open LowStar.Vector module HS = FStar.HyperStack module HST = FStar.HyperStack.ST module S = FStar.Seq module B = LowStar.Buffer module V = LowStar.Vector module U32 = FStar.UInt32 /// Utilities /// A `regional` type `a` is also `copyable` when there exists a copy operator /// that guarantees the same representation between `src` and `dst`. /// For instance, the `copy` operation for `B.buffer a` is `B.blit`. /// /// Here, no reference at run-time is kept to the state argument of the /// regional; conceivably, the caller will already have some reference handy to /// the instance of the regional class and can retrieve the parameter from /// there. inline_for_extraction noeq type copyable (#rst:Type) (a:Type0) (rg:regional rst a) = \| Cpy: copy: (s:rst{s==Rgl?.state rg} -> src:a -> dst:a -> HST.ST unit (requires (fun h0 -> rg_inv rg h0 src /\ rg_inv rg h0 dst /\ HS.disjoint (Rgl?.region_of rg src) (Rgl?.region_of rg dst))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg dst)) h0 h1 /\ rg_inv rg h1 dst /\ Rgl?.r_repr rg h1 dst == Rgl?.r_repr rg h0 src))) -> copyable a rg // rst: regional state type rvector (#a:Type0) (#rst:Type) (rg:regional rst a) = V.vector a val loc_rvector: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> GTot loc let loc_rvector #a #rst #rg rv = loc_all_regions_from false (V.frameOf rv) /// The invariant of `rvector` // Here we will define the invariant for `rvector #a` that contains // the invariant for each element and some more about the vector itself. val rs_elems_inv: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_inv #a #rst rg h rs i j = V.forall_seq rs i j (rg_inv rg h) val rv_elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_inv #a #rst #rg h rv i j = rs_elems_inv rg h (V.as_seq h rv) (U32.v i) (U32.v j) val elems_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_inv #a #rst #rg h rv = rv_elems_inv h rv 0ul (V.size_of rv) val rs_elems_reg: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot Type0 let rs_elems_reg #a #rst rg rs prid i j = V.forall_seq rs i j (fun v -> HS.extends (Rgl?.region_of rg v) prid) /\ V.forall2_seq rs i j (fun v1 v2 -> HS.disjoint (Rgl?.region_of rg v1) (Rgl?.region_of rg v2)) val rv_elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot Type0 let rv_elems_reg #a #rst #rg h rv i j = rs_elems_reg rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val elems_reg: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let elems_reg #a #rst #rg h rv = rv_elems_reg h rv 0ul (V.size_of rv) val rv_itself_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_itself_inv #a #rst #rg h rv = V.live h rv /\ V.freeable rv /\ HST.is_eternal_region (V.frameOf rv) // This is the invariant of `rvector`. val rv_inv: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> GTot Type0 let rv_inv #a #rst #rg h rv = elems_inv h rv /\ elems_reg h rv /\ rv_itself_inv h rv val rs_elems_inv_live_region: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_inv rg h rs i j)) (ensures (V.forall_seq rs i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rec rs_elems_inv_live_region #a #rst rg h rs i j = if i = j then () else (Rgl?.r_inv_reg rg h (S.index rs (j - 1)); rs_elems_inv_live_region rg h rs i (j - 1)) val rv_elems_inv_live_region: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_inv h rv i j)) (ensures (V.forall_ h rv i j (fun r -> HS.live_region h (Rgl?.region_of rg r)))) let rv_elems_inv_live_region #a #rst #rg h rv i j = rs_elems_inv_live_region rg h (V.as_seq h rv) (U32.v i) (U32.v j) /// Utilities for fine-grained region control val rs_loc_elem: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat{i < S.length rs} -> GTot loc let rs_loc_elem #a #rst rg rs i = loc_all_regions_from false (Rgl?.region_of rg (S.index rs i)) val rs_loc_elems: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> GTot loc (decreases j) let rec rs_loc_elems #a #rst rg rs i j = if i = j then loc_none else loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1)) val rv_loc_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> GTot loc let rv_loc_elems #a #rst #rg h rv i j = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v j) val rv_loc_elem: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> GTot loc let rv_loc_elem #a #rst #rg h rv i = rs_loc_elems rg (V.as_seq h rv) (U32.v i) (U32.v i+1) // Properties about inclusion of locations val rs_loc_elems_rec_inverse: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i < j && j <= S.length rs} -> Lemma (requires true) (ensures (rs_loc_elems rg rs i j == loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) j))) (decreases j) let rec rs_loc_elems_rec_inverse #a #rst rg rs i j = if i + 1 = j then () else (assert (rs_loc_elems rg rs i j == loc_union (rs_loc_elems rg rs i (j - 1)) (rs_loc_elem rg rs (j - 1))); assert (rs_loc_elems rg rs (i + 1) j == loc_union (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))); rs_loc_elems_rec_inverse rg rs i (j - 1); assert (rs_loc_elems rg rs i j == loc_union (loc_union (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1))) (rs_loc_elem rg rs (j - 1))); loc_union_assoc (rs_loc_elem rg rs i) (rs_loc_elems rg rs (i + 1) (j - 1)) (rs_loc_elem rg rs (j - 1))) val rs_loc_elems_includes: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> Lemma (loc_includes (rs_loc_elems rg rs i j) (rs_loc_elem rg rs k)) let rec rs_loc_elems_includes #a #rst rg rs i j k = if k = j - 1 then () else rs_loc_elems_includes #a #rst rg rs i (j - 1) k val loc_all_exts_from: preserve_liveness: bool -> r: HS.rid -> GTot loc let loc_all_exts_from preserve_liveness r = B.loc_regions preserve_liveness (Set.intersect (HS.mod_set (Set.singleton r)) (Set.complement (Set.singleton r))) val rs_loc_elem_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat{i < S.length rs} -> Lemma (requires (HS.extends (Rgl?.region_of rg (S.index rs i)) prid)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elem rg rs i))) let rs_loc_elem_included #a #rst rg rs prid i = () val rs_loc_elems_included: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_includes (loc_all_exts_from false prid) (rs_loc_elems rg rs i j))) (decreases j) let rec rs_loc_elems_included #a #rst rg rs prid i j = if i = j then () else (rs_loc_elem_included rg rs prid (j - 1); rs_loc_elems_included rg rs prid i (j - 1)) val rv_loc_elems_included: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_includes (loc_all_exts_from false (V.frameOf rv)) (rv_loc_elems h rv i j))) let rv_loc_elems_included #a #rst #rg h rv i j = rs_loc_elems_included rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) // Properties about disjointness of locations val rs_loc_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k:nat{i <= k && k < j} -> l:nat{i <= l && l < j && k <> l} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj #a #rst rg rs prid i j k l = () val rs_loc_elem_disj_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures ( forall (k:nat{i <= k && k < j}). forall (l:nat{i <= l && l < j && k <> l}). loc_disjoint (rs_loc_elem rg rs k) (rs_loc_elem rg rs l))) let rs_loc_elem_disj_forall #a #rst rg rs prid i j = () val rs_loc_elems_elem_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l:nat{i <= l && l < j && (l < k1 \|\| k2 <= l)} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elem rg rs l))) (decreases k2) let rec rs_loc_elems_elem_disj #a #rst rg rs prid i j k1 k2 l = if k1 = k2 then () else (rs_loc_elem_disj rg rs prid i j (k2 - 1) l; rs_loc_elems_elem_disj rg rs prid i j k1 (k2 - 1) l) val rs_loc_elems_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> k1:nat{i <= k1} -> k2:nat{k1 <= k2 && k2 <= j} -> l1:nat{i <= l1} -> l2:nat{l1 <= l2 && l2 <= j} -> Lemma (requires (rs_elems_reg rg rs prid i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rs_loc_elems rg rs k1 k2) (rs_loc_elems rg rs l1 l2))) (decreases k2) let rec rs_loc_elems_disj #a #rst rg rs prid i j k1 k2 l1 l2 = if k1 = k2 then () else (rs_loc_elems_elem_disj rg rs prid i j l1 l2 (k2 - 1); rs_loc_elems_disj rg rs prid i j k1 (k2 - 1) l1 l2) val rv_loc_elems_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> k1:uint32_t{i <= k1} -> k2:uint32_t{k1 <= k2 && k2 <= j} -> l1:uint32_t{i <= l1} -> l2:uint32_t{l1 <= l2 && l2 <= j} -> Lemma (requires (rv_elems_reg h rv i j /\ (k2 <= l1 \|\| l2 <= k1))) (ensures (loc_disjoint (rv_loc_elems h rv k1 k2) (rv_loc_elems h rv l1 l2))) let rv_loc_elems_disj #a #rst #rg h rv i j k1 k2 l1 l2 = rs_loc_elems_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) (U32.v k1) (U32.v k2) (U32.v l1) (U32.v l2) val rs_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> prid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (rs_elems_reg rg rs prid i j)) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_region_only false prid))) (decreases j) let rec rs_loc_elems_parent_disj #a #rst rg rs prid i j = if i = j then () else rs_loc_elems_parent_disj rg rs prid i (j - 1) val rv_loc_elems_parent_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> Lemma (requires (rv_elems_reg h rv i j)) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_region_only false (V.frameOf rv)))) let rv_loc_elems_parent_disj #a #rst #rg h rv i j = rs_loc_elems_parent_disj rg (V.as_seq h rv) (V.frameOf rv) (U32.v i) (U32.v j) val rs_loc_elems_each_disj: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> drid:HS.rid -> i:nat -> j:nat{i <= j && j <= S.length rs} -> Lemma (requires (V.forall_seq rs i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rs_loc_elems rg rs i j) (loc_all_regions_from false drid))) (decreases j) let rec rs_loc_elems_each_disj #a #rst rg rs drid i j = if i = j then () else rs_loc_elems_each_disj rg rs drid i (j - 1) val rv_loc_elems_each_disj: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> drid:HS.rid -> Lemma (requires (V.forall_ h rv i j (fun r -> HS.disjoint (Rgl?.region_of rg r) drid))) (ensures (loc_disjoint (rv_loc_elems h rv i j) (loc_all_regions_from false drid))) let rv_loc_elems_each_disj #a #rst #rg h rv i j drid = rs_loc_elems_each_disj rg (V.as_seq h rv) drid (U32.v i) (U32.v j) // Preservation based on disjointness val rv_loc_elems_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ loc_disjoint p (V.loc_vector_within rv i j) /\ modifies p h0 h1)) (ensures (rv_loc_elems h0 rv i j == rv_loc_elems h1 rv i j)) (decreases (U32.v j)) let rec rv_loc_elems_preserved #a #rst #rg rv i j p h0 h1 = if i = j then () else (V.loc_vector_within_includes rv i j (j - 1ul) j; V.get_preserved rv (j - 1ul) p h0 h1; assert (V.get h0 rv (j - 1ul) == V.get h1 rv (j - 1ul)); V.loc_vector_within_includes rv i j i (j - 1ul); rv_loc_elems_preserved rv i (j - 1ul) p h0 h1) val rs_elems_inv_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv rg h1 rs i j)) (decreases j) let rec rs_elems_inv_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val rv_elems_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (V.loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ modifies p h0 h1)) (ensures (rv_elems_inv h1 rv i j)) let rv_elems_inv_preserved #a #rst #rg rv i j p h0 h1 = rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val rv_inv_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) let rv_inv_preserved_ #a #rst #rg rv p h0 h1 = rv_elems_inv_preserved #a #rst #rg rv 0ul (V.size_of rv) p h0 h1 // The first core lemma of `rvector` val rv_inv_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv h1 rv)) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let rv_inv_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); rv_inv_preserved_ rv p h0 h1 val rv_inv_preserved_int: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h0 rv i))) h0 h1 /\ rg_inv rg h1 (V.get h1 rv i))) (ensures (rv_inv h1 rv)) let rv_inv_preserved_int #a #rst #rg rv i h0 h1 = rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) 0 (U32.v i) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1; rs_loc_elems_elem_disj rg (V.as_seq h0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i + 1) (U32.v (V.size_of rv)) (U32.v i); rs_elems_inv_preserved rg (V.as_seq h0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /// Representation val as_seq_seq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = j - i}) (decreases j) let rec as_seq_seq #a #rst rg h rs i j = if i = j then S.empty else S.snoc (as_seq_seq rg h rs i (j - 1)) (Rgl?.r_repr rg h (S.index rs (j - 1))) val as_seq_sub: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg -> i:uint32_t -> j:uint32_t{ i <= j /\ j <= V.size_of rv /\ rv_elems_inv h rv i j} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v j - U32.v i}) (decreases (U32.v j)) let as_seq_sub #a #rst #rg h rv i j = as_seq_seq rg h (V.as_seq h rv) (U32.v i) (U32.v j) val as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> GTot (s:S.seq (Rgl?.repr rg){S.length s = U32.v (V.size_of rv)}) let as_seq #a #rst #rg h rv = as_seq_sub h rv 0ul (V.size_of rv) val as_seq_sub_as_seq: #a:Type0 -> #rst:Type -> #rg:regional rst a -> h:HS.mem -> rv:rvector rg{rv_inv h rv} -> Lemma (S.equal (as_seq_sub h rv 0ul (V.size_of rv)) (as_seq h rv)) [SMTPat (as_seq_sub h rv 0ul (V.size_of rv))] let as_seq_sub_as_seq #a #rst #rg h rv = () val as_seq_seq_index: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{k < j - i} -> Lemma (requires true) (ensures (S.index (as_seq_seq rg h rs i j) k == Rgl?.r_repr rg h (S.index rs (i + k)))) (decreases j) [SMTPat (S.index (as_seq_seq rg h rs i j) k)] let rec as_seq_seq_index #a #rst rg h rs i j k = if i = j then () else if k = j - i - 1 then () else as_seq_seq_index rg h rs i (j - 1) k val as_seq_seq_eq: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs1:S.seq a -> rs2:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs1 /\ rs_elems_inv rg h rs1 i j} -> k:nat -> l:nat{k <= l /\ l <= S.length rs2 /\ rs_elems_inv rg h rs2 k l} -> Lemma (requires (S.equal (S.slice rs1 i j) (S.slice rs2 k l))) (ensures (S.equal (as_seq_seq rg h rs1 i j) (as_seq_seq rg h rs2 k l))) let as_seq_seq_eq #a #rst rg h rs1 rs2 i j k l = assert (forall (a:nat{a < j - i}). S.index (as_seq_seq rg h rs1 i j) a == Rgl?.r_repr rg h (S.index rs1 (i + a))); assert (forall (a:nat{a < l - k}). S.index (as_seq_seq rg h rs2 k l) a == Rgl?.r_repr rg h (S.index rs2 (k + a))); assert (S.length (S.slice rs1 i j) = j - i); assert (S.length (S.slice rs2 k l) = l - k); assert (forall (a:nat{a < j - i}). S.index (S.slice rs1 i j) a == S.index (S.slice rs2 k l) a); assert (forall (a:nat{a < j - i}). S.index rs1 (i + a) == S.index rs2 (k + a)) val as_seq_seq_slice: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat -> l:nat{k <= l && l <= j - i} -> Lemma (S.equal (S.slice (as_seq_seq rg h rs i j) k l) (as_seq_seq rg h (S.slice rs (i + k) (i + l)) 0 (l - k))) #reset-options "--z3rlimit 10" let rec as_seq_seq_slice #a #rst rg h rs i j k l = if k = l then () else (as_seq_seq_slice rg h rs i j k (l - 1); as_seq_seq_index rg h rs i j (l - 1); as_seq_seq_eq rg h (S.slice rs (i + k) (i + l - 1)) (S.slice rs (i + k) (i + l)) 0 (l - k - 1) 0 (l - k - 1)) val as_seq_seq_upd: #a:Type0 -> #rst:Type -> rg:regional rst a -> h:HS.mem -> rs:S.seq a -> i:nat -> j:nat{ i <= j /\ j <= S.length rs /\ rs_elems_inv rg h rs i j} -> k:nat{i <= k && k < j} -> v:a{rg_inv rg h v} -> Lemma (S.equal (as_seq_seq rg h (S.upd rs k v) i j) (S.upd (as_seq_seq rg h rs i j) (k - i) (Rgl?.r_repr rg h v))) let rec as_seq_seq_upd #a #rst rg h rs i j k v = if i = j then () else if k = j - 1 then () else as_seq_seq_upd rg h rs i (j - 1) k v // Preservation based on disjointness val as_seq_seq_preserved: #a:Type0 -> #rst:Type -> rg:regional rst a -> rs:S.seq a -> i:nat -> j:nat{i <= j && j <= S.length rs} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rs_elems_inv rg h0 rs i j /\ loc_disjoint p (rs_loc_elems rg rs i j) /\ modifies p h0 h1)) (ensures (rs_elems_inv_preserved rg rs i j p h0 h1; S.equal (as_seq_seq rg h0 rs i j) (as_seq_seq rg h1 rs i j))) let rec as_seq_seq_preserved #a #rst rg rs i j p h0 h1 = if i = j then () else (rs_elems_inv_preserved rg rs i (j - 1) p h0 h1; as_seq_seq_preserved rg rs i (j - 1) p h0 h1; Rgl?.r_sep rg (S.index rs (j - 1)) p h0 h1) val as_seq_sub_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t -> j:uint32_t{i <= j && j <= V.size_of rv} -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (V.live h0 rv /\ rv_elems_inv h0 rv i j /\ loc_disjoint p (rv_loc_elems h0 rv i j) /\ loc_disjoint p (V.loc_vector rv) /\ modifies p h0 h1)) (ensures (rv_elems_inv_preserved rv i j p h0 h1; S.equal (as_seq_sub h0 rv i j) (as_seq_sub h1 rv i j))) let as_seq_sub_preserved #a #rst #rg rv i j p h0 h1 = as_seq_seq_preserved rg (V.as_seq h0 rv) (U32.v i) (U32.v j) p h0 h1 val as_seq_preserved_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_vector rv) /\ loc_disjoint p (rv_loc_elems h0 rv 0ul (V.size_of rv)) /\ modifies p h0 h1)) (ensures (rv_inv_preserved_ rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv))) let as_seq_preserved_ #a #rst #rg rv p h0 h1 = as_seq_sub_preserved rv 0ul (V.size_of rv) p h0 h1 // The second core lemma of `rvector` val as_seq_preserved: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> p:loc -> h0:HS.mem -> h1:HS.mem -> Lemma (requires (rv_inv h0 rv /\ loc_disjoint p (loc_rvector rv) /\ modifies p h0 h1)) (ensures (rv_inv_preserved rv p h0 h1; S.equal (as_seq h0 rv) (as_seq h1 rv))) [SMTPat (rv_inv h0 rv); SMTPat (loc_disjoint p (loc_rvector rv)); SMTPat (modifies p h0 h1)] let as_seq_preserved #a #rst #rg rv p h0 h1 = assert (loc_includes (loc_rvector rv) (V.loc_vector rv)); rv_loc_elems_included h0 rv 0ul (V.size_of rv); assert (loc_includes (loc_rvector rv) (rv_loc_elems h0 rv 0ul (V.size_of rv))); as_seq_preserved_ rv p h0 h1 /// Construction val alloc_empty: #a:Type0 -> #rst:Type -> rg:regional rst a -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 bv h1 -> h0 == h1 /\ V.size_of bv = 0ul)) let alloc_empty #a #rst rg = V.alloc_empty a val alloc_: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> cidx:uint32_t{cidx <= V.size_of rv} -> HST.ST unit (requires (fun h0 -> rv_itself_inv h0 rv)) (ensures (fun h0 _ h1 -> modifies (V.loc_vector_within rv 0ul cidx) h0 h1 /\ rv_itself_inv h1 rv /\ rv_elems_inv h1 rv 0ul cidx /\ rv_elems_reg h1 rv 0ul cidx /\ S.equal (as_seq_sub h1 rv 0ul cidx) (S.create (U32.v cidx) (Ghost.reveal (Rgl?.irepr rg))) /\ // the loop invariant for this function V.forall_ h1 rv 0ul cidx (fun r -> HS.fresh_region (Rgl?.region_of rg r) h0 h1 /\ Rgl?.r_alloc_p rg r) /\ Set.subset (Map.domain (HS.get_hmap h0)) (Map.domain (HS.get_hmap h1)))) (decreases (U32.v cidx)) #reset-options "--z3rlimit 20" let rec alloc_ #a #rst #rg rv cidx = let hh0 = HST.get () in if cidx = 0ul then () else (let nrid = HST.new_region (V.frameOf rv) in let v = rg_alloc rg nrid in let hh1 = HST.get () in V.assign rv (cidx - 1ul) v; let hh2 = HST.get () in V.loc_vector_within_included rv (cidx - 1ul) cidx; Rgl?.r_sep rg (V.get hh2 rv (cidx - 1ul)) (V.loc_vector_within rv (cidx - 1ul) cidx) hh1 hh2; alloc_ rv (cidx - 1ul); let hh3 = HST.get () in V.loc_vector_within_included rv 0ul (cidx - 1ul); Rgl?.r_sep rg (V.get hh3 rv (cidx - 1ul)) (V.loc_vector_within rv 0ul (cidx - 1ul)) hh2 hh3; V.forall2_extend hh3 rv 0ul (cidx - 1ul) (fun r1 r2 -> HS.disjoint (Rgl?.region_of rg r1) (Rgl?.region_of rg r2)); V.loc_vector_within_union_rev rv 0ul cidx) val alloc_rid: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> rid:HST.erid -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ V.frameOf rv = rid /\ V.size_of rv = len /\ V.forall_all h1 rv (fun r -> Rgl?.r_alloc_p rg r) /\ S.equal (as_seq h1 rv) (S.create (U32.v len) (Ghost.reveal (Rgl?.irepr rg))))) let alloc_rid #a #rst rg len rid = let vec = V.alloc_rid len (rg_dummy rg) rid in alloc_ #a #rst #rg vec len; V.loc_vector_within_included vec 0ul len; vec val alloc_reserve: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> rid:HST.erid -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ V.frameOf rv = rid /\ V.size_of rv = 0ul /\ S.equal (as_seq h1 rv) S.empty /\ Set.equal (Map.domain (HS.get_hmap h0)) (Map.domain (HS.get_hmap h1)) /\ B.fresh_loc (V.loc_vector rv) h0 h1)) let alloc_reserve #a #rst rg len rid = V.alloc_reserve len (rg_dummy rg) rid val alloc: #a:Type0 -> #rst:Type -> rg:regional rst a -> len:uint32_t{len > 0ul} -> HST.ST (rvector rg) (requires (fun h0 -> true)) (ensures (fun h0 rv h1 -> modifies (V.loc_vector rv) h0 h1 /\ rv_inv h1 rv /\ HS.fresh_region (V.frameOf rv) h0 h1 /\ V.size_of rv = len /\ V.forall_all h1 rv (fun r -> Rgl?.r_alloc_p rg r) /\ S.equal (as_seq h1 rv) (S.create (U32.v len) (Ghost.reveal (Rgl?.irepr rg))))) let alloc #a #rst rg len = let nrid = HST.new_region HS.root in alloc_rid rg len nrid val insert: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg{not (V.is_full rv)} -> v:a -> HST.ST (rvector rg) (requires (fun h0 -> rv_inv h0 rv /\ rg_inv rg h0 v /\ HS.extends (Rgl?.region_of rg v) (V.frameOf rv) /\ V.forall_all h0 rv (fun b -> HS.disjoint (Rgl?.region_of rg b) (Rgl?.region_of rg v)))) (ensures (fun h0 irv h1 -> V.size_of irv = V.size_of rv + 1ul /\ V.frameOf rv = V.frameOf irv /\ modifies (loc_union (V.loc_addr_of_vector rv) (V.loc_vector irv)) h0 h1 /\ rv_inv h1 irv /\ V.get h1 irv (V.size_of rv) == v /\ S.equal (as_seq h1 irv) (S.snoc (as_seq h0 rv) (Rgl?.r_repr rg h0 v)))) #reset-options "--z3rlimit 20" let insert #a #rst #rg rv v = let hh0 = HST.get () in let irv = V.insert rv v in let hh1 = HST.get () in // Safety rs_loc_elems_parent_disj rg (V.as_seq hh0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)); rs_elems_inv_preserved rg (V.as_seq hh0 rv) 0 (U32.v (V.size_of rv)) (loc_region_only false (V.frameOf rv)) hh0 hh1; Rgl?.r_sep rg v (loc_region_only false (V.frameOf rv)) hh0 hh1; // Correctness assert (S.equal (V.as_seq hh0 rv) (S.slice (V.as_seq hh1 irv) 0 (U32.v (V.size_of rv)))); as_seq_seq_preserved rg (V.as_seq hh0 rv) 0 (U32.v (V.size_of rv)) (loc_region_only false (V.frameOf rv)) hh0 hh1; as_seq_seq_slice rg hh1 (V.as_seq hh1 irv) 0 (U32.v (V.size_of irv)) 0 (U32.v (V.size_of rv)); irv val insert_copy: #a:Type0 -> #rst:Type -> #rg:regional rst a -> cp:copyable #rst a rg -> rv:rvector rg{not (V.is_full rv)} -> v:a -> HST.ST (rvector rg) (requires (fun h0 -> rv_inv h0 rv /\ rg_inv rg h0 v /\ HS.disjoint (Rgl?.region_of rg v) (V.frameOf rv))) (ensures (fun h0 irv h1 -> V.size_of irv = V.size_of rv + 1ul /\ V.frameOf rv = V.frameOf irv /\ modifies (loc_rvector rv) h0 h1 /\ rv_inv h1 irv /\ S.equal (as_seq h1 irv) (S.snoc (as_seq h0 rv) (Rgl?.r_repr rg h0 v)))) let insert_copy #a #rst #rg cp rv v = let hh0 = HST.get () in rv_elems_inv_live_region hh0 rv 0ul (V.size_of rv); let nrid = HST.new_region (V.frameOf rv) in let nv = rg_alloc rg nrid in let hh1 = HST.get () in Rgl?.r_sep rg v loc_none hh0 hh1; rv_inv_preserved rv loc_none hh0 hh1; as_seq_preserved rv loc_none hh0 hh1; Cpy?.copy cp (Rgl?.state rg) v nv; let hh2 = HST.get () in rv_loc_elems_each_disj hh2 rv 0ul (V.size_of rv) nrid; rv_inv_preserved_ rv (loc_all_regions_from false nrid) hh1 hh2; as_seq_preserved_ rv (loc_all_regions_from false nrid) hh1 hh2; insert rv nv val assign: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> v:a -> HST.ST unit (requires (fun h0 -> // rv_inv h0 rv /\ rv_itself_inv h0 rv /\ rv_elems_inv h0 rv 0ul i /\ rv_elems_inv h0 rv (i + 1ul) (V.size_of rv) /\ elems_reg h0 rv /\ V.forall_ h0 rv 0ul i (fun b -> HS.disjoint (Rgl?.region_of rg b) (Rgl?.region_of rg v)) /\ V.forall_ h0 rv (i + 1ul) (V.size_of rv) (fun b -> HS.disjoint (Rgl?.region_of rg b) (Rgl?.region_of rg v)) /\ rg_inv rg h0 v /\ HS.extends (Rgl?.region_of rg v) (V.frameOf rv))) (ensures (fun h0 _ h1 -> modifies (V.loc_vector_within rv i (i + 1ul)) h0 h1 /\ rv_inv h1 rv /\ V.get h1 rv i == v /\ S.equal (as_seq h1 rv) (S.append (as_seq_sub h0 rv 0ul i) (S.cons (Rgl?.r_repr rg h0 v) (as_seq_sub h0 rv (i + 1ul) (V.size_of rv)))))) let assign #a #rst #rg rv i v = let hh0 = HST.get () in V.assign rv i v; let hh1 = HST.get () in // Safety rs_loc_elems_parent_disj rg (V.as_seq hh0 rv) (V.frameOf rv) 0 (U32.v i); rs_loc_elems_parent_disj rg (V.as_seq hh0 rv) (V.frameOf rv) (U32.v i + 1) (U32.v (V.size_of rv)); rs_elems_inv_preserved rg (V.as_seq hh0 rv) 0 (U32.v i) (V.loc_vector rv) hh0 hh1; rs_elems_inv_preserved rg (V.as_seq hh0 rv) (U32.v i + 1) (U32.v (V.size_of rv)) (V.loc_vector rv) hh0 hh1; Rgl?.r_sep rg v (V.loc_vector rv) hh0 hh1; // Correctness rs_loc_elems_parent_disj rg (V.as_seq hh1 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)); as_seq_seq_preserved rg (V.as_seq hh1 rv) 0 (U32.v (V.size_of rv)) (V.loc_vector rv) hh0 hh1 private val r_sep_forall: #a:Type0 -> #rst:Type -> rg:regional rst a -> p:loc -> h0:HS.mem -> h1:HS.mem -> v:a{rg_inv rg h0 v} -> Lemma (requires (loc_disjoint (loc_all_regions_from false (Rgl?.region_of rg v)) p /\ modifies p h0 h1)) (ensures (rg_inv rg h1 v /\ Rgl?.r_repr rg h0 v == Rgl?.r_repr rg h1 v)) private let r_sep_forall #a #rst rg p h0 h1 v = Rgl?.r_sep rg v p h0 h1 val assign_copy: #a:Type0 -> #rst:Type -> #rg:regional rst a -> cp:copyable #rst a rg -> rv:rvector rg -> i:uint32_t{i < V.size_of rv} -> v:a -> HST.ST unit (requires (fun h0 -> rv_inv h0 rv /\ rg_inv rg h0 v /\ HS.disjoint (Rgl?.region_of rg v) (V.frameOf rv))) (ensures (fun h0 _ h1 -> modifies (loc_all_regions_from false (Rgl?.region_of rg (V.get h1 rv i))) h0 h1 /\ rv_inv h1 rv /\ S.equal (as_seq h1 rv) (S.upd (as_seq h0 rv) (U32.v i) (Rgl?.r_repr rg h0 v)))) let assign_copy #a #rst #rg cp rv i v = let hh0 = HST.get () in Cpy?.copy cp (Rgl?.state rg) v (V.index rv i); let hh1 = HST.get () in // Safety rv_inv_preserved_int #a #rst #rg rv i hh0 hh1; // Correctness forall_intro (move_requires (rs_loc_elem_disj rg (V.as_seq hh0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) (U32.v i))); assert (forall (k:nat{k <> U32.v i && k < U32.v (V.size_of rv)}). loc_disjoint (rs_loc_elem rg (V.as_seq hh0 rv) k) (rs_loc_elem rg (V.as_seq hh0 rv) (U32.v i))); forall_intro (move_requires (r_sep_forall rg (rs_loc_elem rg (V.as_seq hh0 rv) (U32.v i)) hh0 hh1)); assert (forall (k:nat{k <> U32.v i && k < U32.v (V.size_of rv)}). loc_disjoint (rs_loc_elem rg (V.as_seq hh0 rv) k) (rs_loc_elem rg (V.as_seq hh0 rv) (U32.v i)) ==> Rgl?.r_repr rg hh1 (S.index (V.as_seq hh1 rv) k) == Rgl?.r_repr rg hh0 (S.index (V.as_seq hh0 rv) k)); assert (forall (k:nat{k <> U32.v i && k < U32.v (V.size_of rv)}). Rgl?.r_repr rg hh1 (S.index (V.as_seq hh1 rv) k) == Rgl?.r_repr rg hh0 (S.index (V.as_seq hh0 rv) k)); assert (forall (k:nat{k <> U32.v i && k < U32.v (V.size_of rv)}). S.index (as_seq_seq rg hh1 (V.as_seq hh1 rv) 0 (U32.v (V.size_of rv))) k == S.index (as_seq_seq rg hh0 (V.as_seq hh0 rv) 0 (U32.v (V.size_of rv))) k) val free_elems: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> idx:uint32_t{idx < V.size_of rv} -> HST.ST unit (requires (fun h0 -> V.live h0 rv /\ rv_elems_inv h0 rv 0ul (idx + 1ul) /\ rv_elems_reg h0 rv 0ul (idx + 1ul))) (ensures (fun h0 _ h1 -> modifies (rv_loc_elems h0 rv 0ul (idx + 1ul)) h0 h1)) let rec free_elems #a #rst #rg rv idx = let hh0 = HST.get () in rg_free rg (V.index rv idx); let hh1 = HST.get () in rs_loc_elems_elem_disj rg (V.as_seq hh0 rv) (V.frameOf rv) 0 (U32.v idx + 1) 0 (U32.v idx) (U32.v idx); rv_elems_inv_preserved rv 0ul idx (rs_loc_elem rg (V.as_seq hh0 rv) (U32.v idx)) hh0 hh1; if idx <> 0ul then free_elems rv (idx - 1ul) val flush: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> i:uint32_t{i <= V.size_of rv} -> HST.ST (rvector rg) (requires (fun h0 -> rv_inv h0 rv)) (ensures (fun h0 frv h1 -> V.size_of frv = V.size_of rv - i /\ V.frameOf rv = V.frameOf frv /\ modifies (loc_rvector rv) h0 h1 /\ rv_inv h1 frv /\ S.equal (as_seq h1 frv) (S.slice (as_seq h0 rv) (U32.v i) (U32.v (V.size_of rv))))) #reset-options "--z3rlimit 40" let flush #a #rst #rg rv i = let hh0 = HST.get () in (if i = 0ul then () else free_elems rv (i - 1ul)); rv_loc_elems_included hh0 rv 0ul i; let hh1 = HST.get () in assert (modifies (rs_loc_elems rg (V.as_seq hh0 rv) 0 (U32.v i)) hh0 hh1); let frv = V.flush rv (rg_dummy rg) i in let hh2 = HST.get () in assert (modifies (loc_region_only false (V.frameOf rv)) hh1 hh2); // Safety rs_loc_elems_disj rg (V.as_seq hh0 rv) (V.frameOf rv) 0 (U32.v (V.size_of rv)) 0 (U32.v i) (U32.v i) (U32.v (V.size_of rv)); rs_loc_elems_parent_disj rg (V.as_seq hh0 rv) (V.frameOf rv) (U32.v i) (U32.v (V.size_of rv)); rs_elems_inv_preserved rg (V.as_seq hh0 rv) (U32.v i) (U32.v (V.size_of rv)) (loc_union (rs_loc_elems rg (V.as_seq hh0 rv) 0 (U32.v i)) (loc_region_only false (V.frameOf rv))) hh0 hh2; assert (rv_inv #a #rst #rg hh2 frv); // Correctness as_seq_seq_preserved rg (V.as_seq hh0 rv) (U32.v i) (U32.v (V.size_of rv)) (loc_union (rs_loc_elems rg (V.as_seq hh0 rv) 0 (U32.v i)) (loc_region_only false (V.frameOf rv))) hh0 hh2; as_seq_seq_slice rg hh0 (V.as_seq hh0 rv) 0 (U32.v (V.size_of rv)) (U32.v i) (U32.v (V.size_of rv)); assert (S.equal (S.slice (as_seq hh0 rv) (U32.v i) (U32.v (V.size_of rv))) (as_seq_seq rg hh2 (V.as_seq hh0 rv) (U32.v i) (U32.v (V.size_of rv)))); as_seq_seq_eq rg hh2 (V.as_seq hh0 rv) (V.as_seq hh2 frv) (U32.v i) (U32.v (V.size_of rv)) 0 (U32.v (V.size_of frv)); assert (S.equal (as_seq_seq rg hh2 (V.as_seq hh2 frv) 0 (U32.v (V.size_of frv))) (as_seq_seq rg hh2 (V.as_seq hh0 rv) (U32.v i) (U32.v (V.size_of rv)))); assert (S.equal (S.slice (as_seq hh0 rv) (U32.v i) (U32.v (V.size_of rv))) (as_seq hh2 frv)); frv val free_elems_from: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> idx:uint32_t{idx < V.size_of rv} -> HST.ST unit (requires (fun h0 -> V.live h0 rv /\ rv_elems_inv h0 rv idx (V.size_of rv) /\ rv_elems_reg h0 rv idx (V.size_of rv))) (ensures (fun h0 _ h1 -> modifies (rv_loc_elems h0 rv idx (V.size_of rv)) h0 h1)) let rec free_elems_from #a #rst #rg rv idx = let hh0 = HST.get () in rs_loc_elems_elem_disj rg (V.as_seq hh0 rv) (V.frameOf rv) (U32.v idx) (U32.v (V.size_of rv)) (U32.v idx+1) (U32.v (V.size_of rv)) (U32.v idx); rg_free rg (V.index rv idx); let hh1 = HST.get () in rv_elems_inv_preserved rv (idx+1ul) (V.size_of rv) (rv_loc_elem hh0 rv idx) hh0 hh1; if idx + 1ul < V.size_of rv then begin free_elems_from rv (idx + 1ul); rs_loc_elems_rec_inverse rg (V.as_seq hh0 rv) (U32.v idx) (U32.v (V.size_of rv)) end val shrink: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> new_size:uint32_t{new_size <= V.size_of rv} -> HST.ST (rvector rg) (requires (fun h0 -> rv_inv h0 rv)) (ensures (fun h0 frv h1 -> V.size_of frv = new_size /\ V.frameOf rv = V.frameOf frv /\ modifies (loc_rvector rv) h0 h1 /\ rv_inv h1 frv /\ S.equal (as_seq h1 frv) (S.slice (as_seq h0 rv) 0 (U32.v new_size)))) #reset-options "--z3rlimit 40" let shrink #a #rst #rg rv new_size = let size = V.size_of rv in [@@inline_let] let sz = U32.v size in [@@inline_let] let nsz = U32.v new_size in let hh0 = HST.get () in if new_size >= size then rv else begin free_elems_from rv new_size; rv_loc_elems_included hh0 rv new_size size; let hh1 = HST.get () in assert (modifies (rs_loc_elems rg (V.as_seq hh0 rv) nsz sz) hh0 hh1); let frv = V.shrink rv new_size in let hh2 = HST.get () in assert (modifies (loc_region_only false (V.frameOf rv)) hh1 hh2); // Safety rs_loc_elems_disj rg (V.as_seq hh0 rv) (V.frameOf rv) 0 sz 0 nsz nsz sz; rs_loc_elems_parent_disj rg (V.as_seq hh0 rv) (V.frameOf rv) 0 nsz; rs_elems_inv_preserved rg (V.as_seq hh0 rv) 0 nsz (loc_union (rs_loc_elems rg (V.as_seq hh0 rv) nsz sz) (loc_region_only false (V.frameOf rv))) hh0 hh2; assert (rv_inv #a #rst #rg hh2 frv); // Correctness as_seq_seq_preserved rg (V.as_seq hh0 rv) 0 nsz (loc_union (rs_loc_elems rg (V.as_seq hh0 rv) nsz sz) (loc_region_only false (V.frameOf rv))) hh0 hh2; as_seq_seq_slice rg hh0 (V.as_seq hh0 rv) 0 sz 0 nsz; assert (S.equal (S.slice (as_seq hh0 rv) 0 nsz) (as_seq_seq rg hh2 (V.as_seq hh0 rv) 0 nsz)); as_seq_seq_eq rg hh2 (V.as_seq hh0 rv) (V.as_seq hh2 frv) 0 nsz 0 nsz; assert (S.equal (as_seq_seq rg hh2 (V.as_seq hh2 frv) 0 nsz) (as_seq_seq rg hh2 (V.as_seq hh0 rv) 0 nsz)); assert (S.equal (S.slice (as_seq hh0 rv) 0 nsz) (as_seq hh2 frv)); frv end val free: #a:Type0 -> #rst:Type -> #rg:regional rst a -> rv:rvector rg -> HST.ST unit (requires (fun h0 -> rv_inv h0 rv))	{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.Vector.fst.checked", "LowStar.Regional.fst.checked", "LowStar.Modifies.fst.checked", "LowStar.Buffer.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Set.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Map.fsti.checked", "FStar.Integers.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.fst.checked", "FStar.Ghost.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowStar.RVector.fst" }	[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "LowStar.Vector", "short_module": "V" }, { "abbrev": true, "full_module": "LowStar.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "S" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "HST" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Vector", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Regional", "short_module": null }, { "abbrev": false, "full_module": "LowStar.Modifies", "short_module": null }, { "abbrev": false, "full_module": "FStar.Integers", "short_module": null }, { "abbrev": false, "full_module": "FStar.Classical", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "LowStar", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 40, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	rv: LowStar.RVector.rvector rg -> FStar.HyperStack.ST.ST Prims.unit	FStar.HyperStack.ST.ST	[]	[]	[ "LowStar.Regional.regional", "LowStar.RVector.rvector", "LowStar.Vector.free", "Prims.unit", "LowStar.RVector.rv_loc_elems_included", "FStar.UInt32.__uint_to_t", "LowStar.Vector.size_of", "FStar.Monotonic.HyperStack.mem", "FStar.HyperStack.ST.get", "Prims.op_Equality", "FStar.UInt32.t", "Prims.bool", "LowStar.RVector.free_elems", "FStar.Integers.op_Subtraction", "FStar.Integers.Unsigned", "FStar.Integers.W32" ]	[]	false	true	false	false	false	let free #a #rst #rg rv =	let hh0 = HST.get () in (if V.size_of rv = 0ul then () else free_elems rv (V.size_of rv - 1ul)); let hh1 = HST.get () in rv_loc_elems_included hh0 rv 0ul (V.size_of rv); V.free rv	false
Steel.Effect.fsti	Steel.Effect.bind_pure_steel__ens	val bind_pure_steel__ens (#a #b: Type) (wp: pure_wp a) (#pre: pre_t) (#post: post_t b) (ens: (a -> ens_t pre b post)) : ens_t pre b post	val bind_pure_steel__ens (#a #b: Type) (wp: pure_wp a) (#pre: pre_t) (#post: post_t b) (ens: (a -> ens_t pre b post)) : ens_t pre b post	let bind_pure_steel__ens (#a:Type) (#b:Type) (wp:pure_wp a) (#pre:pre_t) (#post:post_t b) (ens:a -> ens_t pre b post) : ens_t pre b post = fun m0 r m1 -> (as_requires wp /\ (exists (x:a). as_ensures wp x /\ ((ens x) m0 r m1)))	{ "file_name": "lib/steel/Steel.Effect.fsti", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }	{ "end_col": 89, "end_line": 305, "start_col": 0, "start_line": 301 }	(* Copyright 2020 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. ) module Steel.Effect open Steel.Memory module Mem = Steel.Memory module FExt = FStar.FunctionalExtensionality open FStar.Ghost module T = FStar.Tactics include Steel.Effect.Common /// This module defines the main Steel effect, with requires and ensures predicates operating on /// selectors, which will be discharged by SMT #set-options "--warn_error -330" //turn off the experimental feature warning #set-options "--ide_id_info_off" ( Defining the Steel effect with selectors ) /// The underlying representation of Steel computations. /// The framed bit indicates whether this computation has already been framed. This corresponds to the \|- and \|-_F modalities /// in the ICFP21 paper val repr (a:Type) (framed:bool) (pre:pre_t) (post:post_t a) (req:req_t pre) (ens:ens_t pre a post) : Type u#2 /// Logical precondition of the return combinator unfold let return_req (p:vprop) : req_t p = fun _ -> True /// Logical postcondition of the return combinator: /// The returned value [r] corresponds to the value passed to the return [x], /// and return leaves selectors of all resources in [p] unchanged unfold let return_ens (a:Type) (x:a) (p:a -> vprop) : ens_t (p x) a p = fun (h0:rmem (p x)) (r:a) (h1:rmem (p r)) -> r == x /\ frame_equalities (p x) h0 (focus_rmem h1 (p x)) /// Monadic return combinator for the Steel effect. It is parametric in the postcondition /// The vprop precondition is annotated with the return_pre predicate to enable special handling, /// as explained in Steel.Effect.Common val return_ (a:Type) (x:a) (#[@@@ framing_implicit] p:a -> vprop) : repr a true (return_pre (p x)) p (return_req (p x)) (return_ens a x p) /// Logical precondition for the composition (bind) of two Steel computations: /// The postcondition of the first computation must imply the precondition of the second computation, /// and also ensure that any equalities abducted during frame inference inside the predicate [pr] are satisfied unfold let bind_req (#a:Type) (#pre_f:pre_t) (#post_f:post_t a) (req_f:req_t pre_f) (ens_f:ens_t pre_f a post_f) (#pre_g:a -> pre_t) (#pr:a -> prop) (req_g:(x:a -> req_t (pre_g x))) (frame_f:vprop) (frame_g:a -> vprop) (_:squash (can_be_split_forall_dep pr (fun x -> post_f x `star` frame_f) (fun x -> pre_g x `star` frame_g x))) : req_t (pre_f `star` frame_f) = fun m0 -> req_f (focus_rmem m0 pre_f) /\ (forall (x:a) (h1:hmem (post_f x `star` frame_f)). (ens_f (focus_rmem m0 pre_f) x (focus_rmem (mk_rmem (post_f x `star` frame_f) h1) (post_f x)) /\ frame_equalities frame_f (focus_rmem m0 frame_f) (focus_rmem (mk_rmem (post_f x `star` frame_f) h1) frame_f)) ==> pr x /\ (can_be_split_trans (post_f x `star` frame_f) (pre_g x `star` frame_g x) (pre_g x); (req_g x) (focus_rmem (mk_rmem (post_f x `star` frame_f) h1) (pre_g x)))) /// Logical postcondition for the composition (bind) of two Steel computations: /// The precondition of the first computation was satisfied in the initial state, and there /// exists an intermediate state where the two-state postcondition of the first computation was /// satisfied, and which yields the validity of the two-state postcondition of the second computation /// on the final state [m2] with the returned value [y] /// Note that the ensures for the bind below asserts req_f /// This is not necessary, but an explicit assert may help the solver unfold let bind_ens (#a:Type) (#b:Type) (#pre_f:pre_t) (#post_f:post_t a) (req_f:req_t pre_f) (ens_f:ens_t pre_f a post_f) (#pre_g:a -> pre_t) (#post_g:a -> post_t b) (#pr:a -> prop) (ens_g:(x:a -> ens_t (pre_g x) b (post_g x))) (frame_f:vprop) (frame_g:a -> vprop) (post:post_t b) (_:squash (can_be_split_forall_dep pr (fun x -> post_f x `star` frame_f) (fun x -> pre_g x `star` frame_g x))) (_:squash (can_be_split_post (fun x y -> post_g x y `star` frame_g x) post)) : ens_t (pre_f `star` frame_f) b post = fun m0 y m2 -> req_f (focus_rmem m0 pre_f) /\ (exists (x:a) (h1:hmem (post_f x `star` frame_f)). pr x /\ ( can_be_split_trans (post_f x `star` frame_f) (pre_g x `star` frame_g x) (pre_g x); can_be_split_trans (post_f x `star` frame_f) (pre_g x `star` frame_g x) (frame_g x); can_be_split_trans (post y) (post_g x y `star` frame_g x) (post_g x y); can_be_split_trans (post y) (post_g x y `star` frame_g x) (frame_g x); frame_equalities frame_f (focus_rmem m0 frame_f) (focus_rmem (mk_rmem (post_f x `star` frame_f) h1) frame_f) /\ frame_equalities (frame_g x) (focus_rmem (mk_rmem (post_f x `star` frame_f) h1) (frame_g x)) (focus_rmem m2 (frame_g x)) /\ ens_f (focus_rmem m0 pre_f) x (focus_rmem (mk_rmem (post_f x `star` frame_f) h1) (post_f x)) /\ (ens_g x) (focus_rmem (mk_rmem (post_f x `star` frame_f) h1) (pre_g x)) y (focus_rmem m2 (post_g x y)))) /// Steel effect combinator to compose two Steel computations /// Separation logic VCs are squashed goals passed as implicits, annotated with the framing_implicit /// attribute. This indicates that they will be discharged by the tactic in Steel.Effect.Common /// Requires/ensures logical VCs are defined using weakest preconditions combinators defined above, /// and discharged by SMT. val bind (a:Type) (b:Type) (#framed_f:eqtype_as_type bool) (#framed_g:eqtype_as_type bool) (#[@@@ framing_implicit] pre_f:pre_t) (#[@@@ framing_implicit] post_f:post_t a) (#[@@@ framing_implicit] req_f:req_t pre_f) (#[@@@ framing_implicit] ens_f:ens_t pre_f a post_f) (#[@@@ framing_implicit] pre_g:a -> pre_t) (#[@@@ framing_implicit] post_g:a -> post_t b) (#[@@@ framing_implicit] req_g:(x:a -> req_t (pre_g x))) (#[@@@ framing_implicit] ens_g:(x:a -> ens_t (pre_g x) b (post_g x))) (#[@@@ framing_implicit] frame_f:vprop) (#[@@@ framing_implicit] frame_g:a -> vprop) (#[@@@ framing_implicit] post:post_t b) (#[@@@ framing_implicit] _ : squash (maybe_emp framed_f frame_f)) (#[@@@ framing_implicit] _ : squash (maybe_emp_dep framed_g frame_g)) (#[@@@ framing_implicit] pr:a -> prop) (#[@@@ framing_implicit] p1:squash (can_be_split_forall_dep pr (fun x -> post_f x `star` frame_f) (fun x -> pre_g x `star` frame_g x))) (#[@@@ framing_implicit] p2:squash (can_be_split_post (fun x y -> post_g x y `star` frame_g x) post)) (f:repr a framed_f pre_f post_f req_f ens_f) (g:(x:a -> repr b framed_g (pre_g x) (post_g x) (req_g x) (ens_g x))) : repr b true (pre_f `star` frame_f) post (bind_req req_f ens_f req_g frame_f frame_g p1) (bind_ens req_f ens_f ens_g frame_f frame_g post p1 p2) /// Logical precondition for subtyping relation for Steel computation. unfold let subcomp_pre (#a:Type) (#pre_f:pre_t) (#post_f:post_t a) (req_f:req_t pre_f) (ens_f:ens_t pre_f a post_f) (#pre_g:pre_t) (#post_g:post_t a) (req_g:req_t pre_g) (ens_g:ens_t pre_g a post_g) (#frame:vprop) (#pr:prop) (_:squash (can_be_split_dep pr pre_g (pre_f `star` frame))) (_:squash (equiv_forall post_g (fun x -> post_f x `star` frame))) : pure_pre // The call to with_tactic allows us to reduce VCs in a controlled way, once all // uvars have been resolved. // To ensure an SMT-friendly encoding of the VC, it needs to be encapsulated in a squash call = T.rewrite_with_tactic vc_norm (squash ( (forall (h0:hmem pre_g). req_g (mk_rmem pre_g h0) ==> pr /\ (can_be_split_trans pre_g (pre_f `star` frame) pre_f; req_f (focus_rmem (mk_rmem pre_g h0) pre_f))) /\ (forall (h0:hmem pre_g) (x:a) (h1:hmem (post_g x)). ( pr ==> ( can_be_split_trans (post_g x) (post_f x `star` frame) (post_f x); can_be_split_trans (pre_g) (pre_f `star` frame) frame; can_be_split_trans (post_g x) (post_f x `star` frame) frame; can_be_split_trans pre_g (pre_f `star` frame) pre_f; (req_g (mk_rmem pre_g h0) /\ ens_f (focus_rmem (mk_rmem pre_g h0) pre_f) x (focus_rmem (mk_rmem (post_g x) h1) (post_f x)) /\ frame_equalities frame (focus_rmem (mk_rmem pre_g h0) frame) (focus_rmem (mk_rmem (post_g x) h1) frame)) ==> ens_g (mk_rmem pre_g h0) x (mk_rmem (post_g x) h1)) )) )) /// Subtyping combinator for Steel computations. /// Computation [f] is given type `repr a framed_g pre_g post_g req_g ens_g`. /// As for bind, separation logic goals are encoded as squashed implicits which will be discharged /// by tactic, while logical requires/ensures operating on selectors are discharged by SMT val subcomp (a:Type) (#framed_f:eqtype_as_type bool) (#framed_g:eqtype_as_type bool) (#[@@@ framing_implicit] pre_f:pre_t) (#[@@@ framing_implicit] post_f:post_t a) (#[@@@ framing_implicit] req_f:req_t pre_f) (#[@@@ framing_implicit] ens_f:ens_t pre_f a post_f) (#[@@@ framing_implicit] pre_g:pre_t) (#[@@@ framing_implicit] post_g:post_t a) (#[@@@ framing_implicit] req_g:req_t pre_g) (#[@@@ framing_implicit] ens_g:ens_t pre_g a post_g) (#[@@@ framing_implicit] frame:vprop) (#[@@@ framing_implicit] _ : squash (maybe_emp framed_f frame)) (#[@@@ framing_implicit] pr : prop) (#[@@@ framing_implicit] p1:squash (can_be_split_dep pr pre_g (pre_f `star` frame))) (#[@@@ framing_implicit] p2:squash (equiv_forall post_g (fun x -> post_f x `star` frame))) (f:repr a framed_f pre_f post_f req_f ens_f) : Pure (repr a framed_g pre_g post_g req_g ens_g) (requires subcomp_pre req_f ens_f req_g ens_g p1 p2) (ensures fun _ -> True) /// Logical precondition for the if_then_else combinator unfold let if_then_else_req (#pre_f:pre_t) (#pre_g:pre_t) (#frame_f #frame_g:vprop) (#pr: prop) (s_pre: squash (can_be_split_dep pr (pre_f `star` frame_f) (pre_g `star` frame_g))) (req_then:req_t pre_f) (req_else:req_t pre_g) (p:Type0) : req_t (pre_f `star` frame_f) = fun h -> pr /\ ( can_be_split_trans (pre_f `star` frame_f) (pre_g `star` frame_g) pre_g; (p ==> req_then (focus_rmem h pre_f)) /\ ((~ p) ==> req_else (focus_rmem h pre_g))) /// Logical postcondition for the if_then_else combinator unfold let if_then_else_ens (#a:Type) (#pre_f:pre_t) (#pre_g:pre_t) (#post_f:post_t a) (#post_g:post_t a) (#frame_f #frame_g:vprop) (#pr:prop) (s1: squash (can_be_split_dep pr (pre_f `star` frame_f) (pre_g `star` frame_g))) (s2: squash (equiv_forall (fun x -> post_f x `star` frame_f) (fun x -> post_g x `star` frame_g))) (ens_then:ens_t pre_f a post_f) (ens_else:ens_t pre_g a post_g) (p:Type0) : ens_t (pre_f `star` frame_f) a (fun x -> post_f x `star` frame_f) = fun h0 x h1 -> pr /\ ( can_be_split_trans (pre_f `star` frame_f) (pre_g `star` frame_g) pre_g; can_be_split_trans (post_f x `star` frame_f) (post_g x `star` frame_g) (post_g x); (p ==> ens_then (focus_rmem h0 pre_f) x (focus_rmem h1 (post_f x))) /\ ((~ p) ==> ens_else (focus_rmem h0 pre_g) x (focus_rmem h1 (post_g x)))) /// If_then_else combinator for Steel computations. /// The soundness of this combinator is automatically proven with respect to the subcomp /// subtyping combinator defined above by the F layered effects framework let if_then_else (a:Type) (#framed_f:eqtype_as_type bool) (#framed_g:eqtype_as_type bool) (#[@@@ framing_implicit] pre_f:pre_t) (#[@@@ framing_implicit] pre_g:pre_t) (#[@@@ framing_implicit] post_f:post_t a) (#[@@@ framing_implicit] post_g:post_t a) (#[@@@ framing_implicit] req_then:req_t pre_f) (#[@@@ framing_implicit] ens_then:ens_t pre_f a post_f) (#[@@@ framing_implicit] req_else:req_t pre_g) (#[@@@ framing_implicit] ens_else:ens_t pre_g a post_g) (#[@@@ framing_implicit] frame_f : vprop) (#[@@@ framing_implicit] frame_g : vprop) (#[@@@ framing_implicit] pr : prop) (#[@@@ framing_implicit] me1 : squash (maybe_emp framed_f frame_f)) (#[@@@ framing_implicit] me2 : squash (maybe_emp framed_g frame_g)) (#[@@@ framing_implicit] s_pre: squash (can_be_split_dep pr (pre_f `star` frame_f) (pre_g `star` frame_g))) (#[@@@ framing_implicit] s_post: squash (equiv_forall (fun x -> post_f x `star` frame_f) (fun x -> post_g x `star` frame_g))) (f:repr a framed_f pre_f post_f req_then ens_then) (g:repr a framed_g pre_g post_g req_else ens_else) (p:bool) : Type = repr a true (pre_f `star` frame_f) (fun x -> post_f x `star` frame_f) (if_then_else_req s_pre req_then req_else p) (if_then_else_ens s_pre s_post ens_then ens_else p) /// Assembling the combinators defined above into an actual effect /// If the effect appears at the top-level, make sure it is constrained as per STTop [@@ ite_soundness_by ite_attr; top_level_effect "Steel.Effect.SteelTop"; primitive_extraction ] reflectable effect { SteelBase (a:Type) (framed:bool) (pre:pre_t) (post:post_t a) (_:req_t pre) (_:ens_t pre a post) with { repr = repr; return = return_; bind = bind; subcomp = subcomp; if_then_else = if_then_else } } // // Trivial preconditions for top-level effect // effect SteelTop (a:Type) (framed:bool) (post:post_t a) (ens:ens_t emp a post) = SteelBase a framed emp post (return_req _) ens /// The two user-facing effects, corresponding to not yet framed (Steel) and already framed (SteelF) /// computations. In the ICFP21 paper, this is modeled by the \|- and \|-_F modalities effect Steel (a:Type) (pre:pre_t) (post:post_t a) (req:req_t pre) (ens:ens_t pre a post) = SteelBase a false pre post req ens effect SteelF (a:Type) (pre:pre_t) (post:post_t a) (req:req_t pre) (ens:ens_t pre a post) = SteelBase a true pre post req ens (* Composing Steel and Pure computations *) /// Logical precondition of a Pure and a Steel computation composition. /// The current state (memory) must satisfy the precondition of the Steel computation, /// and the wp of the PURE computation `as_requires wp` must also be satisfied unfold let bind_pure_steel__req (#a:Type) (wp:pure_wp a) (#pre:pre_t) (req:a -> req_t pre) : req_t pre = fun m -> (wp (fun x -> (req x) m)) /// Logical postcondition of a Pure and a Steel composition. /// There exists an intermediate value (the output of the Pure computation) such that /// the postcondition of the pure computation is satisfied.	{ "checked_file": "/", "dependencies": [ "Steel.Memory.fsti.checked", "Steel.Effect.Common.fsti.checked", "prims.fst.checked", "FStar.Tactics.fst.checked", "FStar.Set.fsti.checked", "FStar.Pervasives.fsti.checked", "FStar.Ghost.fsti.checked", "FStar.FunctionalExtensionality.fsti.checked" ], "interface_file": false, "source_file": "Steel.Effect.fsti" }	[ { "abbrev": false, "full_module": "Steel.Effect.Common", "short_module": null }, { "abbrev": true, "full_module": "FStar.Tactics", "short_module": "T" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": true, "full_module": "FStar.FunctionalExtensionality", "short_module": "FExt" }, { "abbrev": true, "full_module": "Steel.Memory", "short_module": "Mem" }, { "abbrev": false, "full_module": "Steel.Memory", "short_module": null }, { "abbrev": false, "full_module": "Steel", "short_module": null }, { "abbrev": false, "full_module": "Steel", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	wp: Prims.pure_wp a -> ens: (_: a -> Steel.Effect.Common.ens_t pre b post) -> Steel.Effect.Common.ens_t pre b post	Prims.Tot	[ "total" ]	[]	[ "Prims.pure_wp", "Steel.Effect.Common.pre_t", "Steel.Effect.Common.post_t", "Steel.Effect.Common.ens_t", "Steel.Effect.Common.rmem", "Prims.l_and", "Prims.as_requires", "Prims.l_Exists", "Prims.as_ensures" ]	[]	false	false	false	false	false	let bind_pure_steel__ens (#a #b: Type) (wp: pure_wp a) (#pre: pre_t) (#post: post_t b) (ens: (a -> ens_t pre b post)) : ens_t pre b post =	fun m0 r m1 -> (as_requires wp /\ (exists (x: a). as_ensures wp x /\ ((ens x) m0 r m1)))	false
Steel.Effect.fsti	Steel.Effect.bind_pure_steel__req	val bind_pure_steel__req (#a: Type) (wp: pure_wp a) (#pre: pre_t) (req: (a -> req_t pre)) : req_t pre	val bind_pure_steel__req (#a: Type) (wp: pure_wp a) (#pre: pre_t) (req: (a -> req_t pre)) : req_t pre	let bind_pure_steel__req (#a:Type) (wp:pure_wp a) (#pre:pre_t) (req:a -> req_t pre) : req_t pre = fun m -> (wp (fun x -> (req x) m))	{ "file_name": "lib/steel/Steel.Effect.fsti", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }	{ "end_col": 36, "end_line": 295, "start_col": 0, "start_line": 292 }	(* Copyright 2020 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. ) module Steel.Effect open Steel.Memory module Mem = Steel.Memory module FExt = FStar.FunctionalExtensionality open FStar.Ghost module T = FStar.Tactics include Steel.Effect.Common /// This module defines the main Steel effect, with requires and ensures predicates operating on /// selectors, which will be discharged by SMT #set-options "--warn_error -330" //turn off the experimental feature warning #set-options "--ide_id_info_off" ( Defining the Steel effect with selectors ) /// The underlying representation of Steel computations. /// The framed bit indicates whether this computation has already been framed. This corresponds to the \|- and \|-_F modalities /// in the ICFP21 paper val repr (a:Type) (framed:bool) (pre:pre_t) (post:post_t a) (req:req_t pre) (ens:ens_t pre a post) : Type u#2 /// Logical precondition of the return combinator unfold let return_req (p:vprop) : req_t p = fun _ -> True /// Logical postcondition of the return combinator: /// The returned value [r] corresponds to the value passed to the return [x], /// and return leaves selectors of all resources in [p] unchanged unfold let return_ens (a:Type) (x:a) (p:a -> vprop) : ens_t (p x) a p = fun (h0:rmem (p x)) (r:a) (h1:rmem (p r)) -> r == x /\ frame_equalities (p x) h0 (focus_rmem h1 (p x)) /// Monadic return combinator for the Steel effect. It is parametric in the postcondition /// The vprop precondition is annotated with the return_pre predicate to enable special handling, /// as explained in Steel.Effect.Common val return_ (a:Type) (x:a) (#[@@@ framing_implicit] p:a -> vprop) : repr a true (return_pre (p x)) p (return_req (p x)) (return_ens a x p) /// Logical precondition for the composition (bind) of two Steel computations: /// The postcondition of the first computation must imply the precondition of the second computation, /// and also ensure that any equalities abducted during frame inference inside the predicate [pr] are satisfied unfold let bind_req (#a:Type) (#pre_f:pre_t) (#post_f:post_t a) (req_f:req_t pre_f) (ens_f:ens_t pre_f a post_f) (#pre_g:a -> pre_t) (#pr:a -> prop) (req_g:(x:a -> req_t (pre_g x))) (frame_f:vprop) (frame_g:a -> vprop) (_:squash (can_be_split_forall_dep pr (fun x -> post_f x `star` frame_f) (fun x -> pre_g x `star` frame_g x))) : req_t (pre_f `star` frame_f) = fun m0 -> req_f (focus_rmem m0 pre_f) /\ (forall (x:a) (h1:hmem (post_f x `star` frame_f)). (ens_f (focus_rmem m0 pre_f) x (focus_rmem (mk_rmem (post_f x `star` frame_f) h1) (post_f x)) /\ frame_equalities frame_f (focus_rmem m0 frame_f) (focus_rmem (mk_rmem (post_f x `star` frame_f) h1) frame_f)) ==> pr x /\ (can_be_split_trans (post_f x `star` frame_f) (pre_g x `star` frame_g x) (pre_g x); (req_g x) (focus_rmem (mk_rmem (post_f x `star` frame_f) h1) (pre_g x)))) /// Logical postcondition for the composition (bind) of two Steel computations: /// The precondition of the first computation was satisfied in the initial state, and there /// exists an intermediate state where the two-state postcondition of the first computation was /// satisfied, and which yields the validity of the two-state postcondition of the second computation /// on the final state [m2] with the returned value [y] /// Note that the ensures for the bind below asserts req_f /// This is not necessary, but an explicit assert may help the solver unfold let bind_ens (#a:Type) (#b:Type) (#pre_f:pre_t) (#post_f:post_t a) (req_f:req_t pre_f) (ens_f:ens_t pre_f a post_f) (#pre_g:a -> pre_t) (#post_g:a -> post_t b) (#pr:a -> prop) (ens_g:(x:a -> ens_t (pre_g x) b (post_g x))) (frame_f:vprop) (frame_g:a -> vprop) (post:post_t b) (_:squash (can_be_split_forall_dep pr (fun x -> post_f x `star` frame_f) (fun x -> pre_g x `star` frame_g x))) (_:squash (can_be_split_post (fun x y -> post_g x y `star` frame_g x) post)) : ens_t (pre_f `star` frame_f) b post = fun m0 y m2 -> req_f (focus_rmem m0 pre_f) /\ (exists (x:a) (h1:hmem (post_f x `star` frame_f)). pr x /\ ( can_be_split_trans (post_f x `star` frame_f) (pre_g x `star` frame_g x) (pre_g x); can_be_split_trans (post_f x `star` frame_f) (pre_g x `star` frame_g x) (frame_g x); can_be_split_trans (post y) (post_g x y `star` frame_g x) (post_g x y); can_be_split_trans (post y) (post_g x y `star` frame_g x) (frame_g x); frame_equalities frame_f (focus_rmem m0 frame_f) (focus_rmem (mk_rmem (post_f x `star` frame_f) h1) frame_f) /\ frame_equalities (frame_g x) (focus_rmem (mk_rmem (post_f x `star` frame_f) h1) (frame_g x)) (focus_rmem m2 (frame_g x)) /\ ens_f (focus_rmem m0 pre_f) x (focus_rmem (mk_rmem (post_f x `star` frame_f) h1) (post_f x)) /\ (ens_g x) (focus_rmem (mk_rmem (post_f x `star` frame_f) h1) (pre_g x)) y (focus_rmem m2 (post_g x y)))) /// Steel effect combinator to compose two Steel computations /// Separation logic VCs are squashed goals passed as implicits, annotated with the framing_implicit /// attribute. This indicates that they will be discharged by the tactic in Steel.Effect.Common /// Requires/ensures logical VCs are defined using weakest preconditions combinators defined above, /// and discharged by SMT. val bind (a:Type) (b:Type) (#framed_f:eqtype_as_type bool) (#framed_g:eqtype_as_type bool) (#[@@@ framing_implicit] pre_f:pre_t) (#[@@@ framing_implicit] post_f:post_t a) (#[@@@ framing_implicit] req_f:req_t pre_f) (#[@@@ framing_implicit] ens_f:ens_t pre_f a post_f) (#[@@@ framing_implicit] pre_g:a -> pre_t) (#[@@@ framing_implicit] post_g:a -> post_t b) (#[@@@ framing_implicit] req_g:(x:a -> req_t (pre_g x))) (#[@@@ framing_implicit] ens_g:(x:a -> ens_t (pre_g x) b (post_g x))) (#[@@@ framing_implicit] frame_f:vprop) (#[@@@ framing_implicit] frame_g:a -> vprop) (#[@@@ framing_implicit] post:post_t b) (#[@@@ framing_implicit] _ : squash (maybe_emp framed_f frame_f)) (#[@@@ framing_implicit] _ : squash (maybe_emp_dep framed_g frame_g)) (#[@@@ framing_implicit] pr:a -> prop) (#[@@@ framing_implicit] p1:squash (can_be_split_forall_dep pr (fun x -> post_f x `star` frame_f) (fun x -> pre_g x `star` frame_g x))) (#[@@@ framing_implicit] p2:squash (can_be_split_post (fun x y -> post_g x y `star` frame_g x) post)) (f:repr a framed_f pre_f post_f req_f ens_f) (g:(x:a -> repr b framed_g (pre_g x) (post_g x) (req_g x) (ens_g x))) : repr b true (pre_f `star` frame_f) post (bind_req req_f ens_f req_g frame_f frame_g p1) (bind_ens req_f ens_f ens_g frame_f frame_g post p1 p2) /// Logical precondition for subtyping relation for Steel computation. unfold let subcomp_pre (#a:Type) (#pre_f:pre_t) (#post_f:post_t a) (req_f:req_t pre_f) (ens_f:ens_t pre_f a post_f) (#pre_g:pre_t) (#post_g:post_t a) (req_g:req_t pre_g) (ens_g:ens_t pre_g a post_g) (#frame:vprop) (#pr:prop) (_:squash (can_be_split_dep pr pre_g (pre_f `star` frame))) (_:squash (equiv_forall post_g (fun x -> post_f x `star` frame))) : pure_pre // The call to with_tactic allows us to reduce VCs in a controlled way, once all // uvars have been resolved. // To ensure an SMT-friendly encoding of the VC, it needs to be encapsulated in a squash call = T.rewrite_with_tactic vc_norm (squash ( (forall (h0:hmem pre_g). req_g (mk_rmem pre_g h0) ==> pr /\ (can_be_split_trans pre_g (pre_f `star` frame) pre_f; req_f (focus_rmem (mk_rmem pre_g h0) pre_f))) /\ (forall (h0:hmem pre_g) (x:a) (h1:hmem (post_g x)). ( pr ==> ( can_be_split_trans (post_g x) (post_f x `star` frame) (post_f x); can_be_split_trans (pre_g) (pre_f `star` frame) frame; can_be_split_trans (post_g x) (post_f x `star` frame) frame; can_be_split_trans pre_g (pre_f `star` frame) pre_f; (req_g (mk_rmem pre_g h0) /\ ens_f (focus_rmem (mk_rmem pre_g h0) pre_f) x (focus_rmem (mk_rmem (post_g x) h1) (post_f x)) /\ frame_equalities frame (focus_rmem (mk_rmem pre_g h0) frame) (focus_rmem (mk_rmem (post_g x) h1) frame)) ==> ens_g (mk_rmem pre_g h0) x (mk_rmem (post_g x) h1)) )) )) /// Subtyping combinator for Steel computations. /// Computation [f] is given type `repr a framed_g pre_g post_g req_g ens_g`. /// As for bind, separation logic goals are encoded as squashed implicits which will be discharged /// by tactic, while logical requires/ensures operating on selectors are discharged by SMT val subcomp (a:Type) (#framed_f:eqtype_as_type bool) (#framed_g:eqtype_as_type bool) (#[@@@ framing_implicit] pre_f:pre_t) (#[@@@ framing_implicit] post_f:post_t a) (#[@@@ framing_implicit] req_f:req_t pre_f) (#[@@@ framing_implicit] ens_f:ens_t pre_f a post_f) (#[@@@ framing_implicit] pre_g:pre_t) (#[@@@ framing_implicit] post_g:post_t a) (#[@@@ framing_implicit] req_g:req_t pre_g) (#[@@@ framing_implicit] ens_g:ens_t pre_g a post_g) (#[@@@ framing_implicit] frame:vprop) (#[@@@ framing_implicit] _ : squash (maybe_emp framed_f frame)) (#[@@@ framing_implicit] pr : prop) (#[@@@ framing_implicit] p1:squash (can_be_split_dep pr pre_g (pre_f `star` frame))) (#[@@@ framing_implicit] p2:squash (equiv_forall post_g (fun x -> post_f x `star` frame))) (f:repr a framed_f pre_f post_f req_f ens_f) : Pure (repr a framed_g pre_g post_g req_g ens_g) (requires subcomp_pre req_f ens_f req_g ens_g p1 p2) (ensures fun _ -> True) /// Logical precondition for the if_then_else combinator unfold let if_then_else_req (#pre_f:pre_t) (#pre_g:pre_t) (#frame_f #frame_g:vprop) (#pr: prop) (s_pre: squash (can_be_split_dep pr (pre_f `star` frame_f) (pre_g `star` frame_g))) (req_then:req_t pre_f) (req_else:req_t pre_g) (p:Type0) : req_t (pre_f `star` frame_f) = fun h -> pr /\ ( can_be_split_trans (pre_f `star` frame_f) (pre_g `star` frame_g) pre_g; (p ==> req_then (focus_rmem h pre_f)) /\ ((~ p) ==> req_else (focus_rmem h pre_g))) /// Logical postcondition for the if_then_else combinator unfold let if_then_else_ens (#a:Type) (#pre_f:pre_t) (#pre_g:pre_t) (#post_f:post_t a) (#post_g:post_t a) (#frame_f #frame_g:vprop) (#pr:prop) (s1: squash (can_be_split_dep pr (pre_f `star` frame_f) (pre_g `star` frame_g))) (s2: squash (equiv_forall (fun x -> post_f x `star` frame_f) (fun x -> post_g x `star` frame_g))) (ens_then:ens_t pre_f a post_f) (ens_else:ens_t pre_g a post_g) (p:Type0) : ens_t (pre_f `star` frame_f) a (fun x -> post_f x `star` frame_f) = fun h0 x h1 -> pr /\ ( can_be_split_trans (pre_f `star` frame_f) (pre_g `star` frame_g) pre_g; can_be_split_trans (post_f x `star` frame_f) (post_g x `star` frame_g) (post_g x); (p ==> ens_then (focus_rmem h0 pre_f) x (focus_rmem h1 (post_f x))) /\ ((~ p) ==> ens_else (focus_rmem h0 pre_g) x (focus_rmem h1 (post_g x)))) /// If_then_else combinator for Steel computations. /// The soundness of this combinator is automatically proven with respect to the subcomp /// subtyping combinator defined above by the F layered effects framework let if_then_else (a:Type) (#framed_f:eqtype_as_type bool) (#framed_g:eqtype_as_type bool) (#[@@@ framing_implicit] pre_f:pre_t) (#[@@@ framing_implicit] pre_g:pre_t) (#[@@@ framing_implicit] post_f:post_t a) (#[@@@ framing_implicit] post_g:post_t a) (#[@@@ framing_implicit] req_then:req_t pre_f) (#[@@@ framing_implicit] ens_then:ens_t pre_f a post_f) (#[@@@ framing_implicit] req_else:req_t pre_g) (#[@@@ framing_implicit] ens_else:ens_t pre_g a post_g) (#[@@@ framing_implicit] frame_f : vprop) (#[@@@ framing_implicit] frame_g : vprop) (#[@@@ framing_implicit] pr : prop) (#[@@@ framing_implicit] me1 : squash (maybe_emp framed_f frame_f)) (#[@@@ framing_implicit] me2 : squash (maybe_emp framed_g frame_g)) (#[@@@ framing_implicit] s_pre: squash (can_be_split_dep pr (pre_f `star` frame_f) (pre_g `star` frame_g))) (#[@@@ framing_implicit] s_post: squash (equiv_forall (fun x -> post_f x `star` frame_f) (fun x -> post_g x `star` frame_g))) (f:repr a framed_f pre_f post_f req_then ens_then) (g:repr a framed_g pre_g post_g req_else ens_else) (p:bool) : Type = repr a true (pre_f `star` frame_f) (fun x -> post_f x `star` frame_f) (if_then_else_req s_pre req_then req_else p) (if_then_else_ens s_pre s_post ens_then ens_else p) /// Assembling the combinators defined above into an actual effect /// If the effect appears at the top-level, make sure it is constrained as per STTop [@@ ite_soundness_by ite_attr; top_level_effect "Steel.Effect.SteelTop"; primitive_extraction ] reflectable effect { SteelBase (a:Type) (framed:bool) (pre:pre_t) (post:post_t a) (_:req_t pre) (_:ens_t pre a post) with { repr = repr; return = return_; bind = bind; subcomp = subcomp; if_then_else = if_then_else } } // // Trivial preconditions for top-level effect // effect SteelTop (a:Type) (framed:bool) (post:post_t a) (ens:ens_t emp a post) = SteelBase a framed emp post (return_req _) ens /// The two user-facing effects, corresponding to not yet framed (Steel) and already framed (SteelF) /// computations. In the ICFP21 paper, this is modeled by the \|- and \|-_F modalities effect Steel (a:Type) (pre:pre_t) (post:post_t a) (req:req_t pre) (ens:ens_t pre a post) = SteelBase a false pre post req ens effect SteelF (a:Type) (pre:pre_t) (post:post_t a) (req:req_t pre) (ens:ens_t pre a post) = SteelBase a true pre post req ens (* Composing Steel and Pure computations *) /// Logical precondition of a Pure and a Steel computation composition. /// The current state (memory) must satisfy the precondition of the Steel computation, /// and the wp of the PURE computation `as_requires wp` must also be satisfied	{ "checked_file": "/", "dependencies": [ "Steel.Memory.fsti.checked", "Steel.Effect.Common.fsti.checked", "prims.fst.checked", "FStar.Tactics.fst.checked", "FStar.Set.fsti.checked", "FStar.Pervasives.fsti.checked", "FStar.Ghost.fsti.checked", "FStar.FunctionalExtensionality.fsti.checked" ], "interface_file": false, "source_file": "Steel.Effect.fsti" }	[ { "abbrev": false, "full_module": "Steel.Effect.Common", "short_module": null }, { "abbrev": true, "full_module": "FStar.Tactics", "short_module": "T" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": true, "full_module": "FStar.FunctionalExtensionality", "short_module": "FExt" }, { "abbrev": true, "full_module": "Steel.Memory", "short_module": "Mem" }, { "abbrev": false, "full_module": "Steel.Memory", "short_module": null }, { "abbrev": false, "full_module": "Steel", "short_module": null }, { "abbrev": false, "full_module": "Steel", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]	{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }	false	wp: Prims.pure_wp a -> req: (_: a -> Steel.Effect.Common.req_t pre) -> Steel.Effect.Common.req_t pre	Prims.Tot	[ "total" ]	[]	[ "Prims.pure_wp", "Steel.Effect.Common.pre_t", "Steel.Effect.Common.req_t", "Steel.Effect.Common.rmem", "Prims.l_True" ]	[]	false	false	false	false	false	let bind_pure_steel__req (#a: Type) (wp: pure_wp a) (#pre: pre_t) (req: (a -> req_t pre)) : req_t pre =	fun m -> (wp (fun x -> (req x) m))	false

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