microsoft/FStarDataSet-V2 · Datasets at Hugging Face

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.eval_maddr

val eval_maddr (m: maddr) (s: state) : int

let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 33, "end_line": 263, "start_col": 0, "start_line": 262 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

m: Vale.PPC64LE.Machine_s.maddr -> s: Vale.PPC64LE.Machine_s.state -> Prims.int

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.maddr", "Vale.PPC64LE.Machine_s.state", "Prims.op_Addition", "Vale.PPC64LE.Semantics_s.eval_reg", "Vale.PPC64LE.Machine_s.__proj__Mkmaddr__item__address", "Vale.PPC64LE.Machine_s.__proj__Mkmaddr__item__offset", "Prims.int" ]

[]

false

true

false

let eval_maddr (m: maddr) (s: state) : int =

eval_reg m.address s + m.offset

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.lemma_is_machine_heap_update128

val lemma_is_machine_heap_update128 (ptr: int) (v: quad32) (mh: machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))]

let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 54, "end_line": 194, "start_col": 0, "start_line": 171 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

ptr: Prims.int -> v: Vale.Def.Types_s.quad32 -> mh: Vale.Arch.MachineHeap_s.machine_heap -> FStar.Pervasives.Lemma (requires Vale.Arch.MachineHeap_s.valid_addr128 ptr mh) (ensures Vale.Arch.MachineHeap_s.is_machine_heap_update mh (Vale.Arch.MachineHeap_s.update_heap128 ptr v mh)) [ SMTPat (Vale.Arch.MachineHeap_s.is_machine_heap_update mh (Vale.Arch.MachineHeap_s.update_heap128 ptr v mh)) ]

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "Prims.int", "Vale.Def.Types_s.quad32", "Vale.Arch.MachineHeap_s.machine_heap", "Prims.op_Addition", "Vale.Def.Words_s.__proj__Mkfour__item__hi3", "Vale.Def.Types_s.nat32", "Prims.unit", "Vale.Def.Words_s.__proj__Mkfour__item__hi2", "Vale.Def.Words_s.__proj__Mkfour__item__lo1", "Vale.Def.Words_s.__proj__Mkfour__item__lo0", "Vale.Arch.MachineHeap_s.update_heap128_reveal", "FStar.Pervasives.reveal_opaque", "Prims.bool", "Vale.Arch.MachineHeap_s.valid_addr128", "Vale.Arch.MachineHeap_s.update_heap32", "Vale.Def.Words_s.nat32", "Prims.l_and", "Prims.b2t", "Vale.Arch.MachineHeap_s.valid_addr", "Prims.squash", "Vale.Arch.MachineHeap_s.is_machine_heap_update", "Prims.Nil", "FStar.Pervasives.pattern", "Vale.Arch.MachineHeap_s.update_heap32_reveal", "Vale.Arch.MachineHeap_s.update_heap128", "Prims.Cons", "FStar.Pervasives.smt_pat", "Prims.logical" ]

[]

false

true

false

let lemma_is_machine_heap_update128 (ptr: int) (v: quad32) (mh: machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] =

let lemma_is_machine_heap_update32 (ptr: int) (v: nat32) (mh: machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.update_mem128_and_taint

val update_mem128_and_taint (ptr: int) (v: quad32) (s: state) (t: taint) : state

let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 8, "end_line": 212, "start_col": 0, "start_line": 205 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

ptr: Prims.int -> v: Vale.Def.Types_s.quad32 -> s: Vale.PPC64LE.Machine_s.state -> t: Vale.Arch.HeapTypes_s.taint -> Vale.PPC64LE.Machine_s.state

Prims.Tot

[ "total" ]

[]

[ "Prims.int", "Vale.Def.Types_s.quad32", "Vale.PPC64LE.Machine_s.state", "Vale.Arch.HeapTypes_s.taint", "Vale.Arch.MachineHeap_s.valid_addr128", "Vale.Arch.Heap.heap_get", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_heap", "Vale.PPC64LE.Machine_s.Mkstate", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ok", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__regs", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__vecs", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__cr0", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__xer", "Vale.Arch.Heap.heap_upd", "Vale.Arch.MachineHeap_s.update_heap128", "Vale.PPC64LE.Semantics_s.update_n", "Vale.Arch.Heap.heap_taint", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stack", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stackTaint", "Prims.bool" ]

[]

false

true

false

let update_mem128_and_taint (ptr: int) (v: quad32) (s: state) (t: taint) : state =

if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.update_mem128

val update_mem128 (ptr: int) (v: quad32) (s: state) : state

let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 8, "end_line": 203, "start_col": 0, "start_line": 196 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

ptr: Prims.int -> v: Vale.Def.Types_s.quad32 -> s: Vale.PPC64LE.Machine_s.state -> Vale.PPC64LE.Machine_s.state

Prims.Tot

[ "total" ]

[]

[ "Prims.int", "Vale.Def.Types_s.quad32", "Vale.PPC64LE.Machine_s.state", "Vale.Arch.MachineHeap_s.valid_addr128", "Vale.Arch.Heap.heap_get", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_heap", "Vale.PPC64LE.Machine_s.Mkstate", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ok", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__regs", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__vecs", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__cr0", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__xer", "Vale.Arch.Heap.heap_upd", "Vale.Arch.MachineHeap_s.update_heap128", "Vale.Arch.Heap.heap_taint", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stack", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stackTaint", "Prims.bool" ]

[]

false

true

false

let update_mem128 (ptr: int) (v: quad32) (s: state) : state =

if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.lemma_is_machine_heap_update64

val lemma_is_machine_heap_update64 (ptr: int) (v: nat64) (mh: machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))]

let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); ()

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 4, "end_line": 151, "start_col": 0, "start_line": 144 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

ptr: Prims.int -> v: Vale.Def.Types_s.nat64 -> mh: Vale.Arch.MachineHeap_s.machine_heap -> FStar.Pervasives.Lemma (requires Vale.Arch.MachineHeap_s.valid_addr64 ptr mh) (ensures Vale.Arch.MachineHeap_s.is_machine_heap_update mh (Vale.Arch.MachineHeap_s.update_heap64 ptr v mh)) [ SMTPat (Vale.Arch.MachineHeap_s.is_machine_heap_update mh (Vale.Arch.MachineHeap_s.update_heap64 ptr v mh)) ]

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "Prims.int", "Vale.Def.Types_s.nat64", "Vale.Arch.MachineHeap_s.machine_heap", "Prims.unit", "Vale.Arch.MachineHeap_s.update_heap64_reveal", "FStar.Pervasives.reveal_opaque", "Prims.bool", "Vale.Arch.MachineHeap_s.valid_addr64", "Prims.b2t", "Prims.squash", "Vale.Arch.MachineHeap_s.is_machine_heap_update", "Vale.Arch.MachineHeap_s.update_heap64", "Prims.Cons", "FStar.Pervasives.pattern", "FStar.Pervasives.smt_pat", "Prims.logical", "Prims.Nil" ]

[]

true

false

true

false

let lemma_is_machine_heap_update64 (ptr: int) (v: nat64) (mh: machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] =

reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); ()

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.valid_dst_stack64_addr

val valid_dst_stack64_addr (m: maddr) (s: state) : bool

let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 62, "end_line": 301, "start_col": 0, "start_line": 300 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

m: Vale.PPC64LE.Machine_s.maddr -> s: Vale.PPC64LE.Machine_s.state -> Prims.bool

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.maddr", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Semantics_s.valid_dst_stack64", "Vale.PPC64LE.Semantics_s.eval_reg", "Vale.PPC64LE.Semantics_s.eval_maddr", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stack", "Prims.bool" ]

[]

false

true

false

let valid_dst_stack64_addr (m: maddr) (s: state) : bool =

valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.valid_dst_stack64

val valid_dst_stack64 (r1: nat64) (ptr: int) (st: machine_stack) : bool

let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 33, "end_line": 292, "start_col": 0, "start_line": 289 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64)

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

r1: Vale.Def.Types_s.nat64 -> ptr: Prims.int -> st: Vale.PPC64LE.Machine_s.machine_stack -> Prims.bool

Prims.Tot

[ "total" ]

[]

[ "Vale.Def.Types_s.nat64", "Prims.int", "Vale.PPC64LE.Machine_s.machine_stack", "Vale.PPC64LE.Machine_s.nat64", "Prims.b2t", "Prims.op_GreaterThanOrEqual", "FStar.Map.t", "Vale.PPC64LE.Machine_s.nat8", "Prims.op_AmpAmp", "Prims.op_LessThanOrEqual", "Prims.op_Addition", "Prims.bool" ]

[]

false

true

false

let valid_dst_stack64 (r1: nat64) (ptr: int) (st: machine_stack) : bool =

let Machine_stack init_r1 mem = st in ptr >= r1 && ptr + 8 <= init_r1

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.free_stack'

val free_stack' (start finish: int) (st: machine_stack) : machine_stack

let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 31, "end_line": 327, "start_col": 0, "start_line": 320 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

start: Prims.int -> finish: Prims.int -> st: Vale.PPC64LE.Machine_s.machine_stack -> Vale.PPC64LE.Machine_s.machine_stack

Prims.Tot

[ "total" ]

[]

[ "Prims.int", "Vale.PPC64LE.Machine_s.machine_stack", "Vale.PPC64LE.Machine_s.nat64", "Prims.b2t", "Prims.op_GreaterThanOrEqual", "FStar.Map.t", "Vale.PPC64LE.Machine_s.nat8", "Vale.PPC64LE.Machine_s.Machine_stack", "Vale.Def.Words_s.nat8", "FStar.Map.restrict", "FStar.Set.set", "Vale.Lib.Set.remove_between", "FStar.Map.domain" ]

[]

false

true

false

let free_stack' (start finish: int) (st: machine_stack) : machine_stack =

let Machine_stack init_r1 mem = st in let domain = Map.domain mem in let restricted_domain = Vale.Lib.Set.remove_between domain start finish in let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.valid_dst_stack128_addr

val valid_dst_stack128_addr (m: maddr) (s: state) : bool

let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 63, "end_line": 304, "start_col": 0, "start_line": 303 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

m: Vale.PPC64LE.Machine_s.maddr -> s: Vale.PPC64LE.Machine_s.state -> Prims.bool

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.maddr", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Semantics_s.valid_dst_stack128", "Vale.PPC64LE.Semantics_s.eval_reg", "Vale.PPC64LE.Semantics_s.eval_maddr", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stack", "Prims.bool" ]

[]

false

true

false

let valid_dst_stack128_addr (m: maddr) (s: state) : bool =

valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.valid_mem64

val valid_mem64 (r: reg) (i: int) (s: state) : bool

let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap)

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 54, "end_line": 333, "start_col": 0, "start_line": 332 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap)

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

r: Vale.PPC64LE.Machine_s.reg -> i: Prims.int -> s: Vale.PPC64LE.Machine_s.state -> Prims.bool

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.reg", "Prims.int", "Vale.PPC64LE.Machine_s.state", "Vale.Arch.MachineHeap_s.valid_addr64", "Prims.op_Addition", "Vale.PPC64LE.Semantics_s.eval_reg", "Vale.Arch.Heap.heap_get", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_heap", "Prims.bool" ]

[]

false

true

false

let valid_mem64 (r: reg) (i: int) (s: state) : bool =

valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap)

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.valid_dst_stack128

val valid_dst_stack128 (r1: nat64) (ptr: int) (st: machine_stack) : bool

let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 36, "end_line": 298, "start_col": 0, "start_line": 295 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

r1: Vale.Def.Types_s.nat64 -> ptr: Prims.int -> st: Vale.PPC64LE.Machine_s.machine_stack -> Prims.bool

Prims.Tot

[ "total" ]

[]

[ "Vale.Def.Types_s.nat64", "Prims.int", "Vale.PPC64LE.Machine_s.machine_stack", "Vale.PPC64LE.Machine_s.nat64", "Prims.b2t", "Prims.op_GreaterThanOrEqual", "FStar.Map.t", "Vale.PPC64LE.Machine_s.nat8", "Prims.op_AmpAmp", "Prims.op_LessThanOrEqual", "Prims.op_Addition", "Prims.bool" ]

[]

false

true

false

let valid_dst_stack128 (r1: nat64) (ptr: int) (st: machine_stack) : bool =

let Machine_stack init_r1 mem = st in ptr >= r1 && ptr + 16 <= init_r1

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.valid_mem128

val valid_mem128 (r i: reg) (s: state) : bool

let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap)

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 66, "end_line": 336, "start_col": 0, "start_line": 335 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap)

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

r: Vale.PPC64LE.Machine_s.reg -> i: Vale.PPC64LE.Machine_s.reg -> s: Vale.PPC64LE.Machine_s.state -> Prims.bool

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.reg", "Vale.PPC64LE.Machine_s.state", "Vale.Arch.MachineHeap_s.valid_addr128", "Prims.op_Addition", "Vale.PPC64LE.Semantics_s.eval_reg", "Vale.Arch.Heap.heap_get", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_heap", "Prims.bool" ]

[]

false

true

false

let valid_mem128 (r i: reg) (s: state) : bool =

valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap)

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.valid_mem128'

val valid_mem128' (m: maddr) (s: state) : bool

let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap)

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 87, "end_line": 342, "start_col": 0, "start_line": 341 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap)

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

m: Vale.PPC64LE.Machine_s.maddr -> s: Vale.PPC64LE.Machine_s.state -> Prims.bool

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.maddr", "Vale.PPC64LE.Machine_s.state", "Prims.op_AmpAmp", "Vale.PPC64LE.Machine_s.valid_maddr_offset128", "Vale.PPC64LE.Machine_s.__proj__Mkmaddr__item__offset", "Vale.Arch.MachineHeap_s.valid_addr128", "Vale.PPC64LE.Semantics_s.eval_maddr", "Vale.Arch.Heap.heap_get", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_heap", "Prims.bool" ]

[]

false

true

false

let valid_mem128' (m: maddr) (s: state) : bool =

valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap)

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.valid_mem

val valid_mem (m: maddr) (s: state) : bool

let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap)

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 85, "end_line": 330, "start_col": 0, "start_line": 329 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

m: Vale.PPC64LE.Machine_s.maddr -> s: Vale.PPC64LE.Machine_s.state -> Prims.bool

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.maddr", "Vale.PPC64LE.Machine_s.state", "Prims.op_AmpAmp", "Vale.PPC64LE.Machine_s.valid_maddr_offset64", "Vale.PPC64LE.Machine_s.__proj__Mkmaddr__item__offset", "Vale.Arch.MachineHeap_s.valid_addr64", "Vale.PPC64LE.Semantics_s.eval_maddr", "Vale.Arch.Heap.heap_get", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_heap", "Prims.bool" ]

[]

false

true

false

let valid_mem (m: maddr) (s: state) : bool =

valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap)

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.valid_mem_and_taint

val valid_mem_and_taint (m: maddr) (t: taint) (s: state) : bool

let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 114, "end_line": 346, "start_col": 0, "start_line": 344 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap)

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

m: Vale.PPC64LE.Machine_s.maddr -> t: Vale.Arch.HeapTypes_s.taint -> s: Vale.PPC64LE.Machine_s.state -> Prims.bool

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.maddr", "Vale.Arch.HeapTypes_s.taint", "Vale.PPC64LE.Machine_s.state", "Prims.op_AmpAmp", "Vale.PPC64LE.Machine_s.valid_maddr_offset64", "Vale.PPC64LE.Machine_s.__proj__Mkmaddr__item__offset", "Vale.Arch.MachineHeap_s.valid_addr64", "Vale.Arch.Heap.heap_get", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_heap", "Vale.PPC64LE.Semantics_s.match_n", "Vale.Arch.Heap.heap_taint", "Prims.int", "Vale.PPC64LE.Semantics_s.eval_maddr", "Prims.bool" ]

[]

false

true

false

let valid_mem_and_taint (m: maddr) (t: taint) (s: state) : bool =

let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.valid_mem128_and_taint

val valid_mem128_and_taint (m: maddr) (s: state) (t: taint) : bool

let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 83, "end_line": 350, "start_col": 0, "start_line": 348 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

m: Vale.PPC64LE.Machine_s.maddr -> s: Vale.PPC64LE.Machine_s.state -> t: Vale.Arch.HeapTypes_s.taint -> Prims.bool

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.maddr", "Vale.PPC64LE.Machine_s.state", "Vale.Arch.HeapTypes_s.taint", "Prims.op_AmpAmp", "Vale.Arch.MachineHeap_s.valid_addr128", "Vale.Arch.Heap.heap_get", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_heap", "Vale.PPC64LE.Semantics_s.match_n", "Vale.Arch.Heap.heap_taint", "Prims.int", "Vale.PPC64LE.Semantics_s.eval_maddr", "Prims.bool" ]

[]

false

true

false

let valid_mem128_and_taint (m: maddr) (s: state) (t: taint) : bool =

let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.valid_mem128_reg

val valid_mem128_reg (r: reg) (s: state) : bool

let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap)

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 51, "end_line": 339, "start_col": 0, "start_line": 338 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap)

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

r: Vale.PPC64LE.Machine_s.reg -> s: Vale.PPC64LE.Machine_s.state -> Prims.bool

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.reg", "Vale.PPC64LE.Machine_s.state", "Vale.Arch.MachineHeap_s.valid_addr128", "Vale.PPC64LE.Semantics_s.eval_reg", "Vale.Arch.Heap.heap_get", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_heap", "Prims.bool" ]

[]

false

true

false

let valid_mem128_reg (r: reg) (s: state) : bool =

valid_addr128 (eval_reg r s) (heap_get s.ms_heap)

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.xer_ov

val xer_ov (xer: xer_t) : bool

let xer_ov (xer:xer_t) : bool = xer.ov

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 8, "end_line": 362, "start_col": 0, "start_line": 361 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

xer: Vale.PPC64LE.Machine_s.xer_t -> Prims.bool

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.xer_t", "Vale.PPC64LE.Machine_s.__proj__Mkxer_t__item__ov", "Prims.bool" ]

[]

false

true

false

let xer_ov (xer: xer_t) : bool =

xer.ov

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.xer_ca

val xer_ca (xer: xer_t) : bool

let xer_ca (xer:xer_t) : bool = xer.ca

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 8, "end_line": 365, "start_col": 0, "start_line": 364 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

xer: Vale.PPC64LE.Machine_s.xer_t -> Prims.bool

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.xer_t", "Vale.PPC64LE.Machine_s.__proj__Mkxer_t__item__ca", "Prims.bool" ]

[]

false

true

false

let xer_ca (xer: xer_t) : bool =

xer.ca

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.st

val st : a: Type -> Type

let st (a:Type) = state -> a & state

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 36, "end_line": 374, "start_col": 0, "start_line": 374 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca }

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

a: Type -> Type

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.state", "FStar.Pervasives.Native.tuple2" ]

[]

false

true

let st (a: Type) =

state -> a & state

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.get

val get:st state

let get :st state = fun s -> s, s

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 15, "end_line": 389, "start_col": 0, "start_line": 388 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state unfold let return (#a:Type) (x:a) :st a = fun s -> x, s unfold let (let*) (#a:Type) (#b:Type) (m:st a) (f:a -> st b) :st b = fun s0 -> let x, s1 = m s0 in let y, s2 = f x s1 in y, {s2 with ok=s0.ok && s1.ok && s2.ok}

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Vale.PPC64LE.Semantics_s.st Vale.PPC64LE.Machine_s.state

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.state", "FStar.Pervasives.Native.Mktuple2", "FStar.Pervasives.Native.tuple2" ]

[]

false

true

false

let get:st state =

fun s -> s, s

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.eval_cmp_opr

val eval_cmp_opr (o: cmp_opr) (s: state) : nat64

let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 28, "end_line": 268, "start_col": 0, "start_line": 265 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

o: Vale.PPC64LE.Machine_s.cmp_opr -> s: Vale.PPC64LE.Machine_s.state -> Vale.Def.Types_s.nat64

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.cmp_opr", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Machine_s.reg", "Vale.PPC64LE.Semantics_s.eval_reg", "Vale.PPC64LE.Machine_s.imm16", "Vale.PPC64LE.Machine_s.int_to_nat64", "Vale.Def.Types_s.nat64" ]

[]

false

true

false

let eval_cmp_opr (o: cmp_opr) (s: state) : nat64 =

match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.return

val return (#a: Type) (x: a) : st a

let return (#a:Type) (x:a) :st a = fun s -> x, s

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 15, "end_line": 378, "start_col": 0, "start_line": 377 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

x: a -> Vale.PPC64LE.Semantics_s.st a

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.state", "FStar.Pervasives.Native.Mktuple2", "FStar.Pervasives.Native.tuple2", "Vale.PPC64LE.Semantics_s.st" ]

[]

false

true

false

let return (#a: Type) (x: a) : st a =

fun s -> x, s

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.set

val set (s: state) : st unit

let set (s:state) :st unit = fun _ -> (), s

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 16, "end_line": 393, "start_col": 0, "start_line": 392 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state unfold let return (#a:Type) (x:a) :st a = fun s -> x, s unfold let (let*) (#a:Type) (#b:Type) (m:st a) (f:a -> st b) :st b = fun s0 -> let x, s1 = m s0 in let y, s2 = f x s1 in y, {s2 with ok=s0.ok && s1.ok && s2.ok} unfold let get :st state = fun s -> s, s

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

s: Vale.PPC64LE.Machine_s.state -> Vale.PPC64LE.Semantics_s.st Prims.unit

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.state", "FStar.Pervasives.Native.Mktuple2", "Prims.unit", "FStar.Pervasives.Native.tuple2", "Vale.PPC64LE.Semantics_s.st" ]

[]

false

true

false

let set (s: state) : st unit =

fun _ -> (), s

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.fail

val fail:st unit

let fail :st unit = fun s -> (), {s with ok=false}

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 32, "end_line": 397, "start_col": 0, "start_line": 396 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state unfold let return (#a:Type) (x:a) :st a = fun s -> x, s unfold let (let*) (#a:Type) (#b:Type) (m:st a) (f:a -> st b) :st b = fun s0 -> let x, s1 = m s0 in let y, s2 = f x s1 in y, {s2 with ok=s0.ok && s1.ok && s2.ok} unfold let get :st state = fun s -> s, s unfold let set (s:state) :st unit = fun _ -> (), s

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Vale.PPC64LE.Semantics_s.st Prims.unit

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.state", "FStar.Pervasives.Native.Mktuple2", "Prims.unit", "Vale.PPC64LE.Machine_s.Mkstate", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__regs", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__vecs", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__cr0", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__xer", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_heap", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stack", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stackTaint", "FStar.Pervasives.Native.tuple2" ]

[]

false

true

false

let fail:st unit =

fun s -> (), { s with ok = false }

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.eval_ocmp

val eval_ocmp (s: state) (c: ocmp) : bool

let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 54, "end_line": 277, "start_col": 0, "start_line": 270 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

s: Vale.PPC64LE.Machine_s.state -> c: Vale.PPC64LE.Semantics_s.ocmp -> Prims.bool

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Semantics_s.ocmp", "Vale.PPC64LE.Machine_s.cmp_opr", "Prims.op_Equality", "Vale.Def.Types_s.nat64", "Vale.PPC64LE.Semantics_s.eval_cmp_opr", "Prims.op_disEquality", "Prims.op_LessThanOrEqual", "Prims.op_GreaterThanOrEqual", "Prims.op_LessThan", "Prims.op_GreaterThan", "Prims.bool" ]

[]

false

true

false

let eval_ocmp (s: state) (c: ocmp) : bool =

match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.update_vec

val update_vec (vr: vec) (v: quad32) : st unit

let update_vec (vr:vec) (v:quad32) :st unit = let* s = get in set (update_vec' vr v s)

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 26, "end_line": 416, "start_col": 0, "start_line": 414 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state unfold let return (#a:Type) (x:a) :st a = fun s -> x, s unfold let (let*) (#a:Type) (#b:Type) (m:st a) (f:a -> st b) :st b = fun s0 -> let x, s1 = m s0 in let y, s2 = f x s1 in y, {s2 with ok=s0.ok && s1.ok && s2.ok} unfold let get :st state = fun s -> s, s unfold let set (s:state) :st unit = fun _ -> (), s unfold let fail :st unit = fun s -> (), {s with ok=false} unfold let check (valid: state -> bool) : st unit = let* s = get in if valid s then return () else fail unfold let run (f:st unit) (s:state) : state = snd (f s) let update_reg (r:reg) (v:nat64) :st unit = let* s = get in set (update_reg' r v s)

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

vr: Vale.PPC64LE.Machine_s.vec -> v: Vale.Def.Types_s.quad32 -> Vale.PPC64LE.Semantics_s.st Prims.unit

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.vec", "Vale.Def.Types_s.quad32", "Vale.PPC64LE.Semantics_s.op_let_Star", "Vale.PPC64LE.Machine_s.state", "Prims.unit", "Vale.PPC64LE.Semantics_s.get", "Vale.PPC64LE.Semantics_s.set", "Vale.PPC64LE.Semantics_s.update_vec'", "Vale.PPC64LE.Semantics_s.st" ]

[]

false

true

false

let update_vec (vr: vec) (v: quad32) : st unit =

let* s = get in set (update_vec' vr v s)

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.update_r1'

val update_r1' (new_r1: int) (s: state) : state

let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 5, "end_line": 318, "start_col": 0, "start_line": 312 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') }

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

new_r1: Prims.int -> s: Vale.PPC64LE.Machine_s.state -> Vale.PPC64LE.Machine_s.state

Prims.Tot

[ "total" ]

[]

[ "Prims.int", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Machine_s.nat64", "Prims.b2t", "Prims.op_GreaterThanOrEqual", "FStar.Map.t", "Vale.PPC64LE.Machine_s.nat8", "Prims.op_AmpAmp", "Prims.op_Subtraction", "Prims.op_LessThanOrEqual", "Vale.PPC64LE.Semantics_s.update_reg'", "Prims.bool", "Vale.PPC64LE.Machine_s.machine_stack", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stack" ]

[]

false

true

false

let update_r1' (new_r1: int) (s: state) : state =

let Machine_stack init_r1 mem = s.ms_stack in if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.run

val run (f: st unit) (s: state) : state

let run (f:st unit) (s:state) : state = snd (f s)

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 49, "end_line": 408, "start_col": 0, "start_line": 408 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state unfold let return (#a:Type) (x:a) :st a = fun s -> x, s unfold let (let*) (#a:Type) (#b:Type) (m:st a) (f:a -> st b) :st b = fun s0 -> let x, s1 = m s0 in let y, s2 = f x s1 in y, {s2 with ok=s0.ok && s1.ok && s2.ok} unfold let get :st state = fun s -> s, s unfold let set (s:state) :st unit = fun _ -> (), s unfold let fail :st unit = fun s -> (), {s with ok=false} unfold let check (valid: state -> bool) : st unit = let* s = get in if valid s then return () else fail

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

f: Vale.PPC64LE.Semantics_s.st Prims.unit -> s: Vale.PPC64LE.Machine_s.state -> Vale.PPC64LE.Machine_s.state

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Semantics_s.st", "Prims.unit", "Vale.PPC64LE.Machine_s.state", "FStar.Pervasives.Native.snd" ]

[]

false

true

false

let run (f: st unit) (s: state) : state =

snd (f s)

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.eval_cmp_cr0

val eval_cmp_cr0 (s: state) (c: ocmp) : cr0_t

let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64)

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 76, "end_line": 286, "start_col": 0, "start_line": 279 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

s: Vale.PPC64LE.Machine_s.state -> c: Vale.PPC64LE.Semantics_s.ocmp -> Vale.PPC64LE.Machine_s.cr0_t

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Semantics_s.ocmp", "Vale.PPC64LE.Machine_s.cmp_opr", "Vale.PPC64LE.Machine_s.get_cr0", "Prims.op_Modulus", "Prims.op_Subtraction", "Vale.PPC64LE.Semantics_s.eval_cmp_opr", "Vale.Def.Words_s.pow2_64", "Vale.PPC64LE.Machine_s.cr0_t" ]

[]

false

true

false

let eval_cmp_cr0 (s: state) (c: ocmp) : cr0_t =

match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64)

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.update_reg

val update_reg (r: reg) (v: nat64) : st unit

let update_reg (r:reg) (v:nat64) :st unit = let* s = get in set (update_reg' r v s)

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 25, "end_line": 412, "start_col": 0, "start_line": 410 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state unfold let return (#a:Type) (x:a) :st a = fun s -> x, s unfold let (let*) (#a:Type) (#b:Type) (m:st a) (f:a -> st b) :st b = fun s0 -> let x, s1 = m s0 in let y, s2 = f x s1 in y, {s2 with ok=s0.ok && s1.ok && s2.ok} unfold let get :st state = fun s -> s, s unfold let set (s:state) :st unit = fun _ -> (), s unfold let fail :st unit = fun s -> (), {s with ok=false} unfold let check (valid: state -> bool) : st unit = let* s = get in if valid s then return () else fail unfold let run (f:st unit) (s:state) : state = snd (f s)

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

r: Vale.PPC64LE.Machine_s.reg -> v: Vale.Def.Types_s.nat64 -> Vale.PPC64LE.Semantics_s.st Prims.unit

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.reg", "Vale.Def.Types_s.nat64", "Vale.PPC64LE.Semantics_s.op_let_Star", "Vale.PPC64LE.Machine_s.state", "Prims.unit", "Vale.PPC64LE.Semantics_s.get", "Vale.PPC64LE.Semantics_s.set", "Vale.PPC64LE.Semantics_s.update_reg'", "Vale.PPC64LE.Semantics_s.st" ]

[]

false

true

false

let update_reg (r: reg) (v: nat64) : st unit =

let* s = get in set (update_reg' r v s)

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.check

val check (valid: (state -> bool)) : st unit

let check (valid: state -> bool) : st unit = let* s = get in if valid s then return () else fail

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 8, "end_line": 405, "start_col": 0, "start_line": 400 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state unfold let return (#a:Type) (x:a) :st a = fun s -> x, s unfold let (let*) (#a:Type) (#b:Type) (m:st a) (f:a -> st b) :st b = fun s0 -> let x, s1 = m s0 in let y, s2 = f x s1 in y, {s2 with ok=s0.ok && s1.ok && s2.ok} unfold let get :st state = fun s -> s, s unfold let set (s:state) :st unit = fun _ -> (), s unfold let fail :st unit = fun s -> (), {s with ok=false}

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

valid: (_: Vale.PPC64LE.Machine_s.state -> Prims.bool) -> Vale.PPC64LE.Semantics_s.st Prims.unit

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.state", "Prims.bool", "Vale.PPC64LE.Semantics_s.op_let_Star", "Prims.unit", "Vale.PPC64LE.Semantics_s.get", "Vale.PPC64LE.Semantics_s.return", "Vale.PPC64LE.Semantics_s.fail", "Vale.PPC64LE.Semantics_s.st" ]

[]

false

true

false

let check (valid: (state -> bool)) : st unit =

let* s = get in if valid s then return () else fail

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.update_reg'

val update_reg' (r: reg) (v: nat64) (s: state) : state

let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') }

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 79, "end_line": 307, "start_col": 0, "start_line": 306 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

r: Vale.PPC64LE.Machine_s.reg -> v: Vale.Def.Types_s.nat64 -> s: Vale.PPC64LE.Machine_s.state -> Vale.PPC64LE.Machine_s.state

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.reg", "Vale.Def.Types_s.nat64", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Machine_s.Mkstate", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ok", "Vale.PPC64LE.Machine_s.regs_make", "Prims.op_Equality", "Prims.bool", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__regs", "Vale.PPC64LE.Machine_s.nat64", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__vecs", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__cr0", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__xer", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_heap", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stack", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stackTaint" ]

[]

false

true

false

let update_reg' (r: reg) (v: nat64) (s: state) : state =

{ s with regs = regs_make (fun (r': reg) -> if r' = r then v else s.regs r') }

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.update_xer

val update_xer (new_xer: xer_t) : st unit

let update_xer (new_xer:xer_t) :st unit = let* s = get in set ( { s with xer = new_xer } )

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 34, "end_line": 420, "start_col": 0, "start_line": 418 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state unfold let return (#a:Type) (x:a) :st a = fun s -> x, s unfold let (let*) (#a:Type) (#b:Type) (m:st a) (f:a -> st b) :st b = fun s0 -> let x, s1 = m s0 in let y, s2 = f x s1 in y, {s2 with ok=s0.ok && s1.ok && s2.ok} unfold let get :st state = fun s -> s, s unfold let set (s:state) :st unit = fun _ -> (), s unfold let fail :st unit = fun s -> (), {s with ok=false} unfold let check (valid: state -> bool) : st unit = let* s = get in if valid s then return () else fail unfold let run (f:st unit) (s:state) : state = snd (f s) let update_reg (r:reg) (v:nat64) :st unit = let* s = get in set (update_reg' r v s) let update_vec (vr:vec) (v:quad32) :st unit = let* s = get in set (update_vec' vr v s)

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

new_xer: Vale.PPC64LE.Machine_s.xer_t -> Vale.PPC64LE.Semantics_s.st Prims.unit

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.xer_t", "Vale.PPC64LE.Semantics_s.op_let_Star", "Vale.PPC64LE.Machine_s.state", "Prims.unit", "Vale.PPC64LE.Semantics_s.get", "Vale.PPC64LE.Semantics_s.set", "Vale.PPC64LE.Machine_s.Mkstate", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ok", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__regs", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__vecs", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__cr0", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_heap", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stack", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stackTaint", "Vale.PPC64LE.Semantics_s.st" ]

[]

false

true

false

let update_xer (new_xer: xer_t) : st unit =

let* s = get in set ({ s with xer = new_xer })

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.free_stack

val free_stack (start finish: int) : st unit

let free_stack (start finish:int) : st unit = let* s = get in set ( { s with ms_stack = free_stack' start finish s.ms_stack} )

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 66, "end_line": 436, "start_col": 0, "start_line": 434 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state unfold let return (#a:Type) (x:a) :st a = fun s -> x, s unfold let (let*) (#a:Type) (#b:Type) (m:st a) (f:a -> st b) :st b = fun s0 -> let x, s1 = m s0 in let y, s2 = f x s1 in y, {s2 with ok=s0.ok && s1.ok && s2.ok} unfold let get :st state = fun s -> s, s unfold let set (s:state) :st unit = fun _ -> (), s unfold let fail :st unit = fun s -> (), {s with ok=false} unfold let check (valid: state -> bool) : st unit = let* s = get in if valid s then return () else fail unfold let run (f:st unit) (s:state) : state = snd (f s) let update_reg (r:reg) (v:nat64) :st unit = let* s = get in set (update_reg' r v s) let update_vec (vr:vec) (v:quad32) :st unit = let* s = get in set (update_vec' vr v s) let update_xer (new_xer:xer_t) :st unit = let* s = get in set ( { s with xer = new_xer } ) let update_cr0 (new_cr0:cr0_t) :st unit = let* s = get in set ( { s with cr0 = new_cr0 } ) unfold let update_r1 (i:int) : st unit = // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page check (fun s -> i >= s.ms_stack.initial_r1 - 65536);* check (fun s -> i <= s.ms_stack.initial_r1);* let* s = get in set (update_r1' i s)

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

start: Prims.int -> finish: Prims.int -> Vale.PPC64LE.Semantics_s.st Prims.unit

Prims.Tot

[ "total" ]

[]

[ "Prims.int", "Vale.PPC64LE.Semantics_s.op_let_Star", "Vale.PPC64LE.Machine_s.state", "Prims.unit", "Vale.PPC64LE.Semantics_s.get", "Vale.PPC64LE.Semantics_s.set", "Vale.PPC64LE.Machine_s.Mkstate", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ok", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__regs", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__vecs", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__cr0", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__xer", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_heap", "Vale.PPC64LE.Semantics_s.free_stack'", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stack", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stackTaint", "Vale.PPC64LE.Semantics_s.st" ]

[]

false

true

false

let free_stack (start finish: int) : st unit =

let* s = get in set ({ s with ms_stack = free_stack' start finish s.ms_stack })

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.update_r1

val update_r1 (i: int) : st unit

let update_r1 (i:int) : st unit = // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page check (fun s -> i >= s.ms_stack.initial_r1 - 65536);* check (fun s -> i <= s.ms_stack.initial_r1);* let* s = get in set (update_r1' i s)

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 21, "end_line": 432, "start_col": 0, "start_line": 427 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state unfold let return (#a:Type) (x:a) :st a = fun s -> x, s unfold let (let*) (#a:Type) (#b:Type) (m:st a) (f:a -> st b) :st b = fun s0 -> let x, s1 = m s0 in let y, s2 = f x s1 in y, {s2 with ok=s0.ok && s1.ok && s2.ok} unfold let get :st state = fun s -> s, s unfold let set (s:state) :st unit = fun _ -> (), s unfold let fail :st unit = fun s -> (), {s with ok=false} unfold let check (valid: state -> bool) : st unit = let* s = get in if valid s then return () else fail unfold let run (f:st unit) (s:state) : state = snd (f s) let update_reg (r:reg) (v:nat64) :st unit = let* s = get in set (update_reg' r v s) let update_vec (vr:vec) (v:quad32) :st unit = let* s = get in set (update_vec' vr v s) let update_xer (new_xer:xer_t) :st unit = let* s = get in set ( { s with xer = new_xer } ) let update_cr0 (new_cr0:cr0_t) :st unit = let* s = get in set ( { s with cr0 = new_cr0 } )

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

i: Prims.int -> Vale.PPC64LE.Semantics_s.st Prims.unit

Prims.Tot

[ "total" ]

[]

[ "Prims.int", "Vale.PPC64LE.Semantics_s.op_let_Star", "Prims.unit", "Vale.PPC64LE.Semantics_s.check", "Vale.PPC64LE.Machine_s.state", "Prims.op_GreaterThanOrEqual", "Prims.op_Subtraction", "Vale.PPC64LE.Machine_s.__proj__Machine_stack__item__initial_r1", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stack", "Prims.bool", "Prims.op_LessThanOrEqual", "Vale.PPC64LE.Semantics_s.get", "Vale.PPC64LE.Semantics_s.set", "Vale.PPC64LE.Semantics_s.update_r1'", "Vale.PPC64LE.Semantics_s.st" ]

[]

false

true

false

let update_r1 (i: int) : st unit =

let* _ = check (fun s -> i >= s.ms_stack.initial_r1 - 65536) in let* _ = check (fun s -> i <= s.ms_stack.initial_r1) in let* s = get in set (update_r1' i s)

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.update_cr0

val update_cr0 (new_cr0: cr0_t) : st unit

let update_cr0 (new_cr0:cr0_t) :st unit = let* s = get in set ( { s with cr0 = new_cr0 } )

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 34, "end_line": 424, "start_col": 0, "start_line": 422 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state unfold let return (#a:Type) (x:a) :st a = fun s -> x, s unfold let (let*) (#a:Type) (#b:Type) (m:st a) (f:a -> st b) :st b = fun s0 -> let x, s1 = m s0 in let y, s2 = f x s1 in y, {s2 with ok=s0.ok && s1.ok && s2.ok} unfold let get :st state = fun s -> s, s unfold let set (s:state) :st unit = fun _ -> (), s unfold let fail :st unit = fun s -> (), {s with ok=false} unfold let check (valid: state -> bool) : st unit = let* s = get in if valid s then return () else fail unfold let run (f:st unit) (s:state) : state = snd (f s) let update_reg (r:reg) (v:nat64) :st unit = let* s = get in set (update_reg' r v s) let update_vec (vr:vec) (v:quad32) :st unit = let* s = get in set (update_vec' vr v s) let update_xer (new_xer:xer_t) :st unit = let* s = get in set ( { s with xer = new_xer } )

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

new_cr0: Vale.PPC64LE.Machine_s.cr0_t -> Vale.PPC64LE.Semantics_s.st Prims.unit

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.cr0_t", "Vale.PPC64LE.Semantics_s.op_let_Star", "Vale.PPC64LE.Machine_s.state", "Prims.unit", "Vale.PPC64LE.Semantics_s.get", "Vale.PPC64LE.Semantics_s.set", "Vale.PPC64LE.Machine_s.Mkstate", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ok", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__regs", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__vecs", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__xer", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_heap", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stack", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stackTaint", "Vale.PPC64LE.Semantics_s.st" ]

[]

false

true

false

let update_cr0 (new_cr0: cr0_t) : st unit =

let* s = get in set ({ s with cr0 = new_cr0 })

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.update_vec'

val update_vec' (vr: vec) (v: quad32) (s: state) : state

let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') }

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 83, "end_line": 310, "start_col": 0, "start_line": 309 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') }

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

vr: Vale.PPC64LE.Machine_s.vec -> v: Vale.Def.Types_s.quad32 -> s: Vale.PPC64LE.Machine_s.state -> Vale.PPC64LE.Machine_s.state

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.vec", "Vale.Def.Types_s.quad32", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Machine_s.Mkstate", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ok", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__regs", "Vale.PPC64LE.Machine_s.vecs_make", "Prims.op_Equality", "Prims.bool", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__vecs", "Vale.PPC64LE.Machine_s.quad32", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__cr0", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__xer", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_heap", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stack", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stackTaint" ]

[]

false

true

false

let update_vec' (vr: vec) (v: quad32) (s: state) : state =

{ s with vecs = vecs_make (fun (vr': vec) -> if vr' = vr then v else s.vecs vr') }

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.update_xer_ov

val update_xer_ov (xer: xer_t) (new_xer_ov: bool) : (new_xer: xer_t{xer_ov new_xer == new_xer_ov})

let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov }

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 30, "end_line": 368, "start_col": 0, "start_line": 367 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

xer: Vale.PPC64LE.Machine_s.xer_t -> new_xer_ov: Prims.bool -> new_xer: Vale.PPC64LE.Machine_s.xer_t{Vale.PPC64LE.Semantics_s.xer_ov new_xer == new_xer_ov}

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.xer_t", "Prims.bool", "Vale.PPC64LE.Machine_s.Mkxer_t", "Vale.PPC64LE.Machine_s.__proj__Mkxer_t__item__ca", "Prims.eq2", "Vale.PPC64LE.Semantics_s.xer_ov" ]

[]

false

let update_xer_ov (xer: xer_t) (new_xer_ov: bool) : (new_xer: xer_t{xer_ov new_xer == new_xer_ov}) =

{ xer with ov = new_xer_ov }

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.run_ocmp

val run_ocmp (s: state) (c: ocmp) : state & bool

let run_ocmp (s:state) (c:ocmp) : state & bool = let s = run (check (valid_ocmp c)) s in ({s with cr0 = eval_cmp_cr0 s c}, eval_ocmp s c)

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 50, "end_line": 813, "start_col": 0, "start_line": 811 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state unfold let return (#a:Type) (x:a) :st a = fun s -> x, s unfold let (let*) (#a:Type) (#b:Type) (m:st a) (f:a -> st b) :st b = fun s0 -> let x, s1 = m s0 in let y, s2 = f x s1 in y, {s2 with ok=s0.ok && s1.ok && s2.ok} unfold let get :st state = fun s -> s, s unfold let set (s:state) :st unit = fun _ -> (), s unfold let fail :st unit = fun s -> (), {s with ok=false} unfold let check (valid: state -> bool) : st unit = let* s = get in if valid s then return () else fail unfold let run (f:st unit) (s:state) : state = snd (f s) let update_reg (r:reg) (v:nat64) :st unit = let* s = get in set (update_reg' r v s) let update_vec (vr:vec) (v:quad32) :st unit = let* s = get in set (update_vec' vr v s) let update_xer (new_xer:xer_t) :st unit = let* s = get in set ( { s with xer = new_xer } ) let update_cr0 (new_cr0:cr0_t) :st unit = let* s = get in set ( { s with cr0 = new_cr0 } ) unfold let update_r1 (i:int) : st unit = // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page check (fun s -> i >= s.ms_stack.initial_r1 - 65536);* check (fun s -> i <= s.ms_stack.initial_r1);* let* s = get in set (update_r1' i s) let free_stack (start finish:int) : st unit = let* s = get in set ( { s with ms_stack = free_stack' start finish s.ms_stack} ) // Core definition of instruction semantics let eval_ins (ins:ins) : st unit = let* s = get in match ins with | Move dst src -> update_reg dst (eval_reg src s) | Load64 dst base offset -> check (fun s -> valid_maddr_offset64 offset);* check (valid_mem64 base offset);* update_reg dst (eval_mem (eval_reg base s + offset) s) | Store64 src base offset -> check (fun s -> valid_maddr_offset64 offset);* check (valid_mem64 base offset);* set (update_mem (eval_reg base s + offset) (eval_reg src s) s) | LoadImm64 dst src -> update_reg dst (src % pow2_64) | LoadImmShl64 dst src -> update_reg dst (ishl64 (src % pow2_64) 16) | AddLa dst src1 src2 -> update_reg dst ((eval_reg src1 s + src2) % pow2_64) | Add dst src1 src2 -> update_reg dst ((eval_reg src1 s + eval_reg src2 s) % pow2_64) | AddImm dst src1 src2 -> update_reg dst ((eval_reg src1 s + int_to_nat64 src2) % pow2_64) | AddCarry dst src1 src2 -> let sum = (eval_reg src1 s) + (eval_reg src2 s) in let new_carry = sum >= pow2_64 in update_reg dst (sum % pow2_64);* update_xer (update_xer_ca s.xer new_carry) | AddExtended dst src1 src2 -> let old_carry = if xer_ca(s.xer) then 1 else 0 in let sum = (eval_reg src1 s) + (eval_reg src2 s) + old_carry in let new_carry = sum >= pow2_64 in update_reg dst (sum % pow2_64);* update_xer (update_xer_ca s.xer new_carry) | AddExtendedOV dst src1 src2 -> let old_carry = if xer_ov(s.xer) then 1 else 0 in let sum = (eval_reg src1 s) + (eval_reg src2 s) + old_carry in let new_carry = sum >= pow2_64 in update_reg dst (sum % pow2_64);* update_xer (update_xer_ov s.xer new_carry) | Sub dst src1 src2 -> update_reg dst ((eval_reg src1 s - eval_reg src2 s) % pow2_64) | SubImm dst src1 src2 -> update_reg dst ((eval_reg src1 s - int_to_nat64 src2) % pow2_64) | MulLow64 dst src1 src2 -> update_reg dst ((eval_reg src1 s * eval_reg src2 s) % pow2_64) | MulHigh64U dst src1 src2 -> update_reg dst (FStar.UInt.mul_div #64 (eval_reg src1 s) (eval_reg src2 s)) | Xor dst src1 src2 -> update_reg dst (ixor (eval_reg src1 s) (eval_reg src2 s)) | And dst src1 src2 -> update_reg dst (iand (eval_reg src1 s) (eval_reg src2 s)) | Sr64Imm dst src1 src2 -> update_reg dst (ishr (eval_reg src1 s) src2) | Sl64Imm dst src1 src2 -> update_reg dst (ishl (eval_reg src1 s) src2) | Sr64 dst src1 src2 -> update_reg dst (ishr (eval_reg src1 s) ((eval_reg src2 s) % 64)) | Sl64 dst src1 src2 -> update_reg dst (ishl (eval_reg src1 s) ((eval_reg src2 s) % 64)) | Vmr dst src -> update_vec dst (eval_vec src s) | Mfvsrd dst src -> let src_q = eval_vec src s in let src_two = four_to_two_two src_q in let extracted_nat64 = two_to_nat 32 (two_select src_two 1) in update_reg dst extracted_nat64 | Mfvsrld dst src -> let src_q = eval_vec src s in let src_two = four_to_two_two src_q in let extracted_nat64 = two_to_nat 32 (two_select src_two 0) in update_reg dst extracted_nat64 | Mtvsrdd dst src1 src2 -> let val_src1 = eval_reg src1 s in let val_src2 = eval_reg src2 s in update_vec dst (Mkfour (val_src2 % pow2_32) (val_src2 / pow2_32) (val_src1 % pow2_32) (val_src1 / pow2_32)) | Mtvsrws dst src -> let val_src = eval_reg src s in update_vec dst (Mkfour (val_src % pow2_32) (val_src % pow2_32) (val_src % pow2_32) (val_src % pow2_32)) | Vadduwm dst src1 src2 -> update_vec dst (add_wrap_quad32 (eval_vec src1 s) (eval_vec src2 s)) | Vxor dst src1 src2 -> update_vec dst (quad32_xor (eval_vec src1 s) (eval_vec src2 s)) | Vand dst src1 src2 -> update_vec dst (four_map2 (fun di si -> iand di si) (eval_vec src1 s) (eval_vec src2 s)) | Vslw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour (ishl src1_q.lo0 (src2_q.lo0 % 32)) (ishl src1_q.lo1 (src2_q.lo1 % 32)) (ishl src1_q.hi2 (src2_q.hi2 % 32)) (ishl src1_q.hi3 (src2_q.hi3 % 32))) | Vsrw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour (ishr src1_q.lo0 (src2_q.lo0 % 32)) (ishr src1_q.lo1 (src2_q.lo1 % 32)) (ishr src1_q.hi2 (src2_q.hi2 % 32)) (ishr src1_q.hi3 (src2_q.hi3 % 32))) | Vsl dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let sh = (index (nat32_to_be_bytes src2_q.lo0) 3) % 8 in let chk (v:nat32) (sh:nat8):bool = (let bytes = nat32_to_be_bytes v in sh = (index bytes 3) % 8 && sh = (index bytes 2) % 8 && sh = (index bytes 1) % 8 && sh = (index bytes 0) % 8) in check (fun s -> chk src2_q.lo0 sh);* check (fun s -> chk src2_q.lo1 sh);* check (fun s -> chk src2_q.hi2 sh);* check (fun s -> chk src2_q.hi3 sh);* let l = four_map (fun (i:nat32) -> ishl i sh) src1_q in let r = four_map (fun (i:nat32) -> ishr i (32 - sh)) src1_q in let Mkfour r0 r1 r2 r3 = r in update_vec dst (quad32_xor l (Mkfour 0 r0 r1 r2)) | Vcmpequw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let eq_result (b:bool):nat32 = if b then 0xFFFFFFFF else 0 in let eq_val = Mkfour (eq_result (src1_q.lo0 = src2_q.lo0)) (eq_result (src1_q.lo1 = src2_q.lo1)) (eq_result (src1_q.hi2 = src2_q.hi2)) (eq_result (src1_q.hi3 = src2_q.hi3)) in update_vec dst eq_val | Vsldoi dst src1 src2 count -> check (fun s -> (count = 4 || count = 8 || count = 12));* // We only spec the one very special case we need let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in if count = 4 then update_vec dst (Mkfour src2_q.hi3 src1_q.lo0 src1_q.lo1 src1_q.hi2) else if count = 8 then update_vec dst (Mkfour src2_q.hi2 src2_q.hi3 src1_q.lo0 src1_q.lo1) else if count = 12 then update_vec dst (Mkfour src2_q.lo1 src2_q.hi2 src2_q.hi3 src1_q.lo0) else fail | Vmrghw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour src2_q.lo1 src1_q.lo1 src2_q.hi3 src1_q.hi3) | Xxmrghd dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour src2_q.hi2 src2_q.hi3 src1_q.hi2 src1_q.hi3) | Vsel dst src1 src2 sel -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let sel_q = eval_vec sel s in update_vec dst (Mkfour (isel32 src2_q.lo0 src1_q.lo0 sel_q.lo0) (isel32 src2_q.lo1 src1_q.lo1 sel_q.lo1) (isel32 src2_q.hi2 src1_q.hi2 sel_q.hi2) (isel32 src2_q.hi3 src1_q.hi3 sel_q.hi3)) | Vspltw dst src uim -> let src_q = eval_vec src s in if uim = 0 then update_vec dst (Mkfour src_q.hi3 src_q.hi3 src_q.hi3 src_q.hi3) else if uim = 1 then update_vec dst (Mkfour src_q.hi2 src_q.hi2 src_q.hi2 src_q.hi2) else if uim = 2 then update_vec dst (Mkfour src_q.lo1 src_q.lo1 src_q.lo1 src_q.lo1) else update_vec dst (Mkfour src_q.lo0 src_q.lo0 src_q.lo0 src_q.lo0) | Vspltisw dst src -> let src_nat32 = int_to_nat32 src in update_vec dst (Mkfour src_nat32 src_nat32 src_nat32 src_nat32) | Vspltisb dst src -> let src_nat8 = int_to_nat8 src in let src_nat32 = be_bytes_to_nat32 (four_to_seq_BE (Mkfour src_nat8 src_nat8 src_nat8 src_nat8)) in update_vec dst (Mkfour src_nat32 src_nat32 src_nat32 src_nat32) | Load128 dst base offset -> check (valid_mem128 base offset);* update_vec dst (eval_mem128 (eval_reg base s + eval_reg offset s) s) | Store128 src base offset -> check (valid_mem128 base offset);* set (update_mem128 (eval_reg base s + eval_reg offset s) (eval_vec src s) s) | Load128Word4 dst base -> check (valid_mem128_reg base);* let src_q = eval_mem128 (eval_reg base s) s in update_vec dst (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) | Load128Word4Index dst base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* let src_q = eval_mem128 (eval_reg base s + eval_reg offset s) s in update_vec dst (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) | Store128Word4 src base -> check (valid_mem128_reg base);* let src_q = eval_vec src s in set (update_mem128 (eval_reg base s) (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) s) | Store128Word4Index src base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* let src_q = eval_vec src s in set (update_mem128 (eval_reg base s + eval_reg offset s) (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) s) | Load128Byte16 dst base -> check (valid_mem128_reg base);* update_vec dst (reverse_bytes_quad32 (eval_mem128 (eval_reg base s) s)) | Load128Byte16Index dst base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* update_vec dst (reverse_bytes_quad32 (eval_mem128 (eval_reg base s + eval_reg offset s) s)) | Store128Byte16 src base -> check (valid_mem128_reg base);* set (update_mem128 (eval_reg base s) (reverse_bytes_quad32 (eval_vec src s)) s) | Store128Byte16Index src base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* set (update_mem128 (eval_reg base s + eval_reg offset s) (reverse_bytes_quad32 (eval_vec src s)) s) | Vshasigmaw0 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_0_0 src_q.lo0) (sigma256_0_0 src_q.lo1) (sigma256_0_0 src_q.hi2) (sigma256_0_0 src_q.hi3)) | Vshasigmaw1 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_0_1 src_q.lo0) (sigma256_0_1 src_q.lo1) (sigma256_0_1 src_q.hi2) (sigma256_0_1 src_q.hi3)) | Vshasigmaw2 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_1_0 src_q.lo0) (sigma256_1_0 src_q.lo1) (sigma256_1_0 src_q.hi2) (sigma256_1_0 src_q.hi3)) | Vshasigmaw3 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_1_1 src_q.lo0) (sigma256_1_1 src_q.lo1) (sigma256_1_1 src_q.hi2) (sigma256_1_1 src_q.hi3)) | Vsbox dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (Vale.AES.AES_BE_s.sub_word src_q.lo0) (Vale.AES.AES_BE_s.sub_word src_q.lo1) (Vale.AES.AES_BE_s.sub_word src_q.hi2) (Vale.AES.AES_BE_s.sub_word src_q.hi3)) | RotWord dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in check (fun s -> (src2_q.lo0 = 8 && src2_q.lo1 = 8 && src2_q.hi2 = 8 && src2_q.hi3 = 8));* update_vec dst (Mkfour (Vale.AES.AES_BE_s.rot_word src1_q.lo0) (Vale.AES.AES_BE_s.rot_word src1_q.lo1) (Vale.AES.AES_BE_s.rot_word src1_q.hi2) (Vale.AES.AES_BE_s.rot_word src1_q.hi3)) | Vcipher dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_BE_s.sub_bytes (eval_vec src1 s)))) (eval_vec src2 s)) | Vcipherlast dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_BE_s.sub_bytes (eval_vec src1 s))) (eval_vec src2 s)) | Vncipher dst src1 src2 -> update_vec dst (Vale.AES.AES_BE_s.inv_mix_columns (quad32_xor (Vale.AES.AES_BE_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (eval_vec src1 s))) (eval_vec src2 s))) | Vncipherlast dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (eval_vec src1 s))) (eval_vec src2 s)) | Vpmsumd dst src1 src2 -> let Mkfour a0 a1 a2 a3 = eval_vec src1 s in let Mkfour b0 b1 b2 b3 = eval_vec src2 s in let x0 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo a0 a1) in let x1 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo a2 a3) in let y0 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo b0 b1) in let y1 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo b2 b3) in let sum = Vale.Math.Poly2_s.add (Vale.Math.Poly2_s.mul x0 y0) (Vale.Math.Poly2_s.mul x1 y1) in update_vec dst (Vale.Math.Poly2.Bits_s.to_quad32 sum) | Alloc n -> check (fun s -> n % 16 = 0);* update_r1 (eval_reg 1 s - n) | Dealloc n -> let old_r1 = eval_reg 1 s in let new_r1 = old_r1 + n in update_r1 new_r1;* // The deallocated stack memory should now be considered invalid free_stack old_r1 new_r1 | StoreStack128 src t offset -> check (fun s -> valid_maddr_offset128 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos <= s.ms_stack.initial_r1 - 16);* set (update_stack128_and_taint r1_pos (eval_vec src s) s t) | LoadStack128 dst t offset -> check (fun s -> valid_maddr_offset128 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos + 16 <= s.ms_stack.initial_r1);* check (fun s -> valid_src_stack128_and_taint r1_pos s t);* update_vec dst (eval_stack128 r1_pos s.ms_stack) | StoreStack64 src t offset -> check (fun s -> valid_maddr_offset64 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos <= s.ms_stack.initial_r1 - 8);* set (update_stack_and_taint r1_pos (eval_reg src s) s t) | LoadStack64 dst t offset -> check (fun s -> valid_maddr_offset64 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos + 8 <= s.ms_stack.initial_r1);* check (fun s -> valid_src_stack64_and_taint r1_pos s t);* update_reg dst (eval_stack r1_pos s.ms_stack) | Ghost _ -> set s

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

s: Vale.PPC64LE.Machine_s.state -> c: Vale.PPC64LE.Semantics_s.ocmp -> Vale.PPC64LE.Machine_s.state * Prims.bool

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Semantics_s.ocmp", "FStar.Pervasives.Native.Mktuple2", "Prims.bool", "Vale.PPC64LE.Machine_s.Mkstate", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ok", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__regs", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__vecs", "Vale.PPC64LE.Semantics_s.eval_cmp_cr0", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__xer", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_heap", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stack", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stackTaint", "Vale.PPC64LE.Semantics_s.eval_ocmp", "Vale.PPC64LE.Semantics_s.run", "Vale.PPC64LE.Semantics_s.check", "Vale.PPC64LE.Semantics_s.valid_ocmp", "FStar.Pervasives.Native.tuple2" ]

[]

false

true

false

let run_ocmp (s: state) (c: ocmp) : state & bool =

let s = run (check (valid_ocmp c)) s in ({ s with cr0 = eval_cmp_cr0 s c }, eval_ocmp s c)

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.valid_ocmp

val valid_ocmp (c: ocmp) (s: state) : bool

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 38, "end_line": 359, "start_col": 0, "start_line": 352 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

c: Vale.PPC64LE.Semantics_s.ocmp -> s: Vale.PPC64LE.Machine_s.state -> Prims.bool

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Semantics_s.ocmp", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Machine_s.cmp_opr", "Vale.PPC64LE.Machine_s.valid_first_cmp_opr", "Prims.bool" ]

[]

false

true

false

let valid_ocmp (c: ocmp) (s: state) : bool =

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.update_xer_ca

val update_xer_ca (xer: xer_t) (new_xer_ca: bool) : (new_xer: xer_t{xer_ca new_xer == new_xer_ca})

let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca }

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 30, "end_line": 371, "start_col": 0, "start_line": 370 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov }

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

xer: Vale.PPC64LE.Machine_s.xer_t -> new_xer_ca: Prims.bool -> new_xer: Vale.PPC64LE.Machine_s.xer_t{Vale.PPC64LE.Semantics_s.xer_ca new_xer == new_xer_ca}

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Machine_s.xer_t", "Prims.bool", "Vale.PPC64LE.Machine_s.Mkxer_t", "Vale.PPC64LE.Machine_s.__proj__Mkxer_t__item__ov", "Prims.eq2", "Vale.PPC64LE.Semantics_s.xer_ca" ]

[]

false

let update_xer_ca (xer: xer_t) (new_xer_ca: bool) : (new_xer: xer_t{xer_ca new_xer == new_xer_ca}) =

{ xer with ca = new_xer_ca }

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.eval_while

val eval_while (cond: ocmp) (c: code) (fuel: nat) (s0: state) : Tot (option state) (decreases %[fuel;c])

let rec eval_code (c:code) (fuel:nat) (s:state) : Tot (option state) (decreases %[fuel; c]) = match c with | Ins ins -> Some (run (eval_ins ins) s) | Block l -> eval_codes l fuel s | IfElse cond ifTrue ifFalse -> let (s, b) = run_ocmp s cond in if b then eval_code ifTrue fuel s else eval_code ifFalse fuel s | While b c -> eval_while b c fuel s and eval_codes (l:codes) (fuel:nat) (s:state) : Tot (option state) (decreases %[fuel; l]) = match l with | [] -> Some s | c::tl -> let s_opt = eval_code c fuel s in if None? s_opt then None else eval_codes tl fuel (Some?.v s_opt) and eval_while (cond:ocmp) (c:code) (fuel:nat) (s0:state) : Tot (option state) (decreases %[fuel; c]) = if fuel = 0 then None else let (s0, b) = run_ocmp s0 cond in if not b then Some s0 else match eval_code c (fuel - 1) s0 with | None -> None | Some s1 -> if s1.ok then eval_while cond c (fuel - 1) s1 // success: continue to next iteration else Some s1

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 18, "end_line": 845, "start_col": 0, "start_line": 819 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state unfold let return (#a:Type) (x:a) :st a = fun s -> x, s unfold let (let*) (#a:Type) (#b:Type) (m:st a) (f:a -> st b) :st b = fun s0 -> let x, s1 = m s0 in let y, s2 = f x s1 in y, {s2 with ok=s0.ok && s1.ok && s2.ok} unfold let get :st state = fun s -> s, s unfold let set (s:state) :st unit = fun _ -> (), s unfold let fail :st unit = fun s -> (), {s with ok=false} unfold let check (valid: state -> bool) : st unit = let* s = get in if valid s then return () else fail unfold let run (f:st unit) (s:state) : state = snd (f s) let update_reg (r:reg) (v:nat64) :st unit = let* s = get in set (update_reg' r v s) let update_vec (vr:vec) (v:quad32) :st unit = let* s = get in set (update_vec' vr v s) let update_xer (new_xer:xer_t) :st unit = let* s = get in set ( { s with xer = new_xer } ) let update_cr0 (new_cr0:cr0_t) :st unit = let* s = get in set ( { s with cr0 = new_cr0 } ) unfold let update_r1 (i:int) : st unit = // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page check (fun s -> i >= s.ms_stack.initial_r1 - 65536);* check (fun s -> i <= s.ms_stack.initial_r1);* let* s = get in set (update_r1' i s) let free_stack (start finish:int) : st unit = let* s = get in set ( { s with ms_stack = free_stack' start finish s.ms_stack} ) // Core definition of instruction semantics let eval_ins (ins:ins) : st unit = let* s = get in match ins with | Move dst src -> update_reg dst (eval_reg src s) | Load64 dst base offset -> check (fun s -> valid_maddr_offset64 offset);* check (valid_mem64 base offset);* update_reg dst (eval_mem (eval_reg base s + offset) s) | Store64 src base offset -> check (fun s -> valid_maddr_offset64 offset);* check (valid_mem64 base offset);* set (update_mem (eval_reg base s + offset) (eval_reg src s) s) | LoadImm64 dst src -> update_reg dst (src % pow2_64) | LoadImmShl64 dst src -> update_reg dst (ishl64 (src % pow2_64) 16) | AddLa dst src1 src2 -> update_reg dst ((eval_reg src1 s + src2) % pow2_64) | Add dst src1 src2 -> update_reg dst ((eval_reg src1 s + eval_reg src2 s) % pow2_64) | AddImm dst src1 src2 -> update_reg dst ((eval_reg src1 s + int_to_nat64 src2) % pow2_64) | AddCarry dst src1 src2 -> let sum = (eval_reg src1 s) + (eval_reg src2 s) in let new_carry = sum >= pow2_64 in update_reg dst (sum % pow2_64);* update_xer (update_xer_ca s.xer new_carry) | AddExtended dst src1 src2 -> let old_carry = if xer_ca(s.xer) then 1 else 0 in let sum = (eval_reg src1 s) + (eval_reg src2 s) + old_carry in let new_carry = sum >= pow2_64 in update_reg dst (sum % pow2_64);* update_xer (update_xer_ca s.xer new_carry) | AddExtendedOV dst src1 src2 -> let old_carry = if xer_ov(s.xer) then 1 else 0 in let sum = (eval_reg src1 s) + (eval_reg src2 s) + old_carry in let new_carry = sum >= pow2_64 in update_reg dst (sum % pow2_64);* update_xer (update_xer_ov s.xer new_carry) | Sub dst src1 src2 -> update_reg dst ((eval_reg src1 s - eval_reg src2 s) % pow2_64) | SubImm dst src1 src2 -> update_reg dst ((eval_reg src1 s - int_to_nat64 src2) % pow2_64) | MulLow64 dst src1 src2 -> update_reg dst ((eval_reg src1 s * eval_reg src2 s) % pow2_64) | MulHigh64U dst src1 src2 -> update_reg dst (FStar.UInt.mul_div #64 (eval_reg src1 s) (eval_reg src2 s)) | Xor dst src1 src2 -> update_reg dst (ixor (eval_reg src1 s) (eval_reg src2 s)) | And dst src1 src2 -> update_reg dst (iand (eval_reg src1 s) (eval_reg src2 s)) | Sr64Imm dst src1 src2 -> update_reg dst (ishr (eval_reg src1 s) src2) | Sl64Imm dst src1 src2 -> update_reg dst (ishl (eval_reg src1 s) src2) | Sr64 dst src1 src2 -> update_reg dst (ishr (eval_reg src1 s) ((eval_reg src2 s) % 64)) | Sl64 dst src1 src2 -> update_reg dst (ishl (eval_reg src1 s) ((eval_reg src2 s) % 64)) | Vmr dst src -> update_vec dst (eval_vec src s) | Mfvsrd dst src -> let src_q = eval_vec src s in let src_two = four_to_two_two src_q in let extracted_nat64 = two_to_nat 32 (two_select src_two 1) in update_reg dst extracted_nat64 | Mfvsrld dst src -> let src_q = eval_vec src s in let src_two = four_to_two_two src_q in let extracted_nat64 = two_to_nat 32 (two_select src_two 0) in update_reg dst extracted_nat64 | Mtvsrdd dst src1 src2 -> let val_src1 = eval_reg src1 s in let val_src2 = eval_reg src2 s in update_vec dst (Mkfour (val_src2 % pow2_32) (val_src2 / pow2_32) (val_src1 % pow2_32) (val_src1 / pow2_32)) | Mtvsrws dst src -> let val_src = eval_reg src s in update_vec dst (Mkfour (val_src % pow2_32) (val_src % pow2_32) (val_src % pow2_32) (val_src % pow2_32)) | Vadduwm dst src1 src2 -> update_vec dst (add_wrap_quad32 (eval_vec src1 s) (eval_vec src2 s)) | Vxor dst src1 src2 -> update_vec dst (quad32_xor (eval_vec src1 s) (eval_vec src2 s)) | Vand dst src1 src2 -> update_vec dst (four_map2 (fun di si -> iand di si) (eval_vec src1 s) (eval_vec src2 s)) | Vslw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour (ishl src1_q.lo0 (src2_q.lo0 % 32)) (ishl src1_q.lo1 (src2_q.lo1 % 32)) (ishl src1_q.hi2 (src2_q.hi2 % 32)) (ishl src1_q.hi3 (src2_q.hi3 % 32))) | Vsrw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour (ishr src1_q.lo0 (src2_q.lo0 % 32)) (ishr src1_q.lo1 (src2_q.lo1 % 32)) (ishr src1_q.hi2 (src2_q.hi2 % 32)) (ishr src1_q.hi3 (src2_q.hi3 % 32))) | Vsl dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let sh = (index (nat32_to_be_bytes src2_q.lo0) 3) % 8 in let chk (v:nat32) (sh:nat8):bool = (let bytes = nat32_to_be_bytes v in sh = (index bytes 3) % 8 && sh = (index bytes 2) % 8 && sh = (index bytes 1) % 8 && sh = (index bytes 0) % 8) in check (fun s -> chk src2_q.lo0 sh);* check (fun s -> chk src2_q.lo1 sh);* check (fun s -> chk src2_q.hi2 sh);* check (fun s -> chk src2_q.hi3 sh);* let l = four_map (fun (i:nat32) -> ishl i sh) src1_q in let r = four_map (fun (i:nat32) -> ishr i (32 - sh)) src1_q in let Mkfour r0 r1 r2 r3 = r in update_vec dst (quad32_xor l (Mkfour 0 r0 r1 r2)) | Vcmpequw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let eq_result (b:bool):nat32 = if b then 0xFFFFFFFF else 0 in let eq_val = Mkfour (eq_result (src1_q.lo0 = src2_q.lo0)) (eq_result (src1_q.lo1 = src2_q.lo1)) (eq_result (src1_q.hi2 = src2_q.hi2)) (eq_result (src1_q.hi3 = src2_q.hi3)) in update_vec dst eq_val | Vsldoi dst src1 src2 count -> check (fun s -> (count = 4 || count = 8 || count = 12));* // We only spec the one very special case we need let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in if count = 4 then update_vec dst (Mkfour src2_q.hi3 src1_q.lo0 src1_q.lo1 src1_q.hi2) else if count = 8 then update_vec dst (Mkfour src2_q.hi2 src2_q.hi3 src1_q.lo0 src1_q.lo1) else if count = 12 then update_vec dst (Mkfour src2_q.lo1 src2_q.hi2 src2_q.hi3 src1_q.lo0) else fail | Vmrghw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour src2_q.lo1 src1_q.lo1 src2_q.hi3 src1_q.hi3) | Xxmrghd dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour src2_q.hi2 src2_q.hi3 src1_q.hi2 src1_q.hi3) | Vsel dst src1 src2 sel -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let sel_q = eval_vec sel s in update_vec dst (Mkfour (isel32 src2_q.lo0 src1_q.lo0 sel_q.lo0) (isel32 src2_q.lo1 src1_q.lo1 sel_q.lo1) (isel32 src2_q.hi2 src1_q.hi2 sel_q.hi2) (isel32 src2_q.hi3 src1_q.hi3 sel_q.hi3)) | Vspltw dst src uim -> let src_q = eval_vec src s in if uim = 0 then update_vec dst (Mkfour src_q.hi3 src_q.hi3 src_q.hi3 src_q.hi3) else if uim = 1 then update_vec dst (Mkfour src_q.hi2 src_q.hi2 src_q.hi2 src_q.hi2) else if uim = 2 then update_vec dst (Mkfour src_q.lo1 src_q.lo1 src_q.lo1 src_q.lo1) else update_vec dst (Mkfour src_q.lo0 src_q.lo0 src_q.lo0 src_q.lo0) | Vspltisw dst src -> let src_nat32 = int_to_nat32 src in update_vec dst (Mkfour src_nat32 src_nat32 src_nat32 src_nat32) | Vspltisb dst src -> let src_nat8 = int_to_nat8 src in let src_nat32 = be_bytes_to_nat32 (four_to_seq_BE (Mkfour src_nat8 src_nat8 src_nat8 src_nat8)) in update_vec dst (Mkfour src_nat32 src_nat32 src_nat32 src_nat32) | Load128 dst base offset -> check (valid_mem128 base offset);* update_vec dst (eval_mem128 (eval_reg base s + eval_reg offset s) s) | Store128 src base offset -> check (valid_mem128 base offset);* set (update_mem128 (eval_reg base s + eval_reg offset s) (eval_vec src s) s) | Load128Word4 dst base -> check (valid_mem128_reg base);* let src_q = eval_mem128 (eval_reg base s) s in update_vec dst (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) | Load128Word4Index dst base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* let src_q = eval_mem128 (eval_reg base s + eval_reg offset s) s in update_vec dst (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) | Store128Word4 src base -> check (valid_mem128_reg base);* let src_q = eval_vec src s in set (update_mem128 (eval_reg base s) (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) s) | Store128Word4Index src base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* let src_q = eval_vec src s in set (update_mem128 (eval_reg base s + eval_reg offset s) (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) s) | Load128Byte16 dst base -> check (valid_mem128_reg base);* update_vec dst (reverse_bytes_quad32 (eval_mem128 (eval_reg base s) s)) | Load128Byte16Index dst base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* update_vec dst (reverse_bytes_quad32 (eval_mem128 (eval_reg base s + eval_reg offset s) s)) | Store128Byte16 src base -> check (valid_mem128_reg base);* set (update_mem128 (eval_reg base s) (reverse_bytes_quad32 (eval_vec src s)) s) | Store128Byte16Index src base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* set (update_mem128 (eval_reg base s + eval_reg offset s) (reverse_bytes_quad32 (eval_vec src s)) s) | Vshasigmaw0 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_0_0 src_q.lo0) (sigma256_0_0 src_q.lo1) (sigma256_0_0 src_q.hi2) (sigma256_0_0 src_q.hi3)) | Vshasigmaw1 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_0_1 src_q.lo0) (sigma256_0_1 src_q.lo1) (sigma256_0_1 src_q.hi2) (sigma256_0_1 src_q.hi3)) | Vshasigmaw2 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_1_0 src_q.lo0) (sigma256_1_0 src_q.lo1) (sigma256_1_0 src_q.hi2) (sigma256_1_0 src_q.hi3)) | Vshasigmaw3 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_1_1 src_q.lo0) (sigma256_1_1 src_q.lo1) (sigma256_1_1 src_q.hi2) (sigma256_1_1 src_q.hi3)) | Vsbox dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (Vale.AES.AES_BE_s.sub_word src_q.lo0) (Vale.AES.AES_BE_s.sub_word src_q.lo1) (Vale.AES.AES_BE_s.sub_word src_q.hi2) (Vale.AES.AES_BE_s.sub_word src_q.hi3)) | RotWord dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in check (fun s -> (src2_q.lo0 = 8 && src2_q.lo1 = 8 && src2_q.hi2 = 8 && src2_q.hi3 = 8));* update_vec dst (Mkfour (Vale.AES.AES_BE_s.rot_word src1_q.lo0) (Vale.AES.AES_BE_s.rot_word src1_q.lo1) (Vale.AES.AES_BE_s.rot_word src1_q.hi2) (Vale.AES.AES_BE_s.rot_word src1_q.hi3)) | Vcipher dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_BE_s.sub_bytes (eval_vec src1 s)))) (eval_vec src2 s)) | Vcipherlast dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_BE_s.sub_bytes (eval_vec src1 s))) (eval_vec src2 s)) | Vncipher dst src1 src2 -> update_vec dst (Vale.AES.AES_BE_s.inv_mix_columns (quad32_xor (Vale.AES.AES_BE_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (eval_vec src1 s))) (eval_vec src2 s))) | Vncipherlast dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (eval_vec src1 s))) (eval_vec src2 s)) | Vpmsumd dst src1 src2 -> let Mkfour a0 a1 a2 a3 = eval_vec src1 s in let Mkfour b0 b1 b2 b3 = eval_vec src2 s in let x0 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo a0 a1) in let x1 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo a2 a3) in let y0 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo b0 b1) in let y1 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo b2 b3) in let sum = Vale.Math.Poly2_s.add (Vale.Math.Poly2_s.mul x0 y0) (Vale.Math.Poly2_s.mul x1 y1) in update_vec dst (Vale.Math.Poly2.Bits_s.to_quad32 sum) | Alloc n -> check (fun s -> n % 16 = 0);* update_r1 (eval_reg 1 s - n) | Dealloc n -> let old_r1 = eval_reg 1 s in let new_r1 = old_r1 + n in update_r1 new_r1;* // The deallocated stack memory should now be considered invalid free_stack old_r1 new_r1 | StoreStack128 src t offset -> check (fun s -> valid_maddr_offset128 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos <= s.ms_stack.initial_r1 - 16);* set (update_stack128_and_taint r1_pos (eval_vec src s) s t) | LoadStack128 dst t offset -> check (fun s -> valid_maddr_offset128 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos + 16 <= s.ms_stack.initial_r1);* check (fun s -> valid_src_stack128_and_taint r1_pos s t);* update_vec dst (eval_stack128 r1_pos s.ms_stack) | StoreStack64 src t offset -> check (fun s -> valid_maddr_offset64 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos <= s.ms_stack.initial_r1 - 8);* set (update_stack_and_taint r1_pos (eval_reg src s) s t) | LoadStack64 dst t offset -> check (fun s -> valid_maddr_offset64 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos + 8 <= s.ms_stack.initial_r1);* check (fun s -> valid_src_stack64_and_taint r1_pos s t);* update_reg dst (eval_stack r1_pos s.ms_stack) | Ghost _ -> set s let run_ocmp (s:state) (c:ocmp) : state & bool = let s = run (check (valid_ocmp c)) s in ({s with cr0 = eval_cmp_cr0 s c}, eval_ocmp s c) (* * These functions return an option state * None case arises when the while loop runs out of fuel

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

cond: Vale.PPC64LE.Semantics_s.ocmp -> c: Vale.PPC64LE.Semantics_s.code -> fuel: Prims.nat -> s0: Vale.PPC64LE.Machine_s.state -> Prims.Tot (FStar.Pervasives.Native.option Vale.PPC64LE.Machine_s.state)

Prims.Tot

[ "total", "" ]

[ "eval_code", "eval_codes", "eval_while" ]

[ "Vale.PPC64LE.Semantics_s.ocmp", "Vale.PPC64LE.Semantics_s.code", "Prims.nat", "Vale.PPC64LE.Machine_s.state", "Prims.op_Equality", "Prims.int", "FStar.Pervasives.Native.None", "Prims.bool", "Prims.op_Negation", "FStar.Pervasives.Native.Some", "Vale.PPC64LE.Semantics_s.eval_code", "Prims.op_Subtraction", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ok", "Vale.PPC64LE.Semantics_s.eval_while", "FStar.Pervasives.Native.option", "FStar.Pervasives.Native.tuple2", "Vale.PPC64LE.Semantics_s.run_ocmp" ]

[ "mutual recursion" ]

false

true

false

let rec eval_while (cond: ocmp) (c: code) (fuel: nat) (s0: state) : Tot (option state) (decreases %[fuel;c]) =

if fuel = 0 then None else let s0, b = run_ocmp s0 cond in if not b then Some s0 else match eval_code c (fuel - 1) s0 with | None -> None | Some s1 -> if s1.ok then eval_while cond c (fuel - 1) s1 else Some s1

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.eval_ins

val eval_ins (ins: ins) : st unit

let eval_ins (ins:ins) : st unit = let* s = get in match ins with | Move dst src -> update_reg dst (eval_reg src s) | Load64 dst base offset -> check (fun s -> valid_maddr_offset64 offset);* check (valid_mem64 base offset);* update_reg dst (eval_mem (eval_reg base s + offset) s) | Store64 src base offset -> check (fun s -> valid_maddr_offset64 offset);* check (valid_mem64 base offset);* set (update_mem (eval_reg base s + offset) (eval_reg src s) s) | LoadImm64 dst src -> update_reg dst (src % pow2_64) | LoadImmShl64 dst src -> update_reg dst (ishl64 (src % pow2_64) 16) | AddLa dst src1 src2 -> update_reg dst ((eval_reg src1 s + src2) % pow2_64) | Add dst src1 src2 -> update_reg dst ((eval_reg src1 s + eval_reg src2 s) % pow2_64) | AddImm dst src1 src2 -> update_reg dst ((eval_reg src1 s + int_to_nat64 src2) % pow2_64) | AddCarry dst src1 src2 -> let sum = (eval_reg src1 s) + (eval_reg src2 s) in let new_carry = sum >= pow2_64 in update_reg dst (sum % pow2_64);* update_xer (update_xer_ca s.xer new_carry) | AddExtended dst src1 src2 -> let old_carry = if xer_ca(s.xer) then 1 else 0 in let sum = (eval_reg src1 s) + (eval_reg src2 s) + old_carry in let new_carry = sum >= pow2_64 in update_reg dst (sum % pow2_64);* update_xer (update_xer_ca s.xer new_carry) | AddExtendedOV dst src1 src2 -> let old_carry = if xer_ov(s.xer) then 1 else 0 in let sum = (eval_reg src1 s) + (eval_reg src2 s) + old_carry in let new_carry = sum >= pow2_64 in update_reg dst (sum % pow2_64);* update_xer (update_xer_ov s.xer new_carry) | Sub dst src1 src2 -> update_reg dst ((eval_reg src1 s - eval_reg src2 s) % pow2_64) | SubImm dst src1 src2 -> update_reg dst ((eval_reg src1 s - int_to_nat64 src2) % pow2_64) | MulLow64 dst src1 src2 -> update_reg dst ((eval_reg src1 s * eval_reg src2 s) % pow2_64) | MulHigh64U dst src1 src2 -> update_reg dst (FStar.UInt.mul_div #64 (eval_reg src1 s) (eval_reg src2 s)) | Xor dst src1 src2 -> update_reg dst (ixor (eval_reg src1 s) (eval_reg src2 s)) | And dst src1 src2 -> update_reg dst (iand (eval_reg src1 s) (eval_reg src2 s)) | Sr64Imm dst src1 src2 -> update_reg dst (ishr (eval_reg src1 s) src2) | Sl64Imm dst src1 src2 -> update_reg dst (ishl (eval_reg src1 s) src2) | Sr64 dst src1 src2 -> update_reg dst (ishr (eval_reg src1 s) ((eval_reg src2 s) % 64)) | Sl64 dst src1 src2 -> update_reg dst (ishl (eval_reg src1 s) ((eval_reg src2 s) % 64)) | Vmr dst src -> update_vec dst (eval_vec src s) | Mfvsrd dst src -> let src_q = eval_vec src s in let src_two = four_to_two_two src_q in let extracted_nat64 = two_to_nat 32 (two_select src_two 1) in update_reg dst extracted_nat64 | Mfvsrld dst src -> let src_q = eval_vec src s in let src_two = four_to_two_two src_q in let extracted_nat64 = two_to_nat 32 (two_select src_two 0) in update_reg dst extracted_nat64 | Mtvsrdd dst src1 src2 -> let val_src1 = eval_reg src1 s in let val_src2 = eval_reg src2 s in update_vec dst (Mkfour (val_src2 % pow2_32) (val_src2 / pow2_32) (val_src1 % pow2_32) (val_src1 / pow2_32)) | Mtvsrws dst src -> let val_src = eval_reg src s in update_vec dst (Mkfour (val_src % pow2_32) (val_src % pow2_32) (val_src % pow2_32) (val_src % pow2_32)) | Vadduwm dst src1 src2 -> update_vec dst (add_wrap_quad32 (eval_vec src1 s) (eval_vec src2 s)) | Vxor dst src1 src2 -> update_vec dst (quad32_xor (eval_vec src1 s) (eval_vec src2 s)) | Vand dst src1 src2 -> update_vec dst (four_map2 (fun di si -> iand di si) (eval_vec src1 s) (eval_vec src2 s)) | Vslw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour (ishl src1_q.lo0 (src2_q.lo0 % 32)) (ishl src1_q.lo1 (src2_q.lo1 % 32)) (ishl src1_q.hi2 (src2_q.hi2 % 32)) (ishl src1_q.hi3 (src2_q.hi3 % 32))) | Vsrw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour (ishr src1_q.lo0 (src2_q.lo0 % 32)) (ishr src1_q.lo1 (src2_q.lo1 % 32)) (ishr src1_q.hi2 (src2_q.hi2 % 32)) (ishr src1_q.hi3 (src2_q.hi3 % 32))) | Vsl dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let sh = (index (nat32_to_be_bytes src2_q.lo0) 3) % 8 in let chk (v:nat32) (sh:nat8):bool = (let bytes = nat32_to_be_bytes v in sh = (index bytes 3) % 8 && sh = (index bytes 2) % 8 && sh = (index bytes 1) % 8 && sh = (index bytes 0) % 8) in check (fun s -> chk src2_q.lo0 sh);* check (fun s -> chk src2_q.lo1 sh);* check (fun s -> chk src2_q.hi2 sh);* check (fun s -> chk src2_q.hi3 sh);* let l = four_map (fun (i:nat32) -> ishl i sh) src1_q in let r = four_map (fun (i:nat32) -> ishr i (32 - sh)) src1_q in let Mkfour r0 r1 r2 r3 = r in update_vec dst (quad32_xor l (Mkfour 0 r0 r1 r2)) | Vcmpequw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let eq_result (b:bool):nat32 = if b then 0xFFFFFFFF else 0 in let eq_val = Mkfour (eq_result (src1_q.lo0 = src2_q.lo0)) (eq_result (src1_q.lo1 = src2_q.lo1)) (eq_result (src1_q.hi2 = src2_q.hi2)) (eq_result (src1_q.hi3 = src2_q.hi3)) in update_vec dst eq_val | Vsldoi dst src1 src2 count -> check (fun s -> (count = 4 || count = 8 || count = 12));* // We only spec the one very special case we need let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in if count = 4 then update_vec dst (Mkfour src2_q.hi3 src1_q.lo0 src1_q.lo1 src1_q.hi2) else if count = 8 then update_vec dst (Mkfour src2_q.hi2 src2_q.hi3 src1_q.lo0 src1_q.lo1) else if count = 12 then update_vec dst (Mkfour src2_q.lo1 src2_q.hi2 src2_q.hi3 src1_q.lo0) else fail | Vmrghw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour src2_q.lo1 src1_q.lo1 src2_q.hi3 src1_q.hi3) | Xxmrghd dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour src2_q.hi2 src2_q.hi3 src1_q.hi2 src1_q.hi3) | Vsel dst src1 src2 sel -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let sel_q = eval_vec sel s in update_vec dst (Mkfour (isel32 src2_q.lo0 src1_q.lo0 sel_q.lo0) (isel32 src2_q.lo1 src1_q.lo1 sel_q.lo1) (isel32 src2_q.hi2 src1_q.hi2 sel_q.hi2) (isel32 src2_q.hi3 src1_q.hi3 sel_q.hi3)) | Vspltw dst src uim -> let src_q = eval_vec src s in if uim = 0 then update_vec dst (Mkfour src_q.hi3 src_q.hi3 src_q.hi3 src_q.hi3) else if uim = 1 then update_vec dst (Mkfour src_q.hi2 src_q.hi2 src_q.hi2 src_q.hi2) else if uim = 2 then update_vec dst (Mkfour src_q.lo1 src_q.lo1 src_q.lo1 src_q.lo1) else update_vec dst (Mkfour src_q.lo0 src_q.lo0 src_q.lo0 src_q.lo0) | Vspltisw dst src -> let src_nat32 = int_to_nat32 src in update_vec dst (Mkfour src_nat32 src_nat32 src_nat32 src_nat32) | Vspltisb dst src -> let src_nat8 = int_to_nat8 src in let src_nat32 = be_bytes_to_nat32 (four_to_seq_BE (Mkfour src_nat8 src_nat8 src_nat8 src_nat8)) in update_vec dst (Mkfour src_nat32 src_nat32 src_nat32 src_nat32) | Load128 dst base offset -> check (valid_mem128 base offset);* update_vec dst (eval_mem128 (eval_reg base s + eval_reg offset s) s) | Store128 src base offset -> check (valid_mem128 base offset);* set (update_mem128 (eval_reg base s + eval_reg offset s) (eval_vec src s) s) | Load128Word4 dst base -> check (valid_mem128_reg base);* let src_q = eval_mem128 (eval_reg base s) s in update_vec dst (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) | Load128Word4Index dst base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* let src_q = eval_mem128 (eval_reg base s + eval_reg offset s) s in update_vec dst (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) | Store128Word4 src base -> check (valid_mem128_reg base);* let src_q = eval_vec src s in set (update_mem128 (eval_reg base s) (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) s) | Store128Word4Index src base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* let src_q = eval_vec src s in set (update_mem128 (eval_reg base s + eval_reg offset s) (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) s) | Load128Byte16 dst base -> check (valid_mem128_reg base);* update_vec dst (reverse_bytes_quad32 (eval_mem128 (eval_reg base s) s)) | Load128Byte16Index dst base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* update_vec dst (reverse_bytes_quad32 (eval_mem128 (eval_reg base s + eval_reg offset s) s)) | Store128Byte16 src base -> check (valid_mem128_reg base);* set (update_mem128 (eval_reg base s) (reverse_bytes_quad32 (eval_vec src s)) s) | Store128Byte16Index src base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* set (update_mem128 (eval_reg base s + eval_reg offset s) (reverse_bytes_quad32 (eval_vec src s)) s) | Vshasigmaw0 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_0_0 src_q.lo0) (sigma256_0_0 src_q.lo1) (sigma256_0_0 src_q.hi2) (sigma256_0_0 src_q.hi3)) | Vshasigmaw1 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_0_1 src_q.lo0) (sigma256_0_1 src_q.lo1) (sigma256_0_1 src_q.hi2) (sigma256_0_1 src_q.hi3)) | Vshasigmaw2 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_1_0 src_q.lo0) (sigma256_1_0 src_q.lo1) (sigma256_1_0 src_q.hi2) (sigma256_1_0 src_q.hi3)) | Vshasigmaw3 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_1_1 src_q.lo0) (sigma256_1_1 src_q.lo1) (sigma256_1_1 src_q.hi2) (sigma256_1_1 src_q.hi3)) | Vsbox dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (Vale.AES.AES_BE_s.sub_word src_q.lo0) (Vale.AES.AES_BE_s.sub_word src_q.lo1) (Vale.AES.AES_BE_s.sub_word src_q.hi2) (Vale.AES.AES_BE_s.sub_word src_q.hi3)) | RotWord dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in check (fun s -> (src2_q.lo0 = 8 && src2_q.lo1 = 8 && src2_q.hi2 = 8 && src2_q.hi3 = 8));* update_vec dst (Mkfour (Vale.AES.AES_BE_s.rot_word src1_q.lo0) (Vale.AES.AES_BE_s.rot_word src1_q.lo1) (Vale.AES.AES_BE_s.rot_word src1_q.hi2) (Vale.AES.AES_BE_s.rot_word src1_q.hi3)) | Vcipher dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_BE_s.sub_bytes (eval_vec src1 s)))) (eval_vec src2 s)) | Vcipherlast dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_BE_s.sub_bytes (eval_vec src1 s))) (eval_vec src2 s)) | Vncipher dst src1 src2 -> update_vec dst (Vale.AES.AES_BE_s.inv_mix_columns (quad32_xor (Vale.AES.AES_BE_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (eval_vec src1 s))) (eval_vec src2 s))) | Vncipherlast dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (eval_vec src1 s))) (eval_vec src2 s)) | Vpmsumd dst src1 src2 -> let Mkfour a0 a1 a2 a3 = eval_vec src1 s in let Mkfour b0 b1 b2 b3 = eval_vec src2 s in let x0 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo a0 a1) in let x1 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo a2 a3) in let y0 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo b0 b1) in let y1 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo b2 b3) in let sum = Vale.Math.Poly2_s.add (Vale.Math.Poly2_s.mul x0 y0) (Vale.Math.Poly2_s.mul x1 y1) in update_vec dst (Vale.Math.Poly2.Bits_s.to_quad32 sum) | Alloc n -> check (fun s -> n % 16 = 0);* update_r1 (eval_reg 1 s - n) | Dealloc n -> let old_r1 = eval_reg 1 s in let new_r1 = old_r1 + n in update_r1 new_r1;* // The deallocated stack memory should now be considered invalid free_stack old_r1 new_r1 | StoreStack128 src t offset -> check (fun s -> valid_maddr_offset128 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos <= s.ms_stack.initial_r1 - 16);* set (update_stack128_and_taint r1_pos (eval_vec src s) s t) | LoadStack128 dst t offset -> check (fun s -> valid_maddr_offset128 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos + 16 <= s.ms_stack.initial_r1);* check (fun s -> valid_src_stack128_and_taint r1_pos s t);* update_vec dst (eval_stack128 r1_pos s.ms_stack) | StoreStack64 src t offset -> check (fun s -> valid_maddr_offset64 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos <= s.ms_stack.initial_r1 - 8);* set (update_stack_and_taint r1_pos (eval_reg src s) s t) | LoadStack64 dst t offset -> check (fun s -> valid_maddr_offset64 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos + 8 <= s.ms_stack.initial_r1);* check (fun s -> valid_src_stack64_and_taint r1_pos s t);* update_reg dst (eval_stack r1_pos s.ms_stack) | Ghost _ -> set s

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 9, "end_line": 809, "start_col": 0, "start_line": 439 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state unfold let return (#a:Type) (x:a) :st a = fun s -> x, s unfold let (let*) (#a:Type) (#b:Type) (m:st a) (f:a -> st b) :st b = fun s0 -> let x, s1 = m s0 in let y, s2 = f x s1 in y, {s2 with ok=s0.ok && s1.ok && s2.ok} unfold let get :st state = fun s -> s, s unfold let set (s:state) :st unit = fun _ -> (), s unfold let fail :st unit = fun s -> (), {s with ok=false} unfold let check (valid: state -> bool) : st unit = let* s = get in if valid s then return () else fail unfold let run (f:st unit) (s:state) : state = snd (f s) let update_reg (r:reg) (v:nat64) :st unit = let* s = get in set (update_reg' r v s) let update_vec (vr:vec) (v:quad32) :st unit = let* s = get in set (update_vec' vr v s) let update_xer (new_xer:xer_t) :st unit = let* s = get in set ( { s with xer = new_xer } ) let update_cr0 (new_cr0:cr0_t) :st unit = let* s = get in set ( { s with cr0 = new_cr0 } ) unfold let update_r1 (i:int) : st unit = // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page check (fun s -> i >= s.ms_stack.initial_r1 - 65536);* check (fun s -> i <= s.ms_stack.initial_r1);* let* s = get in set (update_r1' i s) let free_stack (start finish:int) : st unit = let* s = get in set ( { s with ms_stack = free_stack' start finish s.ms_stack} )

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

ins: Vale.PPC64LE.Semantics_s.ins -> Vale.PPC64LE.Semantics_s.st Prims.unit

Prims.Tot

[ "total" ]

[]

[ "Vale.PPC64LE.Semantics_s.ins", "Vale.PPC64LE.Semantics_s.op_let_Star", "Vale.PPC64LE.Machine_s.state", "Prims.unit", "Vale.PPC64LE.Semantics_s.get", "Vale.PPC64LE.Machine_s.reg", "Vale.PPC64LE.Semantics_s.update_reg", "Vale.PPC64LE.Semantics_s.eval_reg", "Prims.int", "Vale.PPC64LE.Semantics_s.check", "Vale.PPC64LE.Machine_s.valid_maddr_offset64", "Prims.bool", "Vale.PPC64LE.Semantics_s.valid_mem64", "Vale.PPC64LE.Semantics_s.eval_mem", "Prims.op_Addition", "Vale.PPC64LE.Semantics_s.st", "Vale.PPC64LE.Semantics_s.set", "Vale.PPC64LE.Semantics_s.update_mem", "Vale.PPC64LE.Machine_s.simm16", "Prims.op_Modulus", "Vale.Def.Words_s.pow2_64", "Vale.Arch.Types.ishl64", "Vale.PPC64LE.Machine_s.int_to_nat64", "Vale.PPC64LE.Semantics_s.update_xer", "Vale.PPC64LE.Semantics_s.update_xer_ca", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__xer", "Prims.op_GreaterThanOrEqual", "Vale.PPC64LE.Semantics_s.xer_ca", "Vale.PPC64LE.Semantics_s.update_xer_ov", "Vale.PPC64LE.Semantics_s.xer_ov", "Prims.op_Subtraction", "Vale.PPC64LE.Machine_s.nsimm16", "FStar.Mul.op_Star", "FStar.UInt.mul_div", "Vale.Def.Types_s.ixor", "Vale.Def.Types_s.iand", "Vale.PPC64LE.Machine_s.bits64", "Vale.Def.Types_s.ishr", "Vale.Def.Types_s.ishl", "Vale.PPC64LE.Machine_s.vec", "Vale.PPC64LE.Semantics_s.update_vec", "Vale.PPC64LE.Semantics_s.eval_vec", "Vale.Def.Words_s.natN", "Prims.pow2", "Prims.op_Multiply", "Vale.Def.Words.Two_s.two_to_nat", "Vale.Def.Words.Two_s.two_select", "Vale.Def.Words_s.two", "Vale.Def.Types_s.nat32", "Vale.Def.Words_s.nat32", "Vale.Def.Words.Four_s.four_to_two_two", "Vale.Def.Types_s.quad32", "Vale.Def.Words_s.Mkfour", "Vale.Def.Words_s.pow2_32", "Prims.op_Division", "Vale.Def.Words_s.nat64", "Vale.Arch.Types.add_wrap_quad32", "Vale.Def.Types_s.quad32_xor", "Vale.Def.Words.Four_s.four_map2", "Vale.Def.Words_s.__proj__Mkfour__item__lo0", "Vale.Def.Words_s.__proj__Mkfour__item__lo1", "Vale.Def.Words_s.__proj__Mkfour__item__hi2", "Vale.Def.Words_s.__proj__Mkfour__item__hi3", "Vale.Def.Words_s.four", "Vale.Def.Words.Four_s.four_map", "Vale.Def.Words_s.nat8", "Vale.Def.Types_s.nat8", "Prims.op_AmpAmp", "Prims.op_Equality", "FStar.Seq.Base.index", "Vale.Def.Words.Seq_s.seq4", "Prims.eq2", "Vale.Def.Types_s.be_bytes_to_nat32", "Vale.Def.Types_s.nat32_to_be_bytes", "Vale.PPC64LE.Machine_s.quad32bytes", "Prims.op_BarBar", "Vale.PPC64LE.Semantics_s.fail", "Vale.Def.Sel.isel32", "Vale.Def.Words_s.nat2", "Vale.PPC64LE.Machine_s.sim", "Prims.l_imp", "Prims.b2t", "Prims.op_LessThanOrEqual", "Prims.op_LessThan", "Vale.PPC64LE.Machine_s.int_to_nat32", "Vale.Def.Words.Seq_s.four_to_seq_BE", "Vale.PPC64LE.Machine_s.int_to_nat8", "Vale.PPC64LE.Semantics_s.valid_mem128", "Vale.PPC64LE.Semantics_s.eval_mem128", "Vale.PPC64LE.Semantics_s.update_mem128", "Vale.PPC64LE.Semantics_s.valid_mem128_reg", "Prims.op_disEquality", "Vale.Def.Types_s.reverse_bytes_quad32", "Vale.SHA2.Wrapper.sigma256_0_0", "Vale.SHA2.Wrapper.sigma256_0_1", "Vale.SHA2.Wrapper.sigma256_1_0", "Vale.SHA2.Wrapper.sigma256_1_1", "Vale.AES.AES_common_s.sub_word", "Vale.AES.AES_BE_s.rot_word", "Vale.AES.AES_BE_s.mix_columns", "Vale.AES.AES_BE_s.shift_rows", "Vale.AES.AES_common_s.sub_bytes", "Vale.AES.AES_BE_s.inv_mix_columns", "Vale.AES.AES_common_s.inv_sub_bytes", "Vale.AES.AES_BE_s.inv_shift_rows", "Vale.Math.Poly2.Bits_s.to_quad32", "Vale.Math.Poly2_s.poly", "Vale.Math.Poly2_s.add", "Vale.Math.Poly2_s.mul", "Vale.Math.Poly2.Bits_s.of_double32", "Vale.Def.Words_s.Mktwo", "Vale.Def.Types_s.nat64", "Vale.PPC64LE.Semantics_s.update_r1", "Vale.PPC64LE.Semantics_s.free_stack", "Vale.Arch.HeapTypes_s.taint", "Vale.PPC64LE.Machine_s.valid_maddr_offset128", "Vale.PPC64LE.Machine_s.__proj__Machine_stack__item__initial_r1", "Vale.PPC64LE.Machine_s.__proj__Mkstate__item__ms_stack", "Vale.PPC64LE.Semantics_s.update_stack128_and_taint", "Vale.PPC64LE.Semantics_s.valid_src_stack128_and_taint", "Vale.PPC64LE.Semantics_s.eval_stack128", "Vale.PPC64LE.Semantics_s.update_stack_and_taint", "Vale.PPC64LE.Semantics_s.valid_src_stack64_and_taint", "Vale.PPC64LE.Semantics_s.eval_stack" ]

[]

false

true

false

let eval_ins (ins: ins) : st unit =

let* s = get in match ins with | Move dst src -> update_reg dst (eval_reg src s) | Load64 dst base offset -> let* _ = check (fun s -> valid_maddr_offset64 offset) in let* _ = check (valid_mem64 base offset) in update_reg dst (eval_mem (eval_reg base s + offset) s) | Store64 src base offset -> let* _ = check (fun s -> valid_maddr_offset64 offset) in let* _ = check (valid_mem64 base offset) in set (update_mem (eval_reg base s + offset) (eval_reg src s) s) | LoadImm64 dst src -> update_reg dst (src % pow2_64) | LoadImmShl64 dst src -> update_reg dst (ishl64 (src % pow2_64) 16) | AddLa dst src1 src2 -> update_reg dst ((eval_reg src1 s + src2) % pow2_64) | Add dst src1 src2 -> update_reg dst ((eval_reg src1 s + eval_reg src2 s) % pow2_64) | AddImm dst src1 src2 -> update_reg dst ((eval_reg src1 s + int_to_nat64 src2) % pow2_64) | AddCarry dst src1 src2 -> let sum = (eval_reg src1 s) + (eval_reg src2 s) in let new_carry = sum >= pow2_64 in let* _ = update_reg dst (sum % pow2_64) in update_xer (update_xer_ca s.xer new_carry) | AddExtended dst src1 src2 -> let old_carry = if xer_ca (s.xer) then 1 else 0 in let sum = (eval_reg src1 s) + (eval_reg src2 s) + old_carry in let new_carry = sum >= pow2_64 in let* _ = update_reg dst (sum % pow2_64) in update_xer (update_xer_ca s.xer new_carry) | AddExtendedOV dst src1 src2 -> let old_carry = if xer_ov (s.xer) then 1 else 0 in let sum = (eval_reg src1 s) + (eval_reg src2 s) + old_carry in let new_carry = sum >= pow2_64 in let* _ = update_reg dst (sum % pow2_64) in update_xer (update_xer_ov s.xer new_carry) | Sub dst src1 src2 -> update_reg dst ((eval_reg src1 s - eval_reg src2 s) % pow2_64) | SubImm dst src1 src2 -> update_reg dst ((eval_reg src1 s - int_to_nat64 src2) % pow2_64) | MulLow64 dst src1 src2 -> update_reg dst ((eval_reg src1 s * eval_reg src2 s) % pow2_64) | MulHigh64U dst src1 src2 -> update_reg dst (FStar.UInt.mul_div #64 (eval_reg src1 s) (eval_reg src2 s)) | Xor dst src1 src2 -> update_reg dst (ixor (eval_reg src1 s) (eval_reg src2 s)) | And dst src1 src2 -> update_reg dst (iand (eval_reg src1 s) (eval_reg src2 s)) | Sr64Imm dst src1 src2 -> update_reg dst (ishr (eval_reg src1 s) src2) | Sl64Imm dst src1 src2 -> update_reg dst (ishl (eval_reg src1 s) src2) | Sr64 dst src1 src2 -> update_reg dst (ishr (eval_reg src1 s) ((eval_reg src2 s) % 64)) | Sl64 dst src1 src2 -> update_reg dst (ishl (eval_reg src1 s) ((eval_reg src2 s) % 64)) | Vmr dst src -> update_vec dst (eval_vec src s) | Mfvsrd dst src -> let src_q = eval_vec src s in let src_two = four_to_two_two src_q in let extracted_nat64 = two_to_nat 32 (two_select src_two 1) in update_reg dst extracted_nat64 | Mfvsrld dst src -> let src_q = eval_vec src s in let src_two = four_to_two_two src_q in let extracted_nat64 = two_to_nat 32 (two_select src_two 0) in update_reg dst extracted_nat64 | Mtvsrdd dst src1 src2 -> let val_src1 = eval_reg src1 s in let val_src2 = eval_reg src2 s in update_vec dst (Mkfour (val_src2 % pow2_32) (val_src2 / pow2_32) (val_src1 % pow2_32) (val_src1 / pow2_32)) | Mtvsrws dst src -> let val_src = eval_reg src s in update_vec dst (Mkfour (val_src % pow2_32) (val_src % pow2_32) (val_src % pow2_32) (val_src % pow2_32)) | Vadduwm dst src1 src2 -> update_vec dst (add_wrap_quad32 (eval_vec src1 s) (eval_vec src2 s)) | Vxor dst src1 src2 -> update_vec dst (quad32_xor (eval_vec src1 s) (eval_vec src2 s)) | Vand dst src1 src2 -> update_vec dst (four_map2 (fun di si -> iand di si) (eval_vec src1 s) (eval_vec src2 s)) | Vslw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour (ishl src1_q.lo0 (src2_q.lo0 % 32)) (ishl src1_q.lo1 (src2_q.lo1 % 32)) (ishl src1_q.hi2 (src2_q.hi2 % 32)) (ishl src1_q.hi3 (src2_q.hi3 % 32))) | Vsrw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour (ishr src1_q.lo0 (src2_q.lo0 % 32)) (ishr src1_q.lo1 (src2_q.lo1 % 32)) (ishr src1_q.hi2 (src2_q.hi2 % 32)) (ishr src1_q.hi3 (src2_q.hi3 % 32))) | Vsl dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let sh = (index (nat32_to_be_bytes src2_q.lo0) 3) % 8 in let chk (v: nat32) (sh: nat8) : bool = (let bytes = nat32_to_be_bytes v in sh = (index bytes 3) % 8 && sh = (index bytes 2) % 8 && sh = (index bytes 1) % 8 && sh = (index bytes 0) % 8) in let* _ = check (fun s -> chk src2_q.lo0 sh) in let* _ = check (fun s -> chk src2_q.lo1 sh) in let* _ = check (fun s -> chk src2_q.hi2 sh) in let* _ = check (fun s -> chk src2_q.hi3 sh) in let l = four_map (fun (i: nat32) -> ishl i sh) src1_q in let r = four_map (fun (i: nat32) -> ishr i (32 - sh)) src1_q in let Mkfour r0 r1 r2 r3 = r in update_vec dst (quad32_xor l (Mkfour 0 r0 r1 r2)) | Vcmpequw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let eq_result (b: bool) : nat32 = if b then 0xFFFFFFFF else 0 in let eq_val = Mkfour (eq_result (src1_q.lo0 = src2_q.lo0)) (eq_result (src1_q.lo1 = src2_q.lo1)) (eq_result (src1_q.hi2 = src2_q.hi2)) (eq_result (src1_q.hi3 = src2_q.hi3)) in update_vec dst eq_val | Vsldoi dst src1 src2 count -> let* _ = check (fun s -> (count = 4 || count = 8 || count = 12)) in let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in if count = 4 then update_vec dst (Mkfour src2_q.hi3 src1_q.lo0 src1_q.lo1 src1_q.hi2) else if count = 8 then update_vec dst (Mkfour src2_q.hi2 src2_q.hi3 src1_q.lo0 src1_q.lo1) else if count = 12 then update_vec dst (Mkfour src2_q.lo1 src2_q.hi2 src2_q.hi3 src1_q.lo0) else fail | Vmrghw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour src2_q.lo1 src1_q.lo1 src2_q.hi3 src1_q.hi3) | Xxmrghd dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour src2_q.hi2 src2_q.hi3 src1_q.hi2 src1_q.hi3) | Vsel dst src1 src2 sel -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let sel_q = eval_vec sel s in update_vec dst (Mkfour (isel32 src2_q.lo0 src1_q.lo0 sel_q.lo0) (isel32 src2_q.lo1 src1_q.lo1 sel_q.lo1) (isel32 src2_q.hi2 src1_q.hi2 sel_q.hi2) (isel32 src2_q.hi3 src1_q.hi3 sel_q.hi3)) | Vspltw dst src uim -> let src_q = eval_vec src s in if uim = 0 then update_vec dst (Mkfour src_q.hi3 src_q.hi3 src_q.hi3 src_q.hi3) else if uim = 1 then update_vec dst (Mkfour src_q.hi2 src_q.hi2 src_q.hi2 src_q.hi2) else if uim = 2 then update_vec dst (Mkfour src_q.lo1 src_q.lo1 src_q.lo1 src_q.lo1) else update_vec dst (Mkfour src_q.lo0 src_q.lo0 src_q.lo0 src_q.lo0) | Vspltisw dst src -> let src_nat32 = int_to_nat32 src in update_vec dst (Mkfour src_nat32 src_nat32 src_nat32 src_nat32) | Vspltisb dst src -> let src_nat8 = int_to_nat8 src in let src_nat32 = be_bytes_to_nat32 (four_to_seq_BE (Mkfour src_nat8 src_nat8 src_nat8 src_nat8)) in update_vec dst (Mkfour src_nat32 src_nat32 src_nat32 src_nat32) | Load128 dst base offset -> let* _ = check (valid_mem128 base offset) in update_vec dst (eval_mem128 (eval_reg base s + eval_reg offset s) s) | Store128 src base offset -> let* _ = check (valid_mem128 base offset) in set (update_mem128 (eval_reg base s + eval_reg offset s) (eval_vec src s) s) | Load128Word4 dst base -> let* _ = check (valid_mem128_reg base) in let src_q = eval_mem128 (eval_reg base s) s in update_vec dst (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) | Load128Word4Index dst base offset -> let* _ = check (fun s -> offset <> 0) in let* _ = check (valid_mem128 base offset) in let src_q = eval_mem128 (eval_reg base s + eval_reg offset s) s in update_vec dst (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) | Store128Word4 src base -> let* _ = check (valid_mem128_reg base) in let src_q = eval_vec src s in set (update_mem128 (eval_reg base s) (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) s) | Store128Word4Index src base offset -> let* _ = check (fun s -> offset <> 0) in let* _ = check (valid_mem128 base offset) in let src_q = eval_vec src s in set (update_mem128 (eval_reg base s + eval_reg offset s) (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) s) | Load128Byte16 dst base -> let* _ = check (valid_mem128_reg base) in update_vec dst (reverse_bytes_quad32 (eval_mem128 (eval_reg base s) s)) | Load128Byte16Index dst base offset -> let* _ = check (fun s -> offset <> 0) in let* _ = check (valid_mem128 base offset) in update_vec dst (reverse_bytes_quad32 (eval_mem128 (eval_reg base s + eval_reg offset s) s)) | Store128Byte16 src base -> let* _ = check (valid_mem128_reg base) in set (update_mem128 (eval_reg base s) (reverse_bytes_quad32 (eval_vec src s)) s) | Store128Byte16Index src base offset -> let* _ = check (fun s -> offset <> 0) in let* _ = check (valid_mem128 base offset) in set (update_mem128 (eval_reg base s + eval_reg offset s) (reverse_bytes_quad32 (eval_vec src s)) s ) | Vshasigmaw0 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_0_0 src_q.lo0) (sigma256_0_0 src_q.lo1) (sigma256_0_0 src_q.hi2) (sigma256_0_0 src_q.hi3)) | Vshasigmaw1 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_0_1 src_q.lo0) (sigma256_0_1 src_q.lo1) (sigma256_0_1 src_q.hi2) (sigma256_0_1 src_q.hi3)) | Vshasigmaw2 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_1_0 src_q.lo0) (sigma256_1_0 src_q.lo1) (sigma256_1_0 src_q.hi2) (sigma256_1_0 src_q.hi3)) | Vshasigmaw3 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_1_1 src_q.lo0) (sigma256_1_1 src_q.lo1) (sigma256_1_1 src_q.hi2) (sigma256_1_1 src_q.hi3)) | Vsbox dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (Vale.AES.AES_BE_s.sub_word src_q.lo0) (Vale.AES.AES_BE_s.sub_word src_q.lo1) (Vale.AES.AES_BE_s.sub_word src_q.hi2) (Vale.AES.AES_BE_s.sub_word src_q.hi3)) | RotWord dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let* _ = check (fun s -> (src2_q.lo0 = 8 && src2_q.lo1 = 8 && src2_q.hi2 = 8 && src2_q.hi3 = 8)) in update_vec dst (Mkfour (Vale.AES.AES_BE_s.rot_word src1_q.lo0) (Vale.AES.AES_BE_s.rot_word src1_q.lo1) (Vale.AES.AES_BE_s.rot_word src1_q.hi2) (Vale.AES.AES_BE_s.rot_word src1_q.hi3)) | Vcipher dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_BE_s.sub_bytes (eval_vec src1 s)))) (eval_vec src2 s)) | Vcipherlast dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_BE_s.sub_bytes (eval_vec src1 s))) (eval_vec src2 s)) | Vncipher dst src1 src2 -> update_vec dst (Vale.AES.AES_BE_s.inv_mix_columns (quad32_xor (Vale.AES.AES_BE_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (eval_vec src1 s))) (eval_vec src2 s))) | Vncipherlast dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (eval_vec src1 s) )) (eval_vec src2 s)) | Vpmsumd dst src1 src2 -> let Mkfour a0 a1 a2 a3 = eval_vec src1 s in let Mkfour b0 b1 b2 b3 = eval_vec src2 s in let x0 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo a0 a1) in let x1 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo a2 a3) in let y0 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo b0 b1) in let y1 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo b2 b3) in let sum = Vale.Math.Poly2_s.add (Vale.Math.Poly2_s.mul x0 y0) (Vale.Math.Poly2_s.mul x1 y1) in update_vec dst (Vale.Math.Poly2.Bits_s.to_quad32 sum) | Alloc n -> let* _ = check (fun s -> n % 16 = 0) in update_r1 (eval_reg 1 s - n) | Dealloc n -> let old_r1 = eval_reg 1 s in let new_r1 = old_r1 + n in let* _ = update_r1 new_r1 in free_stack old_r1 new_r1 | StoreStack128 src t offset -> let* _ = check (fun s -> valid_maddr_offset128 offset) in let r1_pos = eval_reg 1 s + offset in let* _ = check (fun s -> r1_pos <= s.ms_stack.initial_r1 - 16) in set (update_stack128_and_taint r1_pos (eval_vec src s) s t) | LoadStack128 dst t offset -> let* _ = check (fun s -> valid_maddr_offset128 offset) in let r1_pos = eval_reg 1 s + offset in let* _ = check (fun s -> r1_pos + 16 <= s.ms_stack.initial_r1) in let* _ = check (fun s -> valid_src_stack128_and_taint r1_pos s t) in update_vec dst (eval_stack128 r1_pos s.ms_stack) | StoreStack64 src t offset -> let* _ = check (fun s -> valid_maddr_offset64 offset) in let r1_pos = eval_reg 1 s + offset in let* _ = check (fun s -> r1_pos <= s.ms_stack.initial_r1 - 8) in set (update_stack_and_taint r1_pos (eval_reg src s) s t) | LoadStack64 dst t offset -> let* _ = check (fun s -> valid_maddr_offset64 offset) in let r1_pos = eval_reg 1 s + offset in let* _ = check (fun s -> r1_pos + 8 <= s.ms_stack.initial_r1) in let* _ = check (fun s -> valid_src_stack64_and_taint r1_pos s t) in update_reg dst (eval_stack r1_pos s.ms_stack) | Ghost _ -> set s

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.eval_code

val eval_code (c: code) (fuel: nat) (s: state) : Tot (option state) (decreases %[fuel;c])

let rec eval_code (c:code) (fuel:nat) (s:state) : Tot (option state) (decreases %[fuel; c]) = match c with | Ins ins -> Some (run (eval_ins ins) s) | Block l -> eval_codes l fuel s | IfElse cond ifTrue ifFalse -> let (s, b) = run_ocmp s cond in if b then eval_code ifTrue fuel s else eval_code ifFalse fuel s | While b c -> eval_while b c fuel s and eval_codes (l:codes) (fuel:nat) (s:state) : Tot (option state) (decreases %[fuel; l]) = match l with | [] -> Some s | c::tl -> let s_opt = eval_code c fuel s in if None? s_opt then None else eval_codes tl fuel (Some?.v s_opt) and eval_while (cond:ocmp) (c:code) (fuel:nat) (s0:state) : Tot (option state) (decreases %[fuel; c]) = if fuel = 0 then None else let (s0, b) = run_ocmp s0 cond in if not b then Some s0 else match eval_code c (fuel - 1) s0 with | None -> None | Some s1 -> if s1.ok then eval_while cond c (fuel - 1) s1 // success: continue to next iteration else Some s1

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 18, "end_line": 845, "start_col": 0, "start_line": 819 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state unfold let return (#a:Type) (x:a) :st a = fun s -> x, s unfold let (let*) (#a:Type) (#b:Type) (m:st a) (f:a -> st b) :st b = fun s0 -> let x, s1 = m s0 in let y, s2 = f x s1 in y, {s2 with ok=s0.ok && s1.ok && s2.ok} unfold let get :st state = fun s -> s, s unfold let set (s:state) :st unit = fun _ -> (), s unfold let fail :st unit = fun s -> (), {s with ok=false} unfold let check (valid: state -> bool) : st unit = let* s = get in if valid s then return () else fail unfold let run (f:st unit) (s:state) : state = snd (f s) let update_reg (r:reg) (v:nat64) :st unit = let* s = get in set (update_reg' r v s) let update_vec (vr:vec) (v:quad32) :st unit = let* s = get in set (update_vec' vr v s) let update_xer (new_xer:xer_t) :st unit = let* s = get in set ( { s with xer = new_xer } ) let update_cr0 (new_cr0:cr0_t) :st unit = let* s = get in set ( { s with cr0 = new_cr0 } ) unfold let update_r1 (i:int) : st unit = // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page check (fun s -> i >= s.ms_stack.initial_r1 - 65536);* check (fun s -> i <= s.ms_stack.initial_r1);* let* s = get in set (update_r1' i s) let free_stack (start finish:int) : st unit = let* s = get in set ( { s with ms_stack = free_stack' start finish s.ms_stack} ) // Core definition of instruction semantics let eval_ins (ins:ins) : st unit = let* s = get in match ins with | Move dst src -> update_reg dst (eval_reg src s) | Load64 dst base offset -> check (fun s -> valid_maddr_offset64 offset);* check (valid_mem64 base offset);* update_reg dst (eval_mem (eval_reg base s + offset) s) | Store64 src base offset -> check (fun s -> valid_maddr_offset64 offset);* check (valid_mem64 base offset);* set (update_mem (eval_reg base s + offset) (eval_reg src s) s) | LoadImm64 dst src -> update_reg dst (src % pow2_64) | LoadImmShl64 dst src -> update_reg dst (ishl64 (src % pow2_64) 16) | AddLa dst src1 src2 -> update_reg dst ((eval_reg src1 s + src2) % pow2_64) | Add dst src1 src2 -> update_reg dst ((eval_reg src1 s + eval_reg src2 s) % pow2_64) | AddImm dst src1 src2 -> update_reg dst ((eval_reg src1 s + int_to_nat64 src2) % pow2_64) | AddCarry dst src1 src2 -> let sum = (eval_reg src1 s) + (eval_reg src2 s) in let new_carry = sum >= pow2_64 in update_reg dst (sum % pow2_64);* update_xer (update_xer_ca s.xer new_carry) | AddExtended dst src1 src2 -> let old_carry = if xer_ca(s.xer) then 1 else 0 in let sum = (eval_reg src1 s) + (eval_reg src2 s) + old_carry in let new_carry = sum >= pow2_64 in update_reg dst (sum % pow2_64);* update_xer (update_xer_ca s.xer new_carry) | AddExtendedOV dst src1 src2 -> let old_carry = if xer_ov(s.xer) then 1 else 0 in let sum = (eval_reg src1 s) + (eval_reg src2 s) + old_carry in let new_carry = sum >= pow2_64 in update_reg dst (sum % pow2_64);* update_xer (update_xer_ov s.xer new_carry) | Sub dst src1 src2 -> update_reg dst ((eval_reg src1 s - eval_reg src2 s) % pow2_64) | SubImm dst src1 src2 -> update_reg dst ((eval_reg src1 s - int_to_nat64 src2) % pow2_64) | MulLow64 dst src1 src2 -> update_reg dst ((eval_reg src1 s * eval_reg src2 s) % pow2_64) | MulHigh64U dst src1 src2 -> update_reg dst (FStar.UInt.mul_div #64 (eval_reg src1 s) (eval_reg src2 s)) | Xor dst src1 src2 -> update_reg dst (ixor (eval_reg src1 s) (eval_reg src2 s)) | And dst src1 src2 -> update_reg dst (iand (eval_reg src1 s) (eval_reg src2 s)) | Sr64Imm dst src1 src2 -> update_reg dst (ishr (eval_reg src1 s) src2) | Sl64Imm dst src1 src2 -> update_reg dst (ishl (eval_reg src1 s) src2) | Sr64 dst src1 src2 -> update_reg dst (ishr (eval_reg src1 s) ((eval_reg src2 s) % 64)) | Sl64 dst src1 src2 -> update_reg dst (ishl (eval_reg src1 s) ((eval_reg src2 s) % 64)) | Vmr dst src -> update_vec dst (eval_vec src s) | Mfvsrd dst src -> let src_q = eval_vec src s in let src_two = four_to_two_two src_q in let extracted_nat64 = two_to_nat 32 (two_select src_two 1) in update_reg dst extracted_nat64 | Mfvsrld dst src -> let src_q = eval_vec src s in let src_two = four_to_two_two src_q in let extracted_nat64 = two_to_nat 32 (two_select src_two 0) in update_reg dst extracted_nat64 | Mtvsrdd dst src1 src2 -> let val_src1 = eval_reg src1 s in let val_src2 = eval_reg src2 s in update_vec dst (Mkfour (val_src2 % pow2_32) (val_src2 / pow2_32) (val_src1 % pow2_32) (val_src1 / pow2_32)) | Mtvsrws dst src -> let val_src = eval_reg src s in update_vec dst (Mkfour (val_src % pow2_32) (val_src % pow2_32) (val_src % pow2_32) (val_src % pow2_32)) | Vadduwm dst src1 src2 -> update_vec dst (add_wrap_quad32 (eval_vec src1 s) (eval_vec src2 s)) | Vxor dst src1 src2 -> update_vec dst (quad32_xor (eval_vec src1 s) (eval_vec src2 s)) | Vand dst src1 src2 -> update_vec dst (four_map2 (fun di si -> iand di si) (eval_vec src1 s) (eval_vec src2 s)) | Vslw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour (ishl src1_q.lo0 (src2_q.lo0 % 32)) (ishl src1_q.lo1 (src2_q.lo1 % 32)) (ishl src1_q.hi2 (src2_q.hi2 % 32)) (ishl src1_q.hi3 (src2_q.hi3 % 32))) | Vsrw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour (ishr src1_q.lo0 (src2_q.lo0 % 32)) (ishr src1_q.lo1 (src2_q.lo1 % 32)) (ishr src1_q.hi2 (src2_q.hi2 % 32)) (ishr src1_q.hi3 (src2_q.hi3 % 32))) | Vsl dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let sh = (index (nat32_to_be_bytes src2_q.lo0) 3) % 8 in let chk (v:nat32) (sh:nat8):bool = (let bytes = nat32_to_be_bytes v in sh = (index bytes 3) % 8 && sh = (index bytes 2) % 8 && sh = (index bytes 1) % 8 && sh = (index bytes 0) % 8) in check (fun s -> chk src2_q.lo0 sh);* check (fun s -> chk src2_q.lo1 sh);* check (fun s -> chk src2_q.hi2 sh);* check (fun s -> chk src2_q.hi3 sh);* let l = four_map (fun (i:nat32) -> ishl i sh) src1_q in let r = four_map (fun (i:nat32) -> ishr i (32 - sh)) src1_q in let Mkfour r0 r1 r2 r3 = r in update_vec dst (quad32_xor l (Mkfour 0 r0 r1 r2)) | Vcmpequw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let eq_result (b:bool):nat32 = if b then 0xFFFFFFFF else 0 in let eq_val = Mkfour (eq_result (src1_q.lo0 = src2_q.lo0)) (eq_result (src1_q.lo1 = src2_q.lo1)) (eq_result (src1_q.hi2 = src2_q.hi2)) (eq_result (src1_q.hi3 = src2_q.hi3)) in update_vec dst eq_val | Vsldoi dst src1 src2 count -> check (fun s -> (count = 4 || count = 8 || count = 12));* // We only spec the one very special case we need let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in if count = 4 then update_vec dst (Mkfour src2_q.hi3 src1_q.lo0 src1_q.lo1 src1_q.hi2) else if count = 8 then update_vec dst (Mkfour src2_q.hi2 src2_q.hi3 src1_q.lo0 src1_q.lo1) else if count = 12 then update_vec dst (Mkfour src2_q.lo1 src2_q.hi2 src2_q.hi3 src1_q.lo0) else fail | Vmrghw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour src2_q.lo1 src1_q.lo1 src2_q.hi3 src1_q.hi3) | Xxmrghd dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour src2_q.hi2 src2_q.hi3 src1_q.hi2 src1_q.hi3) | Vsel dst src1 src2 sel -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let sel_q = eval_vec sel s in update_vec dst (Mkfour (isel32 src2_q.lo0 src1_q.lo0 sel_q.lo0) (isel32 src2_q.lo1 src1_q.lo1 sel_q.lo1) (isel32 src2_q.hi2 src1_q.hi2 sel_q.hi2) (isel32 src2_q.hi3 src1_q.hi3 sel_q.hi3)) | Vspltw dst src uim -> let src_q = eval_vec src s in if uim = 0 then update_vec dst (Mkfour src_q.hi3 src_q.hi3 src_q.hi3 src_q.hi3) else if uim = 1 then update_vec dst (Mkfour src_q.hi2 src_q.hi2 src_q.hi2 src_q.hi2) else if uim = 2 then update_vec dst (Mkfour src_q.lo1 src_q.lo1 src_q.lo1 src_q.lo1) else update_vec dst (Mkfour src_q.lo0 src_q.lo0 src_q.lo0 src_q.lo0) | Vspltisw dst src -> let src_nat32 = int_to_nat32 src in update_vec dst (Mkfour src_nat32 src_nat32 src_nat32 src_nat32) | Vspltisb dst src -> let src_nat8 = int_to_nat8 src in let src_nat32 = be_bytes_to_nat32 (four_to_seq_BE (Mkfour src_nat8 src_nat8 src_nat8 src_nat8)) in update_vec dst (Mkfour src_nat32 src_nat32 src_nat32 src_nat32) | Load128 dst base offset -> check (valid_mem128 base offset);* update_vec dst (eval_mem128 (eval_reg base s + eval_reg offset s) s) | Store128 src base offset -> check (valid_mem128 base offset);* set (update_mem128 (eval_reg base s + eval_reg offset s) (eval_vec src s) s) | Load128Word4 dst base -> check (valid_mem128_reg base);* let src_q = eval_mem128 (eval_reg base s) s in update_vec dst (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) | Load128Word4Index dst base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* let src_q = eval_mem128 (eval_reg base s + eval_reg offset s) s in update_vec dst (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) | Store128Word4 src base -> check (valid_mem128_reg base);* let src_q = eval_vec src s in set (update_mem128 (eval_reg base s) (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) s) | Store128Word4Index src base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* let src_q = eval_vec src s in set (update_mem128 (eval_reg base s + eval_reg offset s) (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) s) | Load128Byte16 dst base -> check (valid_mem128_reg base);* update_vec dst (reverse_bytes_quad32 (eval_mem128 (eval_reg base s) s)) | Load128Byte16Index dst base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* update_vec dst (reverse_bytes_quad32 (eval_mem128 (eval_reg base s + eval_reg offset s) s)) | Store128Byte16 src base -> check (valid_mem128_reg base);* set (update_mem128 (eval_reg base s) (reverse_bytes_quad32 (eval_vec src s)) s) | Store128Byte16Index src base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* set (update_mem128 (eval_reg base s + eval_reg offset s) (reverse_bytes_quad32 (eval_vec src s)) s) | Vshasigmaw0 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_0_0 src_q.lo0) (sigma256_0_0 src_q.lo1) (sigma256_0_0 src_q.hi2) (sigma256_0_0 src_q.hi3)) | Vshasigmaw1 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_0_1 src_q.lo0) (sigma256_0_1 src_q.lo1) (sigma256_0_1 src_q.hi2) (sigma256_0_1 src_q.hi3)) | Vshasigmaw2 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_1_0 src_q.lo0) (sigma256_1_0 src_q.lo1) (sigma256_1_0 src_q.hi2) (sigma256_1_0 src_q.hi3)) | Vshasigmaw3 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_1_1 src_q.lo0) (sigma256_1_1 src_q.lo1) (sigma256_1_1 src_q.hi2) (sigma256_1_1 src_q.hi3)) | Vsbox dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (Vale.AES.AES_BE_s.sub_word src_q.lo0) (Vale.AES.AES_BE_s.sub_word src_q.lo1) (Vale.AES.AES_BE_s.sub_word src_q.hi2) (Vale.AES.AES_BE_s.sub_word src_q.hi3)) | RotWord dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in check (fun s -> (src2_q.lo0 = 8 && src2_q.lo1 = 8 && src2_q.hi2 = 8 && src2_q.hi3 = 8));* update_vec dst (Mkfour (Vale.AES.AES_BE_s.rot_word src1_q.lo0) (Vale.AES.AES_BE_s.rot_word src1_q.lo1) (Vale.AES.AES_BE_s.rot_word src1_q.hi2) (Vale.AES.AES_BE_s.rot_word src1_q.hi3)) | Vcipher dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_BE_s.sub_bytes (eval_vec src1 s)))) (eval_vec src2 s)) | Vcipherlast dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_BE_s.sub_bytes (eval_vec src1 s))) (eval_vec src2 s)) | Vncipher dst src1 src2 -> update_vec dst (Vale.AES.AES_BE_s.inv_mix_columns (quad32_xor (Vale.AES.AES_BE_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (eval_vec src1 s))) (eval_vec src2 s))) | Vncipherlast dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (eval_vec src1 s))) (eval_vec src2 s)) | Vpmsumd dst src1 src2 -> let Mkfour a0 a1 a2 a3 = eval_vec src1 s in let Mkfour b0 b1 b2 b3 = eval_vec src2 s in let x0 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo a0 a1) in let x1 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo a2 a3) in let y0 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo b0 b1) in let y1 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo b2 b3) in let sum = Vale.Math.Poly2_s.add (Vale.Math.Poly2_s.mul x0 y0) (Vale.Math.Poly2_s.mul x1 y1) in update_vec dst (Vale.Math.Poly2.Bits_s.to_quad32 sum) | Alloc n -> check (fun s -> n % 16 = 0);* update_r1 (eval_reg 1 s - n) | Dealloc n -> let old_r1 = eval_reg 1 s in let new_r1 = old_r1 + n in update_r1 new_r1;* // The deallocated stack memory should now be considered invalid free_stack old_r1 new_r1 | StoreStack128 src t offset -> check (fun s -> valid_maddr_offset128 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos <= s.ms_stack.initial_r1 - 16);* set (update_stack128_and_taint r1_pos (eval_vec src s) s t) | LoadStack128 dst t offset -> check (fun s -> valid_maddr_offset128 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos + 16 <= s.ms_stack.initial_r1);* check (fun s -> valid_src_stack128_and_taint r1_pos s t);* update_vec dst (eval_stack128 r1_pos s.ms_stack) | StoreStack64 src t offset -> check (fun s -> valid_maddr_offset64 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos <= s.ms_stack.initial_r1 - 8);* set (update_stack_and_taint r1_pos (eval_reg src s) s t) | LoadStack64 dst t offset -> check (fun s -> valid_maddr_offset64 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos + 8 <= s.ms_stack.initial_r1);* check (fun s -> valid_src_stack64_and_taint r1_pos s t);* update_reg dst (eval_stack r1_pos s.ms_stack) | Ghost _ -> set s let run_ocmp (s:state) (c:ocmp) : state & bool = let s = run (check (valid_ocmp c)) s in ({s with cr0 = eval_cmp_cr0 s c}, eval_ocmp s c) (* * These functions return an option state * None case arises when the while loop runs out of fuel

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

c: Vale.PPC64LE.Semantics_s.code -> fuel: Prims.nat -> s: Vale.PPC64LE.Machine_s.state -> Prims.Tot (FStar.Pervasives.Native.option Vale.PPC64LE.Machine_s.state)

Prims.Tot

[ "total", "" ]

[ "eval_code", "eval_codes", "eval_while" ]

[ "Vale.PPC64LE.Semantics_s.code", "Prims.nat", "Vale.PPC64LE.Machine_s.state", "Vale.PPC64LE.Semantics_s.ins", "FStar.Pervasives.Native.Some", "Vale.PPC64LE.Semantics_s.run", "Vale.PPC64LE.Semantics_s.eval_ins", "Prims.list", "Vale.PPC64LE.Machine_s.precode", "Vale.PPC64LE.Semantics_s.ocmp", "Vale.PPC64LE.Semantics_s.eval_codes", "Prims.bool", "Vale.PPC64LE.Semantics_s.eval_code", "FStar.Pervasives.Native.option", "FStar.Pervasives.Native.tuple2", "Vale.PPC64LE.Semantics_s.run_ocmp", "Vale.PPC64LE.Semantics_s.eval_while" ]

[ "mutual recursion" ]

false

true

false

let rec eval_code (c: code) (fuel: nat) (s: state) : Tot (option state) (decreases %[fuel;c]) =

match c with | Ins ins -> Some (run (eval_ins ins) s) | Block l -> eval_codes l fuel s | IfElse cond ifTrue ifFalse -> let s, b = run_ocmp s cond in if b then eval_code ifTrue fuel s else eval_code ifFalse fuel s | While b c -> eval_while b c fuel s

false

Vale.PPC64LE.Semantics_s.fst

Vale.PPC64LE.Semantics_s.eval_codes

val eval_codes (l: codes) (fuel: nat) (s: state) : Tot (option state) (decreases %[fuel;l])

let rec eval_code (c:code) (fuel:nat) (s:state) : Tot (option state) (decreases %[fuel; c]) = match c with | Ins ins -> Some (run (eval_ins ins) s) | Block l -> eval_codes l fuel s | IfElse cond ifTrue ifFalse -> let (s, b) = run_ocmp s cond in if b then eval_code ifTrue fuel s else eval_code ifFalse fuel s | While b c -> eval_while b c fuel s and eval_codes (l:codes) (fuel:nat) (s:state) : Tot (option state) (decreases %[fuel; l]) = match l with | [] -> Some s | c::tl -> let s_opt = eval_code c fuel s in if None? s_opt then None else eval_codes tl fuel (Some?.v s_opt) and eval_while (cond:ocmp) (c:code) (fuel:nat) (s0:state) : Tot (option state) (decreases %[fuel; c]) = if fuel = 0 then None else let (s0, b) = run_ocmp s0 cond in if not b then Some s0 else match eval_code c (fuel - 1) s0 with | None -> None | Some s1 -> if s1.ok then eval_while cond c (fuel - 1) s1 // success: continue to next iteration else Some s1

{ "file_name": "vale/specs/hardware/Vale.PPC64LE.Semantics_s.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 18, "end_line": 845, "start_col": 0, "start_line": 819 }

module Vale.PPC64LE.Semantics_s open FStar.Mul open FStar.Seq.Base open Vale.PPC64LE.Machine_s open Vale.Def.Words_s open Vale.Def.Words.Two_s open Vale.Def.Words.Four_s open Vale.Def.Words.Seq_s open Vale.Def.Types_s include Vale.Arch.MachineHeap_s open Vale.Arch.HeapTypes_s open Vale.Arch.Heap open Vale.Arch.Types open Vale.Def.Sel open Vale.SHA2.Wrapper let (.[]) = Map.sel let (.[]<-) = Map.upd type ins = | Move : dst:reg -> src:reg -> ins | Load64 : dst:reg -> base:reg -> offset:int -> ins | Store64 : src:reg -> base:reg -> offset:int -> ins | LoadImm64 : dst:reg -> src:simm16 -> ins | LoadImmShl64 : dst:reg -> src:simm16 -> ins | AddLa : dst:reg -> src1:reg -> src2:simm16 -> ins | Add : dst:reg -> src1:reg -> src2:reg -> ins | AddImm : dst:reg -> src1:reg -> src2:simm16 -> ins | AddCarry : dst:reg -> src1:reg -> src2:reg -> ins | AddExtended : dst:reg -> src1:reg -> src2:reg -> ins | AddExtendedOV: dst:reg -> src1:reg -> src2:reg -> ins | Sub : dst:reg -> src1:reg -> src2:reg -> ins | SubImm : dst:reg -> src1:reg -> src2:nsimm16 -> ins | MulLow64 : dst:reg -> src1:reg -> src2:reg -> ins | MulHigh64U : dst:reg -> src1:reg -> src2:reg -> ins | Xor : dst:reg -> src1:reg -> src2:reg -> ins | And : dst:reg -> src1:reg -> src2:reg -> ins | Sr64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sl64Imm : dst:reg -> src1:reg -> src2:bits64 -> ins | Sr64 : dst:reg -> src1:reg -> src2:reg -> ins | Sl64 : dst:reg -> src1:reg -> src2:reg -> ins | Vmr : dst:vec -> src:vec -> ins | Mfvsrd : dst:reg -> src:vec -> ins | Mfvsrld : dst:reg -> src:vec -> ins | Mtvsrdd : dst:vec -> src1:reg -> src2:reg -> ins | Mtvsrws : dst:vec -> src:reg -> ins | Vadduwm : dst:vec -> src1:vec -> src2:vec -> ins | Vxor : dst:vec -> src1:vec -> src2:vec -> ins | Vand : dst:vec -> src1:vec -> src2:vec -> ins | Vslw : dst:vec -> src1:vec -> src2:vec -> ins | Vsrw : dst:vec -> src1:vec -> src2:vec -> ins | Vsl : dst:vec -> src1:vec -> src2:vec -> ins | Vcmpequw : dst:vec -> src1:vec -> src2:vec -> ins | Vsldoi : dst:vec -> src1:vec -> src2:vec -> count:quad32bytes -> ins | Vmrghw : dst:vec -> src1:vec -> src2:vec -> ins | Xxmrghd : dst:vec -> src1:vec -> src2:vec -> ins | Vsel : dst:vec -> src1:vec -> src2:vec -> sel:vec -> ins | Vspltw : dst:vec -> src:vec -> uim:nat2 -> ins | Vspltisw : dst:vec -> src:sim -> ins | Vspltisb : dst:vec -> src:sim -> ins | Load128 : dst:vec -> base:reg -> offset:reg -> ins | Store128 : src:vec -> base:reg -> offset:reg -> ins | Load128Word4 : dst:vec -> base:reg -> ins | Load128Word4Index : dst:vec -> base:reg -> offset:reg -> ins | Store128Word4: src:vec -> base:reg -> ins | Store128Word4Index: src:vec -> base:reg -> offset:reg -> ins | Load128Byte16: dst:vec -> base:reg -> ins | Load128Byte16Index: dst:vec -> base:reg -> offset:reg -> ins | Store128Byte16: src:vec -> base:reg -> ins | Store128Byte16Index: src:vec -> base:reg -> offset:reg -> ins | Vshasigmaw0 : dst:vec -> src:vec -> ins | Vshasigmaw1 : dst:vec -> src:vec -> ins | Vshasigmaw2 : dst:vec -> src:vec -> ins | Vshasigmaw3 : dst:vec -> src:vec -> ins | Vsbox : dst:vec -> src:vec -> ins | RotWord : dst:vec -> src1:vec -> src2:vec -> ins | Vcipher : dst:vec -> src1:vec -> src2:vec -> ins | Vcipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vncipher : dst:vec -> src1:vec -> src2:vec -> ins | Vncipherlast : dst:vec -> src1:vec -> src2:vec -> ins | Vpmsumd : dst:vec -> src1:vec -> src2:vec -> ins | Alloc : n:nat64 -> ins | Dealloc : n:nat64 -> ins | StoreStack128: src:vec -> t:taint -> offset:int -> ins | LoadStack128 : dst:vec -> t:taint -> offset:int -> ins | StoreStack64 : src:reg -> t:taint -> offset:int -> ins | LoadStack64 : dst:reg -> t:taint -> offset:int -> ins | Ghost : (_:unit) -> ins type ocmp = | OEq: o1:cmp_opr -> o2:cmp_opr -> ocmp | ONe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGe: o1:cmp_opr -> o2:cmp_opr -> ocmp | OLt: o1:cmp_opr -> o2:cmp_opr -> ocmp | OGt: o1:cmp_opr -> o2:cmp_opr -> ocmp type code = precode ins ocmp type codes = list code unfold let eval_reg (r:reg) (s:state) : nat64 = s.regs r unfold let eval_vec (v:vec) (s:state) : quad32 = s.vecs v unfold let eval_mem (ptr:int) (s:state) : nat64 = get_heap_val64 ptr (heap_get s.ms_heap) unfold let eval_mem128 (ptr:int) (s:state) : quad32 = get_heap_val128 ptr (heap_get s.ms_heap) unfold let eval_stack (ptr:int) (s:machine_stack) : nat64 = let Machine_stack _ mem = s in get_heap_val64 ptr mem unfold let eval_stack128 (ptr:int) (s:machine_stack) : quad32 = let Machine_stack _ mem = s in get_heap_val128 ptr mem (* Check if the taint annotation of a memory operand matches the taint in the memory map. Evaluation will fail in case of a mismatch. This allows the taint analysis to learn information about the memory map from the annotation, assuming that the code has been verified not to fail. (Note that this only relates to memory maps, so non-memory operands need no annotation.) *) [@"opaque_to_smt"] let rec match_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (b:bool{b <==> (forall i.{:pattern (memTaint `Map.sel` i)} (i >= addr /\ i < addr + n) ==> memTaint.[i] == t)}) (decreases n) = if n = 0 then true else if memTaint.[addr] <> t then false else match_n (addr + 1) (n - 1) memTaint t [@"opaque_to_smt"] let rec update_n (addr:int) (n:nat) (memTaint:memTaint_t) (t:taint) : Tot (m:memTaint_t{( forall i.{:pattern (m `Map.sel` i)} ((i >= addr /\ i < addr + n) ==> m.[i] == t) /\ ((i < addr \/ i >= addr + n) ==> m.[i] == memTaint.[i]))}) (decreases n) = if n = 0 then memTaint else update_n (addr + 1) (n - 1) (memTaint.[addr] <- t) t let lemma_is_machine_heap_update64 (ptr:int) (v:nat64) (mh:machine_heap) : Lemma (requires valid_addr64 ptr mh) (ensures is_machine_heap_update mh (update_heap64 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap64 ptr v mh))] = reveal_opaque (`%valid_addr64) valid_addr64; update_heap64_reveal (); () let update_mem_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (update_n ptr 8 (heap_taint s.ms_heap) t) } else s let update_mem (ptr:int) (v:nat64) (s:state) : state = if valid_addr64 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap64 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let lemma_is_machine_heap_update128 (ptr:int) (v:quad32) (mh:machine_heap) : Lemma (requires valid_addr128 ptr mh) (ensures is_machine_heap_update mh (update_heap128 ptr v mh)) [SMTPat (is_machine_heap_update mh (update_heap128 ptr v mh))] = let lemma_is_machine_heap_update32 (ptr:int) (v:nat32) (mh:machine_heap) : Lemma (requires valid_addr ptr mh /\ valid_addr (ptr + 1) mh /\ valid_addr (ptr + 2) mh /\ valid_addr (ptr + 3) mh ) (ensures is_machine_heap_update mh (update_heap32 ptr v mh)) = update_heap32_reveal () in let mem1 = update_heap32 ptr v.lo0 mh in let mem2 = update_heap32 (ptr + 4) v.lo1 mem1 in let mem3 = update_heap32 (ptr + 8) v.hi2 mem2 in reveal_opaque (`%valid_addr128) valid_addr128; update_heap128_reveal (); lemma_is_machine_heap_update32 ptr v.lo0 mh; lemma_is_machine_heap_update32 (ptr + 4) v.lo1 mem1; lemma_is_machine_heap_update32 (ptr + 8) v.hi2 mem2; lemma_is_machine_heap_update32 (ptr + 12) v.hi3 mem3 let update_mem128 (ptr:int) (v:quad32) (s:state) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (heap_taint s.ms_heap) } else s let update_mem128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = if valid_addr128 ptr (heap_get s.ms_heap) then { s with ms_heap = heap_upd s.ms_heap (update_heap128 ptr v (heap_get s.ms_heap)) (update_n ptr 16 (heap_taint s.ms_heap) t) } else s unfold let update_stack64' (ptr:int) (v:nat64) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap64 ptr v mem in Machine_stack init_r1 mem unfold let update_stack128' (ptr:int) (v:quad32) (s:machine_stack) : machine_stack = let Machine_stack init_r1 mem = s in let mem = update_heap128 ptr v mem in Machine_stack init_r1 mem let update_stack_and_taint (ptr:int) (v:nat64) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack64' ptr v s.ms_stack; ms_stackTaint = update_n ptr 8 s.ms_stackTaint t; } let update_stack128_and_taint (ptr:int) (v:quad32) (s:state) (t:taint) : state = let Machine_stack init_r1 mem = s.ms_stack in { s with ms_stack = update_stack128' ptr v s.ms_stack; ms_stackTaint = update_n ptr 16 s.ms_stackTaint t } unfold let valid_src_stack64 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr64 ptr mem unfold let valid_src_stack128 (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in valid_addr128 ptr mem unfold let valid_src_stack64_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack64 ptr s.ms_stack && match_n ptr 8 s.ms_stackTaint t unfold let valid_src_stack128_and_taint (ptr:int) (s:state) (t:taint) : bool = valid_src_stack128 ptr s.ms_stack && match_n ptr 16 s.ms_stackTaint t let valid_src_stack (r:reg) (s:state) : bool = valid_src_stack64 (eval_reg r s) s.ms_stack [@va_qattr] let eval_maddr (m:maddr) (s:state) : int = eval_reg m.address s + m.offset let eval_cmp_opr (o:cmp_opr) (s:state) : nat64 = match o with | CReg r -> eval_reg r s | CImm n -> int_to_nat64 n let eval_ocmp (s:state) (c:ocmp) :bool = match c with | OEq o1 o2 -> eval_cmp_opr o1 s = eval_cmp_opr o2 s | ONe o1 o2 -> eval_cmp_opr o1 s <> eval_cmp_opr o2 s | OLe o1 o2 -> eval_cmp_opr o1 s <= eval_cmp_opr o2 s | OGe o1 o2 -> eval_cmp_opr o1 s >= eval_cmp_opr o2 s | OLt o1 o2 -> eval_cmp_opr o1 s < eval_cmp_opr o2 s | OGt o1 o2 -> eval_cmp_opr o1 s > eval_cmp_opr o2 s let eval_cmp_cr0 (s:state) (c:ocmp) : cr0_t = match c with | OEq o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | ONe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGe o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OLt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) | OGt o1 o2 -> get_cr0 ((eval_cmp_opr o1 s - eval_cmp_opr o2 s) % pow2_64) unfold let valid_dst_stack64 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 8 <= init_r1 unfold let valid_dst_stack128 (r1:nat64) (ptr:int) (st:machine_stack) : bool = let Machine_stack init_r1 mem = st in // We are allowed to store anywhere between rRsp and the initial stack pointer ptr >= r1 && ptr + 16 <= init_r1 let valid_dst_stack64_addr (m:maddr) (s:state) : bool = valid_dst_stack64 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let valid_dst_stack128_addr (m:maddr) (s:state) : bool = valid_dst_stack128 (eval_reg 1 s) (eval_maddr m s) s.ms_stack let update_reg' (r:reg) (v:nat64) (s:state) : state = { s with regs = regs_make (fun (r':reg) -> if r' = r then v else s.regs r') } let update_vec' (vr:vec) (v:quad32) (s:state) : state = { s with vecs = vecs_make (fun (vr':vec) -> if vr' = vr then v else s.vecs vr') } let update_r1' (new_r1:int) (s:state) : state = let Machine_stack init_r1 mem = s.ms_stack in // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page if new_r1 >= init_r1 - 65536 && new_r1 <= init_r1 then update_reg' 1 new_r1 s else s let free_stack' (start finish:int) (st:machine_stack) : machine_stack = let Machine_stack init_r1 mem = st in let domain = Map.domain mem in // Returns the domain, without elements between start and finish let restricted_domain = Vale.Lib.Set.remove_between domain start finish in // The new domain of the stack does not contain elements between start and finish let new_mem = Map.restrict restricted_domain mem in Machine_stack init_r1 new_mem let valid_mem (m:maddr) (s:state) : bool = valid_maddr_offset64 m.offset && valid_addr64 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem64 (r:reg) (i:int) (s:state) : bool = valid_addr64 (eval_reg r s + i) (heap_get s.ms_heap) let valid_mem128 (r:reg) (i:reg) (s:state) : bool = valid_addr128 (eval_reg r s + eval_reg i s) (heap_get s.ms_heap) let valid_mem128_reg (r:reg) (s:state) : bool = valid_addr128 (eval_reg r s) (heap_get s.ms_heap) let valid_mem128' (m:maddr) (s:state) : bool = valid_maddr_offset128 m.offset && valid_addr128 (eval_maddr m s) (heap_get s.ms_heap) let valid_mem_and_taint (m:maddr) (t:taint) (s:state) : bool = let ptr = eval_maddr m s in valid_maddr_offset64 m.offset && valid_addr64 ptr (heap_get s.ms_heap) && match_n ptr 8 (heap_taint s.ms_heap) t let valid_mem128_and_taint (m:maddr) (s:state) (t:taint) : bool = let ptr = eval_maddr m s in valid_addr128 ptr (heap_get s.ms_heap) && match_n ptr 16 (heap_taint s.ms_heap) t let valid_ocmp (c:ocmp) (s:state) : bool = match c with | OEq o1 _ -> valid_first_cmp_opr o1 | ONe o1 _ -> valid_first_cmp_opr o1 | OLe o1 _ -> valid_first_cmp_opr o1 | OGe o1 _ -> valid_first_cmp_opr o1 | OLt o1 _ -> valid_first_cmp_opr o1 | OGt o1 _ -> valid_first_cmp_opr o1 let xer_ov (xer:xer_t) : bool = xer.ov let xer_ca (xer:xer_t) : bool = xer.ca let update_xer_ov (xer:xer_t) (new_xer_ov:bool) : (new_xer:xer_t{xer_ov new_xer == new_xer_ov}) = { xer with ov = new_xer_ov } let update_xer_ca (xer:xer_t) (new_xer_ca:bool) : (new_xer:xer_t{xer_ca new_xer == new_xer_ca}) = { xer with ca = new_xer_ca } // Define a stateful monad to simplify defining the instruction semantics let st (a:Type) = state -> a & state unfold let return (#a:Type) (x:a) :st a = fun s -> x, s unfold let (let*) (#a:Type) (#b:Type) (m:st a) (f:a -> st b) :st b = fun s0 -> let x, s1 = m s0 in let y, s2 = f x s1 in y, {s2 with ok=s0.ok && s1.ok && s2.ok} unfold let get :st state = fun s -> s, s unfold let set (s:state) :st unit = fun _ -> (), s unfold let fail :st unit = fun s -> (), {s with ok=false} unfold let check (valid: state -> bool) : st unit = let* s = get in if valid s then return () else fail unfold let run (f:st unit) (s:state) : state = snd (f s) let update_reg (r:reg) (v:nat64) :st unit = let* s = get in set (update_reg' r v s) let update_vec (vr:vec) (v:quad32) :st unit = let* s = get in set (update_vec' vr v s) let update_xer (new_xer:xer_t) :st unit = let* s = get in set ( { s with xer = new_xer } ) let update_cr0 (new_cr0:cr0_t) :st unit = let* s = get in set ( { s with cr0 = new_cr0 } ) unfold let update_r1 (i:int) : st unit = // Only modify the stack pointer if the new value is valid, that is in the current stack frame, and in the same page check (fun s -> i >= s.ms_stack.initial_r1 - 65536);* check (fun s -> i <= s.ms_stack.initial_r1);* let* s = get in set (update_r1' i s) let free_stack (start finish:int) : st unit = let* s = get in set ( { s with ms_stack = free_stack' start finish s.ms_stack} ) // Core definition of instruction semantics let eval_ins (ins:ins) : st unit = let* s = get in match ins with | Move dst src -> update_reg dst (eval_reg src s) | Load64 dst base offset -> check (fun s -> valid_maddr_offset64 offset);* check (valid_mem64 base offset);* update_reg dst (eval_mem (eval_reg base s + offset) s) | Store64 src base offset -> check (fun s -> valid_maddr_offset64 offset);* check (valid_mem64 base offset);* set (update_mem (eval_reg base s + offset) (eval_reg src s) s) | LoadImm64 dst src -> update_reg dst (src % pow2_64) | LoadImmShl64 dst src -> update_reg dst (ishl64 (src % pow2_64) 16) | AddLa dst src1 src2 -> update_reg dst ((eval_reg src1 s + src2) % pow2_64) | Add dst src1 src2 -> update_reg dst ((eval_reg src1 s + eval_reg src2 s) % pow2_64) | AddImm dst src1 src2 -> update_reg dst ((eval_reg src1 s + int_to_nat64 src2) % pow2_64) | AddCarry dst src1 src2 -> let sum = (eval_reg src1 s) + (eval_reg src2 s) in let new_carry = sum >= pow2_64 in update_reg dst (sum % pow2_64);* update_xer (update_xer_ca s.xer new_carry) | AddExtended dst src1 src2 -> let old_carry = if xer_ca(s.xer) then 1 else 0 in let sum = (eval_reg src1 s) + (eval_reg src2 s) + old_carry in let new_carry = sum >= pow2_64 in update_reg dst (sum % pow2_64);* update_xer (update_xer_ca s.xer new_carry) | AddExtendedOV dst src1 src2 -> let old_carry = if xer_ov(s.xer) then 1 else 0 in let sum = (eval_reg src1 s) + (eval_reg src2 s) + old_carry in let new_carry = sum >= pow2_64 in update_reg dst (sum % pow2_64);* update_xer (update_xer_ov s.xer new_carry) | Sub dst src1 src2 -> update_reg dst ((eval_reg src1 s - eval_reg src2 s) % pow2_64) | SubImm dst src1 src2 -> update_reg dst ((eval_reg src1 s - int_to_nat64 src2) % pow2_64) | MulLow64 dst src1 src2 -> update_reg dst ((eval_reg src1 s * eval_reg src2 s) % pow2_64) | MulHigh64U dst src1 src2 -> update_reg dst (FStar.UInt.mul_div #64 (eval_reg src1 s) (eval_reg src2 s)) | Xor dst src1 src2 -> update_reg dst (ixor (eval_reg src1 s) (eval_reg src2 s)) | And dst src1 src2 -> update_reg dst (iand (eval_reg src1 s) (eval_reg src2 s)) | Sr64Imm dst src1 src2 -> update_reg dst (ishr (eval_reg src1 s) src2) | Sl64Imm dst src1 src2 -> update_reg dst (ishl (eval_reg src1 s) src2) | Sr64 dst src1 src2 -> update_reg dst (ishr (eval_reg src1 s) ((eval_reg src2 s) % 64)) | Sl64 dst src1 src2 -> update_reg dst (ishl (eval_reg src1 s) ((eval_reg src2 s) % 64)) | Vmr dst src -> update_vec dst (eval_vec src s) | Mfvsrd dst src -> let src_q = eval_vec src s in let src_two = four_to_two_two src_q in let extracted_nat64 = two_to_nat 32 (two_select src_two 1) in update_reg dst extracted_nat64 | Mfvsrld dst src -> let src_q = eval_vec src s in let src_two = four_to_two_two src_q in let extracted_nat64 = two_to_nat 32 (two_select src_two 0) in update_reg dst extracted_nat64 | Mtvsrdd dst src1 src2 -> let val_src1 = eval_reg src1 s in let val_src2 = eval_reg src2 s in update_vec dst (Mkfour (val_src2 % pow2_32) (val_src2 / pow2_32) (val_src1 % pow2_32) (val_src1 / pow2_32)) | Mtvsrws dst src -> let val_src = eval_reg src s in update_vec dst (Mkfour (val_src % pow2_32) (val_src % pow2_32) (val_src % pow2_32) (val_src % pow2_32)) | Vadduwm dst src1 src2 -> update_vec dst (add_wrap_quad32 (eval_vec src1 s) (eval_vec src2 s)) | Vxor dst src1 src2 -> update_vec dst (quad32_xor (eval_vec src1 s) (eval_vec src2 s)) | Vand dst src1 src2 -> update_vec dst (four_map2 (fun di si -> iand di si) (eval_vec src1 s) (eval_vec src2 s)) | Vslw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour (ishl src1_q.lo0 (src2_q.lo0 % 32)) (ishl src1_q.lo1 (src2_q.lo1 % 32)) (ishl src1_q.hi2 (src2_q.hi2 % 32)) (ishl src1_q.hi3 (src2_q.hi3 % 32))) | Vsrw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour (ishr src1_q.lo0 (src2_q.lo0 % 32)) (ishr src1_q.lo1 (src2_q.lo1 % 32)) (ishr src1_q.hi2 (src2_q.hi2 % 32)) (ishr src1_q.hi3 (src2_q.hi3 % 32))) | Vsl dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let sh = (index (nat32_to_be_bytes src2_q.lo0) 3) % 8 in let chk (v:nat32) (sh:nat8):bool = (let bytes = nat32_to_be_bytes v in sh = (index bytes 3) % 8 && sh = (index bytes 2) % 8 && sh = (index bytes 1) % 8 && sh = (index bytes 0) % 8) in check (fun s -> chk src2_q.lo0 sh);* check (fun s -> chk src2_q.lo1 sh);* check (fun s -> chk src2_q.hi2 sh);* check (fun s -> chk src2_q.hi3 sh);* let l = four_map (fun (i:nat32) -> ishl i sh) src1_q in let r = four_map (fun (i:nat32) -> ishr i (32 - sh)) src1_q in let Mkfour r0 r1 r2 r3 = r in update_vec dst (quad32_xor l (Mkfour 0 r0 r1 r2)) | Vcmpequw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let eq_result (b:bool):nat32 = if b then 0xFFFFFFFF else 0 in let eq_val = Mkfour (eq_result (src1_q.lo0 = src2_q.lo0)) (eq_result (src1_q.lo1 = src2_q.lo1)) (eq_result (src1_q.hi2 = src2_q.hi2)) (eq_result (src1_q.hi3 = src2_q.hi3)) in update_vec dst eq_val | Vsldoi dst src1 src2 count -> check (fun s -> (count = 4 || count = 8 || count = 12));* // We only spec the one very special case we need let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in if count = 4 then update_vec dst (Mkfour src2_q.hi3 src1_q.lo0 src1_q.lo1 src1_q.hi2) else if count = 8 then update_vec dst (Mkfour src2_q.hi2 src2_q.hi3 src1_q.lo0 src1_q.lo1) else if count = 12 then update_vec dst (Mkfour src2_q.lo1 src2_q.hi2 src2_q.hi3 src1_q.lo0) else fail | Vmrghw dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour src2_q.lo1 src1_q.lo1 src2_q.hi3 src1_q.hi3) | Xxmrghd dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in update_vec dst (Mkfour src2_q.hi2 src2_q.hi3 src1_q.hi2 src1_q.hi3) | Vsel dst src1 src2 sel -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in let sel_q = eval_vec sel s in update_vec dst (Mkfour (isel32 src2_q.lo0 src1_q.lo0 sel_q.lo0) (isel32 src2_q.lo1 src1_q.lo1 sel_q.lo1) (isel32 src2_q.hi2 src1_q.hi2 sel_q.hi2) (isel32 src2_q.hi3 src1_q.hi3 sel_q.hi3)) | Vspltw dst src uim -> let src_q = eval_vec src s in if uim = 0 then update_vec dst (Mkfour src_q.hi3 src_q.hi3 src_q.hi3 src_q.hi3) else if uim = 1 then update_vec dst (Mkfour src_q.hi2 src_q.hi2 src_q.hi2 src_q.hi2) else if uim = 2 then update_vec dst (Mkfour src_q.lo1 src_q.lo1 src_q.lo1 src_q.lo1) else update_vec dst (Mkfour src_q.lo0 src_q.lo0 src_q.lo0 src_q.lo0) | Vspltisw dst src -> let src_nat32 = int_to_nat32 src in update_vec dst (Mkfour src_nat32 src_nat32 src_nat32 src_nat32) | Vspltisb dst src -> let src_nat8 = int_to_nat8 src in let src_nat32 = be_bytes_to_nat32 (four_to_seq_BE (Mkfour src_nat8 src_nat8 src_nat8 src_nat8)) in update_vec dst (Mkfour src_nat32 src_nat32 src_nat32 src_nat32) | Load128 dst base offset -> check (valid_mem128 base offset);* update_vec dst (eval_mem128 (eval_reg base s + eval_reg offset s) s) | Store128 src base offset -> check (valid_mem128 base offset);* set (update_mem128 (eval_reg base s + eval_reg offset s) (eval_vec src s) s) | Load128Word4 dst base -> check (valid_mem128_reg base);* let src_q = eval_mem128 (eval_reg base s) s in update_vec dst (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) | Load128Word4Index dst base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* let src_q = eval_mem128 (eval_reg base s + eval_reg offset s) s in update_vec dst (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) | Store128Word4 src base -> check (valid_mem128_reg base);* let src_q = eval_vec src s in set (update_mem128 (eval_reg base s) (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) s) | Store128Word4Index src base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* let src_q = eval_vec src s in set (update_mem128 (eval_reg base s + eval_reg offset s) (Mkfour src_q.hi3 src_q.hi2 src_q.lo1 src_q.lo0) s) | Load128Byte16 dst base -> check (valid_mem128_reg base);* update_vec dst (reverse_bytes_quad32 (eval_mem128 (eval_reg base s) s)) | Load128Byte16Index dst base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* update_vec dst (reverse_bytes_quad32 (eval_mem128 (eval_reg base s + eval_reg offset s) s)) | Store128Byte16 src base -> check (valid_mem128_reg base);* set (update_mem128 (eval_reg base s) (reverse_bytes_quad32 (eval_vec src s)) s) | Store128Byte16Index src base offset -> check (fun s -> offset <> 0);* check (valid_mem128 base offset);* set (update_mem128 (eval_reg base s + eval_reg offset s) (reverse_bytes_quad32 (eval_vec src s)) s) | Vshasigmaw0 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_0_0 src_q.lo0) (sigma256_0_0 src_q.lo1) (sigma256_0_0 src_q.hi2) (sigma256_0_0 src_q.hi3)) | Vshasigmaw1 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_0_1 src_q.lo0) (sigma256_0_1 src_q.lo1) (sigma256_0_1 src_q.hi2) (sigma256_0_1 src_q.hi3)) | Vshasigmaw2 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_1_0 src_q.lo0) (sigma256_1_0 src_q.lo1) (sigma256_1_0 src_q.hi2) (sigma256_1_0 src_q.hi3)) | Vshasigmaw3 dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (sigma256_1_1 src_q.lo0) (sigma256_1_1 src_q.lo1) (sigma256_1_1 src_q.hi2) (sigma256_1_1 src_q.hi3)) | Vsbox dst src -> let src_q = eval_vec src s in update_vec dst (Mkfour (Vale.AES.AES_BE_s.sub_word src_q.lo0) (Vale.AES.AES_BE_s.sub_word src_q.lo1) (Vale.AES.AES_BE_s.sub_word src_q.hi2) (Vale.AES.AES_BE_s.sub_word src_q.hi3)) | RotWord dst src1 src2 -> let src1_q = eval_vec src1 s in let src2_q = eval_vec src2 s in check (fun s -> (src2_q.lo0 = 8 && src2_q.lo1 = 8 && src2_q.hi2 = 8 && src2_q.hi3 = 8));* update_vec dst (Mkfour (Vale.AES.AES_BE_s.rot_word src1_q.lo0) (Vale.AES.AES_BE_s.rot_word src1_q.lo1) (Vale.AES.AES_BE_s.rot_word src1_q.hi2) (Vale.AES.AES_BE_s.rot_word src1_q.hi3)) | Vcipher dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.mix_columns (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_BE_s.sub_bytes (eval_vec src1 s)))) (eval_vec src2 s)) | Vcipherlast dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.shift_rows (Vale.AES.AES_BE_s.sub_bytes (eval_vec src1 s))) (eval_vec src2 s)) | Vncipher dst src1 src2 -> update_vec dst (Vale.AES.AES_BE_s.inv_mix_columns (quad32_xor (Vale.AES.AES_BE_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (eval_vec src1 s))) (eval_vec src2 s))) | Vncipherlast dst src1 src2 -> update_vec dst (quad32_xor (Vale.AES.AES_BE_s.inv_sub_bytes (Vale.AES.AES_BE_s.inv_shift_rows (eval_vec src1 s))) (eval_vec src2 s)) | Vpmsumd dst src1 src2 -> let Mkfour a0 a1 a2 a3 = eval_vec src1 s in let Mkfour b0 b1 b2 b3 = eval_vec src2 s in let x0 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo a0 a1) in let x1 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo a2 a3) in let y0 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo b0 b1) in let y1 = Vale.Math.Poly2.Bits_s.of_double32 (Mktwo b2 b3) in let sum = Vale.Math.Poly2_s.add (Vale.Math.Poly2_s.mul x0 y0) (Vale.Math.Poly2_s.mul x1 y1) in update_vec dst (Vale.Math.Poly2.Bits_s.to_quad32 sum) | Alloc n -> check (fun s -> n % 16 = 0);* update_r1 (eval_reg 1 s - n) | Dealloc n -> let old_r1 = eval_reg 1 s in let new_r1 = old_r1 + n in update_r1 new_r1;* // The deallocated stack memory should now be considered invalid free_stack old_r1 new_r1 | StoreStack128 src t offset -> check (fun s -> valid_maddr_offset128 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos <= s.ms_stack.initial_r1 - 16);* set (update_stack128_and_taint r1_pos (eval_vec src s) s t) | LoadStack128 dst t offset -> check (fun s -> valid_maddr_offset128 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos + 16 <= s.ms_stack.initial_r1);* check (fun s -> valid_src_stack128_and_taint r1_pos s t);* update_vec dst (eval_stack128 r1_pos s.ms_stack) | StoreStack64 src t offset -> check (fun s -> valid_maddr_offset64 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos <= s.ms_stack.initial_r1 - 8);* set (update_stack_and_taint r1_pos (eval_reg src s) s t) | LoadStack64 dst t offset -> check (fun s -> valid_maddr_offset64 offset);* let r1_pos = eval_reg 1 s + offset in check (fun s -> r1_pos + 8 <= s.ms_stack.initial_r1);* check (fun s -> valid_src_stack64_and_taint r1_pos s t);* update_reg dst (eval_stack r1_pos s.ms_stack) | Ghost _ -> set s let run_ocmp (s:state) (c:ocmp) : state & bool = let s = run (check (valid_ocmp c)) s in ({s with cr0 = eval_cmp_cr0 s c}, eval_ocmp s c) (* * These functions return an option state * None case arises when the while loop runs out of fuel

{ "checked_file": "/", "dependencies": [ "Vale.SHA2.Wrapper.fsti.checked", "Vale.PPC64LE.Machine_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Lib.Set.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Words.Two_s.fsti.checked", "Vale.Def.Words.Seq_s.fsti.checked", "Vale.Def.Words.Four_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Sel.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.MachineHeap_s.fst.checked", "Vale.Arch.HeapTypes_s.fst.checked", "Vale.Arch.Heap.fsti.checked", "Vale.AES.AES_BE_s.fst.checked", "prims.fst.checked", "FStar.UInt.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fsti.checked" ], "interface_file": false, "source_file": "Vale.PPC64LE.Semantics_s.fst" }

[ { "abbrev": false, "full_module": "Vale.SHA2.Wrapper", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Sel", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Heap", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapTypes_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.MachineHeap_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Seq_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Four_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words.Two_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "Vale.PPC64LE", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

l: Vale.PPC64LE.Semantics_s.codes -> fuel: Prims.nat -> s: Vale.PPC64LE.Machine_s.state -> Prims.Tot (FStar.Pervasives.Native.option Vale.PPC64LE.Machine_s.state)

Prims.Tot

[ "total", "" ]

[ "eval_code", "eval_codes", "eval_while" ]

[ "Vale.PPC64LE.Semantics_s.codes", "Prims.nat", "Vale.PPC64LE.Machine_s.state", "FStar.Pervasives.Native.Some", "Vale.PPC64LE.Semantics_s.code", "Prims.list", "FStar.Pervasives.Native.uu___is_None", "FStar.Pervasives.Native.None", "Prims.bool", "Vale.PPC64LE.Semantics_s.eval_codes", "FStar.Pervasives.Native.__proj__Some__item__v", "FStar.Pervasives.Native.option", "Vale.PPC64LE.Semantics_s.eval_code" ]

[ "mutual recursion" ]

false

true

false

let rec eval_codes (l: codes) (fuel: nat) (s: state) : Tot (option state) (decreases %[fuel;l]) =

match l with | [] -> Some s | c :: tl -> let s_opt = eval_code c fuel s in if None? s_opt then None else eval_codes tl fuel (Some?.v s_opt)

false

Hacl.Impl.SecretBox.fst

Hacl.Impl.SecretBox.secretbox_open_detached_plain

val secretbox_open_detached_plain: mlen:size_t -> m:lbuffer uint8 mlen -> xkeys:lbuffer uint8 96ul -> n:lbuffer uint8 24ul -> c:lbuffer uint8 mlen -> Stack unit (requires fun h -> live h c /\ live h m /\ live h xkeys /\ live h n /\ disjoint m n /\ disjoint c n /\ eq_or_disjoint m c /\ disjoint xkeys m /\ disjoint xkeys c) (ensures fun h0 r h1 -> modifies (loc m) h0 h1 /\ (let subkey = LSeq.sub (as_seq h0 xkeys) 0 32 in let ekey0 = LSeq.sub (as_seq h0 xkeys) 64 32 in let n1 = LSeq.sub (as_seq h0 n) 16 8 in let clen0 = Spec.get_len0 (v mlen) in let clen1 = v mlen - clen0 in let c0 = LSeq.sub (as_seq h0 c) 0 clen0 in let c1 = LSeq.sub (as_seq h0 c) clen0 clen1 in let block0 = LSeq.create 32 (u8 0) in let block0 = LSeq.update_sub block0 0 clen0 c0 in let block0 = LSeq.map2 (^.) block0 ekey0 in let m0 = LSeq.sub block0 0 clen0 in let m1 = Spec.Salsa20.salsa20_decrypt_bytes subkey n1 1 c1 in let msg = Seq.append m0 m1 in as_seq h1 m == msg))

let secretbox_open_detached_plain mlen m xkeys n c = push_frame (); let subkey = sub xkeys 0ul 32ul in let ekey0 = sub xkeys 64ul 32ul in let n1 = sub n 16ul 8ul in let mlen0 = get_len0 mlen in let mlen1 = mlen -! mlen0 in let c0 = sub c 0ul mlen0 in let c1 = sub c mlen0 mlen1 in let block0 = create 32ul (u8 0) in update_sub block0 0ul mlen0 c0; map2T 32ul block0 ( ^. ) block0 ekey0; let m0 = sub m 0ul mlen0 in let m1 = sub m mlen0 mlen1 in copy m0 (sub block0 0ul mlen0); salsa20_decrypt mlen1 m1 c1 subkey n1 1ul; let h1 = ST.get () in FStar.Seq.Properties.lemma_split (as_seq h1 m) (v mlen0); pop_frame ()

{ "file_name": "code/nacl-box/Hacl.Impl.SecretBox.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 14, "end_line": 189, "start_col": 0, "start_line": 168 }

module Hacl.Impl.SecretBox open FStar.HyperStack.All open FStar.HyperStack open FStar.Mul open Lib.IntTypes open Lib.Buffer open Lib.ByteBuffer open Hacl.Salsa20 open Hacl.Poly1305_32 module ST = FStar.HyperStack.ST module Spec = Spec.SecretBox module LSeq = Lib.Sequence #set-options "--z3rlimit 50 --max_fuel 0 --max_ifuel 0" val secretbox_init: xkeys:lbuffer uint8 96ul -> k:lbuffer uint8 32ul -> n:lbuffer uint8 24ul -> Stack unit (requires fun h -> live h xkeys /\ live h k /\ live h n /\ disjoint k xkeys /\ disjoint n xkeys) (ensures fun h0 _ h1 -> modifies (loc xkeys) h0 h1 /\ (let xkeys = as_seq h1 xkeys in let subkey : Spec.key = LSeq.sub xkeys 0 32 in let aekey : Spec.aekey = LSeq.sub xkeys 32 64 in (subkey, aekey) == Spec.secretbox_init (as_seq h0 k) (as_seq h0 n))) let secretbox_init xkeys k n = let h0 = ST.get() in let subkey = sub xkeys 0ul 32ul in let aekey = sub xkeys 32ul 64ul in let n0 = sub n 0ul 16ul in let n1 = sub n 16ul 8ul in hsalsa20 subkey k n0; salsa20_key_block0 aekey subkey n1 inline_for_extraction noextract let get_len0 (len:size_t) : Tot (r:size_t{v r <= 32 /\ v r == Spec.get_len0 (v len)}) = if len <=. 32ul then len else 32ul #set-options "--z3rlimit 100" inline_for_extraction noextract val secretbox_detached_cipher: mlen:size_t -> c:lbuffer uint8 mlen -> k:lbuffer uint8 32ul -> xkeys:lbuffer uint8 96ul -> n:lbuffer uint8 24ul -> m:lbuffer uint8 mlen -> Stack unit (requires fun h -> live h c /\ live h m /\ live h xkeys /\ live h n /\ live h k /\ eq_or_disjoint m c /\ disjoint xkeys c /\ disjoint xkeys m /\ disjoint n m /\ disjoint n c /\ (let subkey : Spec.key = LSeq.sub (as_seq h xkeys) 0 32 in let aekey : Spec.aekey = LSeq.sub (as_seq h xkeys) 32 64 in (subkey, aekey) == Spec.secretbox_init (as_seq h k) (as_seq h n))) (ensures fun h0 _ h1 -> modifies (loc c) h0 h1 /\ (let (tag, cipher) = Spec.secretbox_detached (as_seq h0 k) (as_seq h0 n) (as_seq h0 m) in as_seq h1 c == cipher)) let secretbox_detached_cipher mlen c k xkeys n m = let h0 = ST.get () in push_frame (); let n1 = sub n 16ul 8ul in let subkey = sub xkeys 0ul 32ul in let mkey = sub xkeys 32ul 32ul in let ekey0 = sub xkeys 64ul 32ul in let mlen0 = get_len0 mlen in let mlen1 = mlen -! mlen0 in let m0 = sub m 0ul mlen0 in let m1 = sub m mlen0 mlen1 in let block0 = create 32ul (u8 0) in update_sub block0 0ul mlen0 m0; map2T 32ul block0 ( ^. ) block0 ekey0; let c0 = sub c 0ul mlen0 in let c1 = sub c mlen0 mlen1 in let h1 = ST.get () in copy c0 (sub block0 0ul mlen0); let h2 = ST.get () in //assert (as_seq h2 c0 == LSeq.sub (as_seq h1 block0) 0 (v mlen0)); salsa20_encrypt mlen1 c1 m1 subkey n1 1ul; let h3 = ST.get () in //assert (as_seq h3 c1 == Spec.Salsa20.salsa20_encrypt_bytes (as_seq h2 subkey) (as_seq h2 n1) 1 (as_seq h2 m1)); FStar.Seq.Properties.lemma_split (as_seq h3 c) (v mlen0); //FStar.Seq.Properties.lemma_split (Seq.append (as_seq h2 c0) (as_seq h3 c1)) (v mlen0); assert (as_seq h3 c == Seq.append (as_seq h2 c0) (as_seq h3 c1)); assert ( let (tag, cipher) = Spec.secretbox_detached (as_seq h0 k) (as_seq h0 n) (as_seq h0 m) in as_seq h3 c == cipher); pop_frame () val secretbox_detached: mlen:size_t -> c:lbuffer uint8 mlen -> tag:lbuffer uint8 16ul -> k:lbuffer uint8 32ul -> n:lbuffer uint8 24ul -> m:lbuffer uint8 mlen -> Stack unit (requires fun h -> live h c /\ live h m /\ live h k /\ live h n /\ live h tag /\ disjoint tag c /\ disjoint tag m /\ eq_or_disjoint m c /\ disjoint n m /\ disjoint n c) (ensures fun h0 _ h1 -> modifies (loc c |+| loc tag) h0 h1 /\ (as_seq h1 tag, as_seq h1 c) == Spec.secretbox_detached (as_seq h0 k) (as_seq h0 n) (as_seq h0 m)) let secretbox_detached mlen c tag k n m = let h0 = ST.get () in push_frame(); let xkeys = create 96ul (u8 0) in secretbox_init xkeys k n; let mkey = sub xkeys 32ul 32ul in secretbox_detached_cipher mlen c k xkeys n m; Hacl.Streaming.Poly1305_32.mac tag c mlen mkey; let h1 = ST.get () in assert ( let (tag1, cipher) = Spec.secretbox_detached (as_seq h0 k) (as_seq h0 n) (as_seq h0 m) in (as_seq h1 tag, as_seq h1 c) == (tag1, cipher)); pop_frame() inline_for_extraction noextract val secretbox_open_detached_plain: mlen:size_t -> m:lbuffer uint8 mlen -> xkeys:lbuffer uint8 96ul -> n:lbuffer uint8 24ul -> c:lbuffer uint8 mlen -> Stack unit (requires fun h -> live h c /\ live h m /\ live h xkeys /\ live h n /\ disjoint m n /\ disjoint c n /\ eq_or_disjoint m c /\ disjoint xkeys m /\ disjoint xkeys c) (ensures fun h0 r h1 -> modifies (loc m) h0 h1 /\ (let subkey = LSeq.sub (as_seq h0 xkeys) 0 32 in let ekey0 = LSeq.sub (as_seq h0 xkeys) 64 32 in let n1 = LSeq.sub (as_seq h0 n) 16 8 in let clen0 = Spec.get_len0 (v mlen) in let clen1 = v mlen - clen0 in let c0 = LSeq.sub (as_seq h0 c) 0 clen0 in let c1 = LSeq.sub (as_seq h0 c) clen0 clen1 in let block0 = LSeq.create 32 (u8 0) in let block0 = LSeq.update_sub block0 0 clen0 c0 in let block0 = LSeq.map2 (^.) block0 ekey0 in let m0 = LSeq.sub block0 0 clen0 in let m1 = Spec.Salsa20.salsa20_decrypt_bytes subkey n1 1 c1 in let msg = Seq.append m0 m1 in as_seq h1 m == msg))

{ "checked_file": "/", "dependencies": [ "Spec.SecretBox.fst.checked", "Spec.Salsa20.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteBuffer.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Streaming.Poly1305_32.fsti.checked", "Hacl.Salsa20.fst.checked", "Hacl.Poly1305_32.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Seq.Properties.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.SecretBox.fst" }

[ { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "Spec.SecretBox", "short_module": "Spec" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": false, "full_module": "Hacl.Poly1305_32", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Salsa20", "short_module": null }, { "abbrev": false, "full_module": "Lib.ByteBuffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

mlen: Lib.IntTypes.size_t -> m: Lib.Buffer.lbuffer Lib.IntTypes.uint8 mlen -> xkeys: Lib.Buffer.lbuffer Lib.IntTypes.uint8 96ul -> n: Lib.Buffer.lbuffer Lib.IntTypes.uint8 24ul -> c: Lib.Buffer.lbuffer Lib.IntTypes.uint8 mlen -> FStar.HyperStack.ST.Stack Prims.unit

FStar.HyperStack.ST.Stack

[]

[ "Lib.IntTypes.size_t", "Lib.Buffer.lbuffer", "Lib.IntTypes.uint8", "FStar.UInt32.__uint_to_t", "FStar.HyperStack.ST.pop_frame", "Prims.unit", "FStar.Seq.Properties.lemma_split", "Lib.Buffer.as_seq", "Lib.Buffer.MUT", "Lib.IntTypes.v", "Lib.IntTypes.U32", "Lib.IntTypes.PUB", "FStar.Monotonic.HyperStack.mem", "FStar.HyperStack.ST.get", "Hacl.Salsa20.salsa20_decrypt", "Lib.Buffer.copy", "Lib.Buffer.lbuffer_t", "Lib.IntTypes.int_t", "Lib.IntTypes.U8", "Lib.IntTypes.SEC", "Lib.Buffer.sub", "Lib.Buffer.map2T", "Lib.IntTypes.op_Hat_Dot", "Lib.Buffer.update_sub", "FStar.UInt32.uint_to_t", "FStar.UInt32.t", "Lib.Buffer.create", "Lib.IntTypes.u8", "Lib.IntTypes.op_Subtraction_Bang", "Prims.l_and", "Prims.b2t", "Prims.op_LessThanOrEqual", "Prims.eq2", "Prims.int", "Prims.l_or", "Lib.IntTypes.range", "Prims.op_GreaterThanOrEqual", "Prims.op_Subtraction", "Prims.pow2", "Spec.SecretBox.get_len0", "Hacl.Impl.SecretBox.get_len0", "FStar.HyperStack.ST.push_frame" ]

[]

false

true

false

let secretbox_open_detached_plain mlen m xkeys n c =

push_frame (); let subkey = sub xkeys 0ul 32ul in let ekey0 = sub xkeys 64ul 32ul in let n1 = sub n 16ul 8ul in let mlen0 = get_len0 mlen in let mlen1 = mlen -! mlen0 in let c0 = sub c 0ul mlen0 in let c1 = sub c mlen0 mlen1 in let block0 = create 32ul (u8 0) in update_sub block0 0ul mlen0 c0; map2T 32ul block0 ( ^. ) block0 ekey0; let m0 = sub m 0ul mlen0 in let m1 = sub m mlen0 mlen1 in copy m0 (sub block0 0ul mlen0); salsa20_decrypt mlen1 m1 c1 subkey n1 1ul; let h1 = ST.get () in FStar.Seq.Properties.lemma_split (as_seq h1 m) (v mlen0); pop_frame ()

false

Hacl.Impl.SecretBox.fst

Hacl.Impl.SecretBox.secretbox_detached

val secretbox_detached: mlen:size_t -> c:lbuffer uint8 mlen -> tag:lbuffer uint8 16ul -> k:lbuffer uint8 32ul -> n:lbuffer uint8 24ul -> m:lbuffer uint8 mlen -> Stack unit (requires fun h -> live h c /\ live h m /\ live h k /\ live h n /\ live h tag /\ disjoint tag c /\ disjoint tag m /\ eq_or_disjoint m c /\ disjoint n m /\ disjoint n c) (ensures fun h0 _ h1 -> modifies (loc c |+| loc tag) h0 h1 /\ (as_seq h1 tag, as_seq h1 c) == Spec.secretbox_detached (as_seq h0 k) (as_seq h0 n) (as_seq h0 m))

let secretbox_detached mlen c tag k n m = let h0 = ST.get () in push_frame(); let xkeys = create 96ul (u8 0) in secretbox_init xkeys k n; let mkey = sub xkeys 32ul 32ul in secretbox_detached_cipher mlen c k xkeys n m; Hacl.Streaming.Poly1305_32.mac tag c mlen mkey; let h1 = ST.get () in assert ( let (tag1, cipher) = Spec.secretbox_detached (as_seq h0 k) (as_seq h0 n) (as_seq h0 m) in (as_seq h1 tag, as_seq h1 c) == (tag1, cipher)); pop_frame()

{ "file_name": "code/nacl-box/Hacl.Impl.SecretBox.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 13, "end_line": 135, "start_col": 0, "start_line": 123 }

module Hacl.Impl.SecretBox open FStar.HyperStack.All open FStar.HyperStack open FStar.Mul open Lib.IntTypes open Lib.Buffer open Lib.ByteBuffer open Hacl.Salsa20 open Hacl.Poly1305_32 module ST = FStar.HyperStack.ST module Spec = Spec.SecretBox module LSeq = Lib.Sequence #set-options "--z3rlimit 50 --max_fuel 0 --max_ifuel 0" val secretbox_init: xkeys:lbuffer uint8 96ul -> k:lbuffer uint8 32ul -> n:lbuffer uint8 24ul -> Stack unit (requires fun h -> live h xkeys /\ live h k /\ live h n /\ disjoint k xkeys /\ disjoint n xkeys) (ensures fun h0 _ h1 -> modifies (loc xkeys) h0 h1 /\ (let xkeys = as_seq h1 xkeys in let subkey : Spec.key = LSeq.sub xkeys 0 32 in let aekey : Spec.aekey = LSeq.sub xkeys 32 64 in (subkey, aekey) == Spec.secretbox_init (as_seq h0 k) (as_seq h0 n))) let secretbox_init xkeys k n = let h0 = ST.get() in let subkey = sub xkeys 0ul 32ul in let aekey = sub xkeys 32ul 64ul in let n0 = sub n 0ul 16ul in let n1 = sub n 16ul 8ul in hsalsa20 subkey k n0; salsa20_key_block0 aekey subkey n1 inline_for_extraction noextract let get_len0 (len:size_t) : Tot (r:size_t{v r <= 32 /\ v r == Spec.get_len0 (v len)}) = if len <=. 32ul then len else 32ul #set-options "--z3rlimit 100" inline_for_extraction noextract val secretbox_detached_cipher: mlen:size_t -> c:lbuffer uint8 mlen -> k:lbuffer uint8 32ul -> xkeys:lbuffer uint8 96ul -> n:lbuffer uint8 24ul -> m:lbuffer uint8 mlen -> Stack unit (requires fun h -> live h c /\ live h m /\ live h xkeys /\ live h n /\ live h k /\ eq_or_disjoint m c /\ disjoint xkeys c /\ disjoint xkeys m /\ disjoint n m /\ disjoint n c /\ (let subkey : Spec.key = LSeq.sub (as_seq h xkeys) 0 32 in let aekey : Spec.aekey = LSeq.sub (as_seq h xkeys) 32 64 in (subkey, aekey) == Spec.secretbox_init (as_seq h k) (as_seq h n))) (ensures fun h0 _ h1 -> modifies (loc c) h0 h1 /\ (let (tag, cipher) = Spec.secretbox_detached (as_seq h0 k) (as_seq h0 n) (as_seq h0 m) in as_seq h1 c == cipher)) let secretbox_detached_cipher mlen c k xkeys n m = let h0 = ST.get () in push_frame (); let n1 = sub n 16ul 8ul in let subkey = sub xkeys 0ul 32ul in let mkey = sub xkeys 32ul 32ul in let ekey0 = sub xkeys 64ul 32ul in let mlen0 = get_len0 mlen in let mlen1 = mlen -! mlen0 in let m0 = sub m 0ul mlen0 in let m1 = sub m mlen0 mlen1 in let block0 = create 32ul (u8 0) in update_sub block0 0ul mlen0 m0; map2T 32ul block0 ( ^. ) block0 ekey0; let c0 = sub c 0ul mlen0 in let c1 = sub c mlen0 mlen1 in let h1 = ST.get () in copy c0 (sub block0 0ul mlen0); let h2 = ST.get () in //assert (as_seq h2 c0 == LSeq.sub (as_seq h1 block0) 0 (v mlen0)); salsa20_encrypt mlen1 c1 m1 subkey n1 1ul; let h3 = ST.get () in //assert (as_seq h3 c1 == Spec.Salsa20.salsa20_encrypt_bytes (as_seq h2 subkey) (as_seq h2 n1) 1 (as_seq h2 m1)); FStar.Seq.Properties.lemma_split (as_seq h3 c) (v mlen0); //FStar.Seq.Properties.lemma_split (Seq.append (as_seq h2 c0) (as_seq h3 c1)) (v mlen0); assert (as_seq h3 c == Seq.append (as_seq h2 c0) (as_seq h3 c1)); assert ( let (tag, cipher) = Spec.secretbox_detached (as_seq h0 k) (as_seq h0 n) (as_seq h0 m) in as_seq h3 c == cipher); pop_frame () val secretbox_detached: mlen:size_t -> c:lbuffer uint8 mlen -> tag:lbuffer uint8 16ul -> k:lbuffer uint8 32ul -> n:lbuffer uint8 24ul -> m:lbuffer uint8 mlen -> Stack unit (requires fun h -> live h c /\ live h m /\ live h k /\ live h n /\ live h tag /\ disjoint tag c /\ disjoint tag m /\ eq_or_disjoint m c /\ disjoint n m /\ disjoint n c) (ensures fun h0 _ h1 -> modifies (loc c |+| loc tag) h0 h1 /\ (as_seq h1 tag, as_seq h1 c) == Spec.secretbox_detached (as_seq h0 k) (as_seq h0 n) (as_seq h0 m))

{ "checked_file": "/", "dependencies": [ "Spec.SecretBox.fst.checked", "Spec.Salsa20.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteBuffer.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Streaming.Poly1305_32.fsti.checked", "Hacl.Salsa20.fst.checked", "Hacl.Poly1305_32.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Seq.Properties.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.SecretBox.fst" }

[ { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "Spec.SecretBox", "short_module": "Spec" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": false, "full_module": "Hacl.Poly1305_32", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Salsa20", "short_module": null }, { "abbrev": false, "full_module": "Lib.ByteBuffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

mlen: Lib.IntTypes.size_t -> c: Lib.Buffer.lbuffer Lib.IntTypes.uint8 mlen -> tag: Lib.Buffer.lbuffer Lib.IntTypes.uint8 16ul -> k: Lib.Buffer.lbuffer Lib.IntTypes.uint8 32ul -> n: Lib.Buffer.lbuffer Lib.IntTypes.uint8 24ul -> m: Lib.Buffer.lbuffer Lib.IntTypes.uint8 mlen -> FStar.HyperStack.ST.Stack Prims.unit

FStar.HyperStack.ST.Stack

[]

[ "Lib.IntTypes.size_t", "Lib.Buffer.lbuffer", "Lib.IntTypes.uint8", "FStar.UInt32.__uint_to_t", "FStar.HyperStack.ST.pop_frame", "Prims.unit", "Prims._assert", "Spec.SecretBox.tag", "Lib.ByteSequence.bytes", "Prims.b2t", "Prims.op_Equality", "Prims.nat", "Lib.Sequence.length", "Lib.IntTypes.uint_t", "Lib.IntTypes.U8", "Lib.IntTypes.SEC", "Lib.Buffer.as_seq", "Lib.Buffer.MUT", "Prims.eq2", "FStar.Pervasives.Native.tuple2", "Lib.Sequence.lseq", "Lib.IntTypes.v", "Lib.IntTypes.U32", "Lib.IntTypes.PUB", "Lib.Sequence.seq", "Prims.l_or", "FStar.Seq.Base.length", "FStar.Pervasives.Native.Mktuple2", "Lib.IntTypes.int_t", "Spec.SecretBox.secretbox_detached", "FStar.Monotonic.HyperStack.mem", "FStar.HyperStack.ST.get", "Hacl.Streaming.Poly1305_32.mac", "Hacl.Impl.SecretBox.secretbox_detached_cipher", "Lib.Buffer.lbuffer_t", "FStar.UInt32.uint_to_t", "FStar.UInt32.t", "Lib.Buffer.sub", "Hacl.Impl.SecretBox.secretbox_init", "Lib.Buffer.create", "Lib.IntTypes.u8", "FStar.HyperStack.ST.push_frame" ]

[]

false

true

false

let secretbox_detached mlen c tag k n m =

let h0 = ST.get () in push_frame (); let xkeys = create 96ul (u8 0) in secretbox_init xkeys k n; let mkey = sub xkeys 32ul 32ul in secretbox_detached_cipher mlen c k xkeys n m; Hacl.Streaming.Poly1305_32.mac tag c mlen mkey; let h1 = ST.get () in assert (let tag1, cipher = Spec.secretbox_detached (as_seq h0 k) (as_seq h0 n) (as_seq h0 m) in (as_seq h1 tag, as_seq h1 c) == (tag1, cipher)); pop_frame ()

false

Vale.Lib.Set.fst

Vale.Lib.Set.remove_between'

val remove_between' (s: _) (start: int) (finish: int{start <= finish}) : Tot (s': S.set int { forall i. ((start <= i /\ i < finish) ==> not (S.mem i s')) /\ ((i < start \/ finish <= i) ==> S.mem i s' = S.mem i s) }) (decreases %[finish - start])

let rec remove_between' s (start:int) (finish:int{start <= finish}) : Tot (s':S.set int{ forall i. ((start <= i /\ i < finish) ==> not (S.mem i s')) /\ ((i < start \/ finish <= i) ==> S.mem i s' = S.mem i s)}) (decreases %[finish - start]) = if finish = start then s else remove_between' (S.intersect s (S.complement (S.singleton start))) (start + 1) finish

{ "file_name": "vale/specs/defs/Vale.Lib.Set.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 92, "end_line": 11, "start_col": 0, "start_line": 6 }

module Vale.Lib.Set open FStar.Mul friend FStar.Map

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fst.checked" ], "interface_file": true, "source_file": "Vale.Lib.Set.fst" }

[ { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": true, "full_module": "FStar.Map", "short_module": "M" }, { "abbrev": true, "full_module": "FStar.Set", "short_module": "S" }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Lib", "short_module": null }, { "abbrev": false, "full_module": "Vale.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

s: FStar.Set.set Prims.int -> start: Prims.int -> finish: Prims.int{start <= finish} -> Prims.Tot (s': FStar.Set.set Prims.int { forall (i: Prims.int). (start <= i /\ i < finish ==> Prims.op_Negation (FStar.Set.mem i s')) /\ (i < start \/ finish <= i ==> FStar.Set.mem i s' = FStar.Set.mem i s) })

Prims.Tot

[ "total", "" ]

[]

[ "FStar.Set.set", "Prims.int", "Prims.b2t", "Prims.op_LessThanOrEqual", "Prims.op_Equality", "Prims.bool", "Vale.Lib.Set.remove_between'", "FStar.Set.intersect", "FStar.Set.complement", "FStar.Set.singleton", "Prims.op_Addition", "Prims.l_Forall", "Prims.l_and", "Prims.l_imp", "Prims.op_LessThan", "Prims.op_Negation", "FStar.Set.mem", "Prims.l_or" ]

[ "recursion" ]

false

let rec remove_between' s (start: int) (finish: int{start <= finish}) : Tot (s': S.set int { forall i. ((start <= i /\ i < finish) ==> not (S.mem i s')) /\ ((i < start \/ finish <= i) ==> S.mem i s' = S.mem i s) }) (decreases %[finish - start]) =

if finish = start then s else remove_between' (S.intersect s (S.complement (S.singleton start))) (start + 1) finish

false

Vale.Lib.Set.fst

Vale.Lib.Set.remove_between

val remove_between (s:S.set int) (start:int) (finish:int): S.set int

let remove_between s start finish = if finish <= start then s else remove_between' s start finish

{ "file_name": "vale/specs/defs/Vale.Lib.Set.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 37, "end_line": 15, "start_col": 0, "start_line": 13 }

module Vale.Lib.Set open FStar.Mul friend FStar.Map let rec remove_between' s (start:int) (finish:int{start <= finish}) : Tot (s':S.set int{ forall i. ((start <= i /\ i < finish) ==> not (S.mem i s')) /\ ((i < start \/ finish <= i) ==> S.mem i s' = S.mem i s)}) (decreases %[finish - start]) = if finish = start then s else remove_between' (S.intersect s (S.complement (S.singleton start))) (start + 1) finish

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Map.fst.checked" ], "interface_file": true, "source_file": "Vale.Lib.Set.fst" }

[ { "abbrev": true, "full_module": "FStar.Map", "short_module": "M" }, { "abbrev": true, "full_module": "FStar.Set", "short_module": "S" }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.Lib", "short_module": null }, { "abbrev": false, "full_module": "Vale.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

s: FStar.Set.set Prims.int -> start: Prims.int -> finish: Prims.int -> FStar.Set.set Prims.int

Prims.Tot

[ "total" ]

[]

[ "FStar.Set.set", "Prims.int", "Prims.op_LessThanOrEqual", "Prims.bool", "Vale.Lib.Set.remove_between'" ]

[]

false

true

false

let remove_between s start finish =

if finish <= start then s else remove_between' s start finish

false

LowParse.Tot.BoundedInt.fst

LowParse.Tot.BoundedInt.parse_bounded_integer

val parse_bounded_integer (i: integer_size) : Tot (parser (parse_bounded_integer_kind i) (bounded_integer i))

let parse_bounded_integer i = Classical.forall_intro (parse_bounded_integer_spec i); parser_kind_prop_ext (parse_bounded_integer_kind i) (parse_bounded_integer i) (parse_bounded_integer_bare i); parse_bounded_integer_bare i

{ "file_name": "src/lowparse/LowParse.Tot.BoundedInt.fst", "git_rev": "00217c4a89f5ba56002ba9aa5b4a9d5903bfe9fa", "git_url": "https://github.com/project-everest/everparse.git", "project_name": "everparse" }

{ "end_col": 30, "end_line": 33, "start_col": 0, "start_line": 25 }

module LowParse.Tot.BoundedInt include LowParse.Spec.BoundedInt include LowParse.Tot.Int module E = FStar.Endianness module U32 = FStar.UInt32 let parse_bounded_integer_bare (i: integer_size) : Tot (bare_parser (bounded_integer i)) = fun input -> parse_bounded_integer_spec i input; if Seq.length input < i then None else let input' = Seq.slice input 0 i in let _ = E.lemma_be_to_n_is_bounded input' in let y = U32.uint_to_t (E.be_to_n input') in Some (y, i) val parse_bounded_integer (i: integer_size) : Tot (parser (parse_bounded_integer_kind i) (bounded_integer i))

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowParse.Tot.Int.fst.checked", "LowParse.Spec.BoundedInt.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Endianness.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowParse.Tot.BoundedInt.fst" }

[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "FStar.Endianness", "short_module": "E" }, { "abbrev": false, "full_module": "LowParse.Tot.Int", "short_module": null }, { "abbrev": false, "full_module": "LowParse.Spec.BoundedInt", "short_module": null }, { "abbrev": false, "full_module": "LowParse.Tot", "short_module": null }, { "abbrev": false, "full_module": "LowParse.Tot", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

i: LowParse.Spec.BoundedInt.integer_size -> LowParse.Tot.Base.parser (LowParse.Spec.BoundedInt.parse_bounded_integer_kind i) (LowParse.Spec.BoundedInt.bounded_integer i)

Prims.Tot

[ "total" ]

[]

[ "LowParse.Spec.BoundedInt.integer_size", "LowParse.Tot.BoundedInt.parse_bounded_integer_bare", "Prims.unit", "LowParse.Spec.Base.parser_kind_prop_ext", "LowParse.Spec.BoundedInt.bounded_integer", "LowParse.Spec.BoundedInt.parse_bounded_integer_kind", "LowParse.Spec.BoundedInt.parse_bounded_integer", "FStar.Classical.forall_intro", "LowParse.Bytes.bytes", "Prims.op_LessThan", "FStar.Seq.Base.length", "LowParse.Bytes.byte", "Prims.eq2", "FStar.Pervasives.Native.option", "FStar.Pervasives.Native.tuple2", "LowParse.Spec.Base.consumed_length", "LowParse.Spec.Base.parse", "FStar.Pervasives.Native.None", "Prims.bool", "Prims.l_False", "Prims.l_and", "Prims.int", "Prims.l_or", "FStar.UInt.size", "FStar.UInt32.n", "Prims.b2t", "Prims.op_GreaterThanOrEqual", "FStar.UInt32.v", "FStar.Endianness.be_to_n", "FStar.Seq.Base.slice", "Prims.nat", "Prims.op_LessThanOrEqual", "LowParse.Spec.BoundedInt.parse_bounded_integer_spec", "LowParse.Tot.Base.parser" ]

[]

false

let parse_bounded_integer i =

Classical.forall_intro (parse_bounded_integer_spec i); parser_kind_prop_ext (parse_bounded_integer_kind i) (parse_bounded_integer i) (parse_bounded_integer_bare i); parse_bounded_integer_bare i

false

LowParse.Tot.BoundedInt.fst

LowParse.Tot.BoundedInt.parse_bounded_integer_bare

val parse_bounded_integer_bare (i: integer_size) : Tot (bare_parser (bounded_integer i))

let parse_bounded_integer_bare (i: integer_size) : Tot (bare_parser (bounded_integer i)) = fun input -> parse_bounded_integer_spec i input; if Seq.length input < i then None else let input' = Seq.slice input 0 i in let _ = E.lemma_be_to_n_is_bounded input' in let y = U32.uint_to_t (E.be_to_n input') in Some (y, i)

{ "file_name": "src/lowparse/LowParse.Tot.BoundedInt.fst", "git_rev": "00217c4a89f5ba56002ba9aa5b4a9d5903bfe9fa", "git_url": "https://github.com/project-everest/everparse.git", "project_name": "everparse" }

{ "end_col": 15, "end_line": 19, "start_col": 0, "start_line": 8 }

module LowParse.Tot.BoundedInt include LowParse.Spec.BoundedInt include LowParse.Tot.Int module E = FStar.Endianness module U32 = FStar.UInt32

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowParse.Tot.Int.fst.checked", "LowParse.Spec.BoundedInt.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Endianness.fsti.checked", "FStar.Classical.fsti.checked" ], "interface_file": false, "source_file": "LowParse.Tot.BoundedInt.fst" }

[ { "abbrev": true, "full_module": "FStar.UInt32", "short_module": "U32" }, { "abbrev": true, "full_module": "FStar.Endianness", "short_module": "E" }, { "abbrev": false, "full_module": "LowParse.Tot.Int", "short_module": null }, { "abbrev": false, "full_module": "LowParse.Spec.BoundedInt", "short_module": null }, { "abbrev": false, "full_module": "LowParse.Tot", "short_module": null }, { "abbrev": false, "full_module": "LowParse.Tot", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

i: LowParse.Spec.BoundedInt.integer_size -> LowParse.Tot.Base.bare_parser (LowParse.Spec.BoundedInt.bounded_integer i)

Prims.Tot

[ "total" ]

[]

[ "LowParse.Spec.BoundedInt.integer_size", "LowParse.Bytes.bytes", "Prims.op_LessThan", "FStar.Seq.Base.length", "LowParse.Bytes.byte", "FStar.Pervasives.Native.None", "FStar.Pervasives.Native.tuple2", "LowParse.Spec.BoundedInt.bounded_integer", "LowParse.Spec.Base.consumed_length", "Prims.bool", "FStar.Pervasives.Native.Some", "FStar.Pervasives.Native.Mktuple2", "FStar.UInt32.t", "FStar.UInt32.uint_to_t", "FStar.Endianness.be_to_n", "Prims.unit", "FStar.Endianness.lemma_be_to_n_is_bounded", "FStar.Seq.Base.seq", "FStar.Seq.Base.slice", "FStar.Pervasives.Native.option", "LowParse.Spec.BoundedInt.parse_bounded_integer_spec", "LowParse.Tot.Base.bare_parser" ]

[]

false

let parse_bounded_integer_bare (i: integer_size) : Tot (bare_parser (bounded_integer i)) =

fun input -> parse_bounded_integer_spec i input; if Seq.length input < i then None else let input' = Seq.slice input 0 i in let _ = E.lemma_be_to_n_is_bounded input' in let y = U32.uint_to_t (E.be_to_n input') in Some (y, i)

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.felem

val felem : Type0

let felem = lbuffer uint64 5ul

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 30, "end_line": 25, "start_col": 0, "start_line": 25 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20"

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Type0

Prims.Tot

[ "total" ]

[]

[ "Lib.Buffer.lbuffer", "Lib.IntTypes.uint64", "FStar.UInt32.__uint_to_t" ]

[]

false

true

let felem =

lbuffer uint64 5ul

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.felem_wide

val felem_wide : Type0

let felem_wide = lbuffer uint128 5ul

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 36, "end_line": 27, "start_col": 0, "start_line": 27 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Type0

Prims.Tot

[ "total" ]

[]

[ "Lib.Buffer.lbuffer", "Lib.IntTypes.uint128", "FStar.UInt32.__uint_to_t" ]

[]

false

true

let felem_wide =

lbuffer uint128 5ul

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.as_nat

val as_nat : h: FStar.Monotonic.HyperStack.mem -> e: Hacl.Impl.Curve25519.Fields.Core.felem Hacl.Impl.Curve25519.Fields.Core.M51 -> Prims.GTot Prims.nat

let as_nat = C.f51_as_nat

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 25, "end_line": 30, "start_col": 0, "start_line": 30 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

h: FStar.Monotonic.HyperStack.mem -> e: Hacl.Impl.Curve25519.Fields.Core.felem Hacl.Impl.Curve25519.Fields.Core.M51 -> Prims.GTot Prims.nat

Prims.GTot

[ "sometrivial" ]

[]

[ "Hacl.Impl.Curve25519.Fields.Core.f51_as_nat" ]

[]

false

let as_nat =

C.f51_as_nat

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.felem2

val felem2 : Type0

let felem2 = lbuffer uint64 10ul

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 32, "end_line": 26, "start_col": 0, "start_line": 26 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20"

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Type0

Prims.Tot

[ "total" ]

[]

[ "Lib.Buffer.lbuffer", "Lib.IntTypes.uint64", "FStar.UInt32.__uint_to_t" ]

[]

false

true

let felem2 =

lbuffer uint64 10ul

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.felem_fits

val felem_fits : h: FStar.Monotonic.HyperStack.mem -> f: Hacl.Impl.Curve25519.Fields.Core.felem Hacl.Impl.Curve25519.Fields.Core.M51 -> m: Hacl.Spec.Curve25519.Field51.Definition.scale64_5 -> Type0

let felem_fits = C.f51_felem_fits

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 18, "end_line": 53, "start_col": 0, "start_line": 52 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem let feval_wideh h f = (wide_as_nat h f) % P.prime

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

h: FStar.Monotonic.HyperStack.mem -> f: Hacl.Impl.Curve25519.Fields.Core.felem Hacl.Impl.Curve25519.Fields.Core.M51 -> m: Hacl.Spec.Curve25519.Field51.Definition.scale64_5 -> Type0

Prims.Tot

[ "total" ]

[]

[ "Hacl.Impl.Curve25519.Fields.Core.f51_felem_fits" ]

[]

false

true

let felem_fits =

C.f51_felem_fits

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.mul_inv_t

val mul_inv_t : h: FStar.Monotonic.HyperStack.mem -> f: Hacl.Impl.Curve25519.Fields.Core.felem Hacl.Impl.Curve25519.Fields.Core.M51 -> Prims.GTot Type0

let mul_inv_t = C.f51_mul_inv_t

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 17, "end_line": 72, "start_col": 0, "start_line": 71 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem let feval_wideh h f = (wide_as_nat h f) % P.prime noextract let felem_fits = C.f51_felem_fits noextract val felem_wide_fits: h:mem -> f:felem_wide -> m:S.scale128_5 -> Type0 let felem_wide_fits h f m = let s = as_seq h f in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.felem_wide_fits5 (s0, s1, s2, s3, s4) m noextract let as_felem = C.f51_as_felem

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

h: FStar.Monotonic.HyperStack.mem -> f: Hacl.Impl.Curve25519.Fields.Core.felem Hacl.Impl.Curve25519.Fields.Core.M51 -> Prims.GTot Type0

Prims.GTot

[ "sometrivial" ]

[]

[ "Hacl.Impl.Curve25519.Fields.Core.f51_mul_inv_t" ]

[]

false

true

let mul_inv_t =

C.f51_mul_inv_t

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.as_felem

val as_felem : h: FStar.Monotonic.HyperStack.mem -> f: Hacl.Impl.Curve25519.Fields.Core.felem Hacl.Impl.Curve25519.Fields.Core.M51 -> Prims.GTot Hacl.Spec.Curve25519.Field51.Definition.felem5

let as_felem = C.f51_as_felem

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 16, "end_line": 68, "start_col": 0, "start_line": 67 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem let feval_wideh h f = (wide_as_nat h f) % P.prime noextract let felem_fits = C.f51_felem_fits noextract val felem_wide_fits: h:mem -> f:felem_wide -> m:S.scale128_5 -> Type0 let felem_wide_fits h f m = let s = as_seq h f in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.felem_wide_fits5 (s0, s1, s2, s3, s4) m

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

h: FStar.Monotonic.HyperStack.mem -> f: Hacl.Impl.Curve25519.Fields.Core.felem Hacl.Impl.Curve25519.Fields.Core.M51 -> Prims.GTot Hacl.Spec.Curve25519.Field51.Definition.felem5

Prims.GTot

[ "sometrivial" ]

[]

[ "Hacl.Impl.Curve25519.Fields.Core.f51_as_felem" ]

[]

false

let as_felem =

C.f51_as_felem

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.fevalh

val fevalh: h:mem -> f:felem -> GTot P.elem

let fevalh h f = (as_nat h f) % P.prime

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 39, "end_line": 45, "start_col": 0, "start_line": 45 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

h: FStar.Monotonic.HyperStack.mem -> f: Hacl.Impl.Curve25519.Field51.felem -> Prims.GTot Spec.Curve25519.elem

Prims.GTot

[ "sometrivial" ]

[]

[ "FStar.Monotonic.HyperStack.mem", "Hacl.Impl.Curve25519.Field51.felem", "Prims.op_Modulus", "Hacl.Impl.Curve25519.Field51.as_nat", "Spec.Curve25519.prime", "Spec.Curve25519.elem" ]

[]

false

let fevalh h f =

(as_nat h f) % P.prime

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.feval_wideh

val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem

let feval_wideh h f = (wide_as_nat h f) % P.prime

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 49, "end_line": 49, "start_col": 0, "start_line": 49 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

h: FStar.Monotonic.HyperStack.mem -> f: Hacl.Impl.Curve25519.Field51.felem_wide -> Prims.GTot Spec.Curve25519.elem

Prims.GTot

[ "sometrivial" ]

[]

[ "FStar.Monotonic.HyperStack.mem", "Hacl.Impl.Curve25519.Field51.felem_wide", "Prims.op_Modulus", "Hacl.Impl.Curve25519.Field51.wide_as_nat", "Spec.Curve25519.prime", "Spec.Curve25519.elem" ]

[]

false

let feval_wideh h f =

(wide_as_nat h f) % P.prime

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.wide_as_nat

val wide_as_nat: h:mem -> e:felem_wide -> GTot nat

let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4)

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 37, "end_line": 41, "start_col": 0, "start_line": 34 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

h: FStar.Monotonic.HyperStack.mem -> e: Hacl.Impl.Curve25519.Field51.felem_wide -> Prims.GTot Prims.nat

Prims.GTot

[ "sometrivial" ]

[]

[ "FStar.Monotonic.HyperStack.mem", "Hacl.Impl.Curve25519.Field51.felem_wide", "Hacl.Spec.Curve25519.Field51.Definition.wide_as_nat5", "FStar.Pervasives.Native.Mktuple5", "Lib.IntTypes.uint128", "Lib.IntTypes.int_t", "Lib.IntTypes.U128", "Lib.IntTypes.SEC", "Prims.eq2", "FStar.Seq.Base.index", "Lib.Sequence.to_seq", "Lib.IntTypes.v", "Lib.IntTypes.U32", "Lib.IntTypes.PUB", "FStar.UInt32.uint_to_t", "FStar.UInt32.t", "Lib.Sequence.op_String_Access", "FStar.UInt32.__uint_to_t", "Lib.Sequence.lseq", "Lib.Buffer.as_seq", "Lib.Buffer.MUT", "Prims.nat" ]

[]

false

let wide_as_nat h e =

let s = as_seq h e in let s0 = s.[ 0 ] in let s1 = s.[ 1 ] in let s2 = s.[ 2 ] in let s3 = s.[ 3 ] in let s4 = s.[ 4 ] in S.wide_as_nat5 (s0, s1, s2, s3, s4)

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.felem_wide_fits

val felem_wide_fits: h:mem -> f:felem_wide -> m:S.scale128_5 -> Type0

let felem_wide_fits h f m = let s = as_seq h f in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.felem_wide_fits5 (s0, s1, s2, s3, s4) m

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 43, "end_line": 64, "start_col": 0, "start_line": 57 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem let feval_wideh h f = (wide_as_nat h f) % P.prime noextract let felem_fits = C.f51_felem_fits noextract

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

h: FStar.Monotonic.HyperStack.mem -> f: Hacl.Impl.Curve25519.Field51.felem_wide -> m: Hacl.Spec.Curve25519.Field51.Definition.scale128_5 -> Type0

Prims.Tot

[ "total" ]

[]

[ "FStar.Monotonic.HyperStack.mem", "Hacl.Impl.Curve25519.Field51.felem_wide", "Hacl.Spec.Curve25519.Field51.Definition.scale128_5", "Hacl.Spec.Curve25519.Field51.Definition.felem_wide_fits5", "FStar.Pervasives.Native.Mktuple5", "Lib.IntTypes.uint128", "Lib.IntTypes.int_t", "Lib.IntTypes.U128", "Lib.IntTypes.SEC", "Prims.eq2", "FStar.Seq.Base.index", "Lib.Sequence.to_seq", "Lib.IntTypes.v", "Lib.IntTypes.U32", "Lib.IntTypes.PUB", "FStar.UInt32.uint_to_t", "FStar.UInt32.t", "Lib.Sequence.op_String_Access", "FStar.UInt32.__uint_to_t", "Lib.Sequence.lseq", "Lib.Buffer.as_seq", "Lib.Buffer.MUT" ]

[]

false

true

let felem_wide_fits h f m =

let s = as_seq h f in let s0 = s.[ 0 ] in let s1 = s.[ 1 ] in let s2 = s.[ 2 ] in let s3 = s.[ 3 ] in let s4 = s.[ 4 ] in S.felem_wide_fits5 (s0, s1, s2, s3, s4) m

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.set_zero

val set_zero: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 0)

let set_zero f = f.(0ul) <- u64 0; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 18, "end_line": 95, "start_col": 0, "start_line": 90 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem let feval_wideh h f = (wide_as_nat h f) % P.prime noextract let felem_fits = C.f51_felem_fits noextract val felem_wide_fits: h:mem -> f:felem_wide -> m:S.scale128_5 -> Type0 let felem_wide_fits h f m = let s = as_seq h f in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.felem_wide_fits5 (s0, s1, s2, s3, s4) m noextract let as_felem = C.f51_as_felem noextract let mul_inv_t = C.f51_mul_inv_t inline_for_extraction noextract val create_felem: unit -> StackInline felem (requires fun _ -> True) (ensures fun h0 f h1 -> stack_allocated f h0 h1 (LSeq.create 5 (u64 0)) /\ as_nat h1 f == 0) let create_felem () = create 5ul (u64 0) inline_for_extraction noextract val set_zero: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

f: Hacl.Impl.Curve25519.Field51.felem -> FStar.HyperStack.ST.Stack Prims.unit

FStar.HyperStack.ST.Stack

[]

[ "Hacl.Impl.Curve25519.Field51.felem", "Lib.Buffer.op_Array_Assignment", "Lib.IntTypes.uint64", "FStar.UInt32.__uint_to_t", "Lib.IntTypes.u64", "Prims.unit" ]

[]

false

true

false

let set_zero f =

f.(0ul) <- u64 0; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.create_felem

val create_felem: unit -> StackInline felem (requires fun _ -> True) (ensures fun h0 f h1 -> stack_allocated f h0 h1 (LSeq.create 5 (u64 0)) /\ as_nat h1 f == 0)

let create_felem () = create 5ul (u64 0)

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 40, "end_line": 81, "start_col": 0, "start_line": 81 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem let feval_wideh h f = (wide_as_nat h f) % P.prime noextract let felem_fits = C.f51_felem_fits noextract val felem_wide_fits: h:mem -> f:felem_wide -> m:S.scale128_5 -> Type0 let felem_wide_fits h f m = let s = as_seq h f in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.felem_wide_fits5 (s0, s1, s2, s3, s4) m noextract let as_felem = C.f51_as_felem noextract let mul_inv_t = C.f51_mul_inv_t inline_for_extraction noextract val create_felem: unit -> StackInline felem (requires fun _ -> True) (ensures fun h0 f h1 -> stack_allocated f h0 h1 (LSeq.create 5 (u64 0)) /\

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

_: Prims.unit -> FStar.HyperStack.ST.StackInline Hacl.Impl.Curve25519.Field51.felem

FStar.HyperStack.ST.StackInline

[]

[ "Prims.unit", "Lib.Buffer.create", "Lib.IntTypes.uint64", "FStar.UInt32.__uint_to_t", "Lib.IntTypes.u64", "Lib.Buffer.lbuffer", "Hacl.Impl.Curve25519.Field51.felem" ]

[]

false

true

false

let create_felem () =

create 5ul (u64 0)

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.set_one

val set_one: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 1)

let set_one f = f.(0ul) <- u64 1; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 18, "end_line": 109, "start_col": 0, "start_line": 104 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem let feval_wideh h f = (wide_as_nat h f) % P.prime noextract let felem_fits = C.f51_felem_fits noextract val felem_wide_fits: h:mem -> f:felem_wide -> m:S.scale128_5 -> Type0 let felem_wide_fits h f m = let s = as_seq h f in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.felem_wide_fits5 (s0, s1, s2, s3, s4) m noextract let as_felem = C.f51_as_felem noextract let mul_inv_t = C.f51_mul_inv_t inline_for_extraction noextract val create_felem: unit -> StackInline felem (requires fun _ -> True) (ensures fun h0 f h1 -> stack_allocated f h0 h1 (LSeq.create 5 (u64 0)) /\ as_nat h1 f == 0) let create_felem () = create 5ul (u64 0) inline_for_extraction noextract val set_zero: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 0) let set_zero f = f.(0ul) <- u64 0; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val set_one: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

f: Hacl.Impl.Curve25519.Field51.felem -> FStar.HyperStack.ST.Stack Prims.unit

FStar.HyperStack.ST.Stack

[]

[ "Hacl.Impl.Curve25519.Field51.felem", "Lib.Buffer.op_Array_Assignment", "Lib.IntTypes.uint64", "FStar.UInt32.__uint_to_t", "Lib.IntTypes.u64", "Prims.unit" ]

[]

false

true

false

let set_one f =

f.(0ul) <- u64 1; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.fsqr

val fsqr: C.(fsqr_t M51 True)

let fsqr out f _ = let f0 = f.(0ul) in let f1 = f.(1ul) in let f2 = f.(2ul) in let f3 = f.(3ul) in let f4 = f.(4ul) in let (o0,o1,o2,o3,o4) = fsqr5 (f0,f1,f2,f3,f4) in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 17, "end_line": 274, "start_col": 0, "start_line": 263 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem let feval_wideh h f = (wide_as_nat h f) % P.prime noextract let felem_fits = C.f51_felem_fits noextract val felem_wide_fits: h:mem -> f:felem_wide -> m:S.scale128_5 -> Type0 let felem_wide_fits h f m = let s = as_seq h f in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.felem_wide_fits5 (s0, s1, s2, s3, s4) m noextract let as_felem = C.f51_as_felem noextract let mul_inv_t = C.f51_mul_inv_t inline_for_extraction noextract val create_felem: unit -> StackInline felem (requires fun _ -> True) (ensures fun h0 f h1 -> stack_allocated f h0 h1 (LSeq.create 5 (u64 0)) /\ as_nat h1 f == 0) let create_felem () = create 5ul (u64 0) inline_for_extraction noextract val set_zero: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 0) let set_zero f = f.(0ul) <- u64 0; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val set_one: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 1) let set_one f = f.(0ul) <- u64 1; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val copy_felem: f1:felem -> f2:felem -> Stack unit (requires fun h -> live h f1 /\ live h f2 /\ disjoint f1 f2) (ensures fun h0 _ h1 -> modifies (loc f1) h0 h1 /\ as_seq h1 f1 == as_seq h0 f2) let copy_felem f1 f2 = f1.(0ul) <- f2.(0ul); f1.(1ul) <- f2.(1ul); f1.(2ul) <- f2.(2ul); f1.(3ul) <- f2.(3ul); f1.(4ul) <- f2.(4ul); let h1 = ST.get () in LSeq.eq_intro (as_seq h1 f1) (as_seq h1 f2) #set-options "--max_fuel 0 --max_ifuel 0" val fadd: C.(fadd_t M51 True) [@ CInline] let fadd out f1 f2 = let h0 = ST.get () in let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! f20; out.(1ul) <- f11 +! f21; out.(2ul) <- f12 +! f22; out.(3ul) <- f13 +! f23; out.(4ul) <- f14 +! f24; let h1 = ST.get () in assert (as_nat h1 out == as_nat h0 f1 + as_nat h0 f2); FStar.Math.Lemmas.lemma_mod_plus_distr_l (as_nat h0 f1) (as_nat h0 f2) P.prime; FStar.Math.Lemmas.lemma_mod_plus_distr_r (as_nat h0 f1 % P.prime) (as_nat h0 f2) P.prime val fsub: C.(fsub_t M51 True) [@ CInline] let fsub out f1 f2 = let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! u64 0x3fffffffffff68 -! f20; out.(1ul) <- f11 +! u64 0x3ffffffffffff8 -! f21; out.(2ul) <- f12 +! u64 0x3ffffffffffff8 -! f22; out.(3ul) <- f13 +! u64 0x3ffffffffffff8 -! f23; out.(4ul) <- f14 +! u64 0x3ffffffffffff8 -! f24; lemma_fsub (f10, f11, f12, f13, f14) (f20, f21, f22, f23, f24) val fmul: C.(fmul_t M51 True) [@ CInline] let fmul out f1 f2 _ = let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let f20 = f2.(0ul) in let f21 = f2.(1ul) in let f22 = f2.(2ul) in let f23 = f2.(3ul) in let f24 = f2.(4ul) in let (o0,o1,o2,o3,o4) = fmul5 (f10,f11,f12,f13,f14) (f20,f21,f22,f23,f24) in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4 val fmul2: C.(fmul2_t M51 True) #set-options "--z3rlimit 100" [@ CInline] let fmul2 out f1 f2 _ = let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let f20 = f2.(0ul) in let f21 = f2.(1ul) in let f22 = f2.(2ul) in let f23 = f2.(3ul) in let f24 = f2.(4ul) in let f30 = f1.(5ul) in let f31 = f1.(6ul) in let f32 = f1.(7ul) in let f33 = f1.(8ul) in let f34 = f1.(9ul) in let f40 = f2.(5ul) in let f41 = f2.(6ul) in let f42 = f2.(7ul) in let f43 = f2.(8ul) in let f44 = f2.(9ul) in let ((o10,o11,o12,o13,o14), (o20,o21,o22,o23,o24)) = fmul25 (f10,f11,f12,f13,f14) (f20,f21,f22,f23,f24) (f30,f31,f32,f33,f34) (f40,f41,f42,f43,f44) in out.(0ul) <- o10; out.(1ul) <- o11; out.(2ul) <- o12; out.(3ul) <- o13; out.(4ul) <- o14; out.(5ul) <- o20; out.(6ul) <- o21; out.(7ul) <- o22; out.(8ul) <- o23; out.(9ul) <- o24 val fmul1: C.(fmul1_t M51 True) [@ CInline] let fmul1 out f1 f2 = let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let (o0,o1,o2,o3,o4) = fmul15 (f10,f11,f12,f13,f14) f2 in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4 val fsqr: C.(fsqr_t M51 True)

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Hacl.Impl.Curve25519.Fields.Core.fsqr_t Hacl.Impl.Curve25519.Fields.Core.M51 Prims.l_True

Prims.Tot

[ "total" ]

[]

[ "Hacl.Impl.Curve25519.Fields.Core.felem", "Hacl.Impl.Curve25519.Fields.Core.M51", "Hacl.Impl.Curve25519.Fields.Core.felem_wide", "Lib.IntTypes.uint64", "Lib.Buffer.op_Array_Assignment", "Hacl.Impl.Curve25519.Fields.Core.limb", "Hacl.Impl.Curve25519.Fields.Core.nlimb", "FStar.UInt32.__uint_to_t", "Prims.unit", "Hacl.Spec.Curve25519.Field51.Definition.felem5", "Prims.l_and", "Hacl.Spec.Curve25519.Field51.mul_inv_t", "Prims.eq2", "Spec.Curve25519.elem", "Hacl.Spec.Curve25519.Field51.Definition.feval", "Spec.Curve25519.fmul", "FStar.Pervasives.Native.Mktuple5", "Lib.IntTypes.int_t", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "Hacl.Spec.Curve25519.Field51.fsqr5", "Lib.Buffer.op_Array_Access", "Lib.Buffer.MUT" ]

[]

false

true

false

let fsqr out f _ =

let f0 = f.(0ul) in let f1 = f.(1ul) in let f2 = f.(2ul) in let f3 = f.(3ul) in let f4 = f.(4ul) in let o0, o1, o2, o3, o4 = fsqr5 (f0, f1, f2, f3, f4) in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.fsub

val fsub: C.(fsub_t M51 True)

let fsub out f1 f2 = let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! u64 0x3fffffffffff68 -! f20; out.(1ul) <- f11 +! u64 0x3ffffffffffff8 -! f21; out.(2ul) <- f12 +! u64 0x3ffffffffffff8 -! f22; out.(3ul) <- f13 +! u64 0x3ffffffffffff8 -! f23; out.(4ul) <- f14 +! u64 0x3ffffffffffff8 -! f24; lemma_fsub (f10, f11, f12, f13, f14) (f20, f21, f22, f23, f24)

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 64, "end_line": 176, "start_col": 0, "start_line": 160 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem let feval_wideh h f = (wide_as_nat h f) % P.prime noextract let felem_fits = C.f51_felem_fits noextract val felem_wide_fits: h:mem -> f:felem_wide -> m:S.scale128_5 -> Type0 let felem_wide_fits h f m = let s = as_seq h f in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.felem_wide_fits5 (s0, s1, s2, s3, s4) m noextract let as_felem = C.f51_as_felem noextract let mul_inv_t = C.f51_mul_inv_t inline_for_extraction noextract val create_felem: unit -> StackInline felem (requires fun _ -> True) (ensures fun h0 f h1 -> stack_allocated f h0 h1 (LSeq.create 5 (u64 0)) /\ as_nat h1 f == 0) let create_felem () = create 5ul (u64 0) inline_for_extraction noextract val set_zero: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 0) let set_zero f = f.(0ul) <- u64 0; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val set_one: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 1) let set_one f = f.(0ul) <- u64 1; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val copy_felem: f1:felem -> f2:felem -> Stack unit (requires fun h -> live h f1 /\ live h f2 /\ disjoint f1 f2) (ensures fun h0 _ h1 -> modifies (loc f1) h0 h1 /\ as_seq h1 f1 == as_seq h0 f2) let copy_felem f1 f2 = f1.(0ul) <- f2.(0ul); f1.(1ul) <- f2.(1ul); f1.(2ul) <- f2.(2ul); f1.(3ul) <- f2.(3ul); f1.(4ul) <- f2.(4ul); let h1 = ST.get () in LSeq.eq_intro (as_seq h1 f1) (as_seq h1 f2) #set-options "--max_fuel 0 --max_ifuel 0" val fadd: C.(fadd_t M51 True) [@ CInline] let fadd out f1 f2 = let h0 = ST.get () in let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! f20; out.(1ul) <- f11 +! f21; out.(2ul) <- f12 +! f22; out.(3ul) <- f13 +! f23; out.(4ul) <- f14 +! f24; let h1 = ST.get () in assert (as_nat h1 out == as_nat h0 f1 + as_nat h0 f2); FStar.Math.Lemmas.lemma_mod_plus_distr_l (as_nat h0 f1) (as_nat h0 f2) P.prime; FStar.Math.Lemmas.lemma_mod_plus_distr_r (as_nat h0 f1 % P.prime) (as_nat h0 f2) P.prime val fsub: C.(fsub_t M51 True)

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Hacl.Impl.Curve25519.Fields.Core.fsub_t Hacl.Impl.Curve25519.Fields.Core.M51 Prims.l_True

Prims.Tot

[ "total" ]

[]

[ "Hacl.Impl.Curve25519.Fields.Core.felem", "Hacl.Impl.Curve25519.Fields.Core.M51", "Hacl.Spec.Curve25519.Field51.lemma_fsub", "FStar.Pervasives.Native.Mktuple5", "Lib.IntTypes.uint64", "Prims.unit", "Lib.Buffer.op_Array_Assignment", "Hacl.Impl.Curve25519.Fields.Core.limb", "Hacl.Impl.Curve25519.Fields.Core.nlimb", "FStar.UInt32.__uint_to_t", "Lib.IntTypes.op_Subtraction_Bang", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "Lib.IntTypes.op_Plus_Bang", "Lib.IntTypes.u64", "Lib.IntTypes.int_t", "Lib.Buffer.op_Array_Access", "Lib.Buffer.MUT" ]

[]

false

true

false

let fsub out f1 f2 =

let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! u64 0x3fffffffffff68 -! f20; out.(1ul) <- f11 +! u64 0x3ffffffffffff8 -! f21; out.(2ul) <- f12 +! u64 0x3ffffffffffff8 -! f22; out.(3ul) <- f13 +! u64 0x3ffffffffffff8 -! f23; out.(4ul) <- f14 +! u64 0x3ffffffffffff8 -! f24; lemma_fsub (f10, f11, f12, f13, f14) (f20, f21, f22, f23, f24)

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.fadd

val fadd: C.(fadd_t M51 True)

let fadd out f1 f2 = let h0 = ST.get () in let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! f20; out.(1ul) <- f11 +! f21; out.(2ul) <- f12 +! f22; out.(3ul) <- f13 +! f23; out.(4ul) <- f14 +! f24; let h1 = ST.get () in assert (as_nat h1 out == as_nat h0 f1 + as_nat h0 f2); FStar.Math.Lemmas.lemma_mod_plus_distr_l (as_nat h0 f1) (as_nat h0 f2) P.prime; FStar.Math.Lemmas.lemma_mod_plus_distr_r (as_nat h0 f1 % P.prime) (as_nat h0 f2) P.prime

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 51, "end_line": 156, "start_col": 0, "start_line": 134 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem let feval_wideh h f = (wide_as_nat h f) % P.prime noextract let felem_fits = C.f51_felem_fits noextract val felem_wide_fits: h:mem -> f:felem_wide -> m:S.scale128_5 -> Type0 let felem_wide_fits h f m = let s = as_seq h f in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.felem_wide_fits5 (s0, s1, s2, s3, s4) m noextract let as_felem = C.f51_as_felem noextract let mul_inv_t = C.f51_mul_inv_t inline_for_extraction noextract val create_felem: unit -> StackInline felem (requires fun _ -> True) (ensures fun h0 f h1 -> stack_allocated f h0 h1 (LSeq.create 5 (u64 0)) /\ as_nat h1 f == 0) let create_felem () = create 5ul (u64 0) inline_for_extraction noextract val set_zero: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 0) let set_zero f = f.(0ul) <- u64 0; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val set_one: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 1) let set_one f = f.(0ul) <- u64 1; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val copy_felem: f1:felem -> f2:felem -> Stack unit (requires fun h -> live h f1 /\ live h f2 /\ disjoint f1 f2) (ensures fun h0 _ h1 -> modifies (loc f1) h0 h1 /\ as_seq h1 f1 == as_seq h0 f2) let copy_felem f1 f2 = f1.(0ul) <- f2.(0ul); f1.(1ul) <- f2.(1ul); f1.(2ul) <- f2.(2ul); f1.(3ul) <- f2.(3ul); f1.(4ul) <- f2.(4ul); let h1 = ST.get () in LSeq.eq_intro (as_seq h1 f1) (as_seq h1 f2) #set-options "--max_fuel 0 --max_ifuel 0" val fadd: C.(fadd_t M51 True)

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Hacl.Impl.Curve25519.Fields.Core.fadd_t Hacl.Impl.Curve25519.Fields.Core.M51 Prims.l_True

Prims.Tot

[ "total" ]

[]

[ "Hacl.Impl.Curve25519.Fields.Core.felem", "Hacl.Impl.Curve25519.Fields.Core.M51", "FStar.Math.Lemmas.lemma_mod_plus_distr_r", "Prims.op_Modulus", "Hacl.Impl.Curve25519.Field51.as_nat", "Spec.Curve25519.prime", "Prims.unit", "FStar.Math.Lemmas.lemma_mod_plus_distr_l", "Prims._assert", "Prims.eq2", "Prims.int", "Prims.op_Addition", "FStar.Monotonic.HyperStack.mem", "FStar.HyperStack.ST.get", "Lib.Buffer.op_Array_Assignment", "Hacl.Impl.Curve25519.Fields.Core.limb", "Hacl.Impl.Curve25519.Fields.Core.nlimb", "FStar.UInt32.__uint_to_t", "Lib.IntTypes.op_Plus_Bang", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "Lib.IntTypes.int_t", "Lib.Buffer.op_Array_Access", "Lib.Buffer.MUT" ]

[]

false

true

false

let fadd out f1 f2 =

let h0 = ST.get () in let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! f20; out.(1ul) <- f11 +! f21; out.(2ul) <- f12 +! f22; out.(3ul) <- f13 +! f23; out.(4ul) <- f14 +! f24; let h1 = ST.get () in assert (as_nat h1 out == as_nat h0 f1 + as_nat h0 f2); FStar.Math.Lemmas.lemma_mod_plus_distr_l (as_nat h0 f1) (as_nat h0 f2) P.prime; FStar.Math.Lemmas.lemma_mod_plus_distr_r (as_nat h0 f1 % P.prime) (as_nat h0 f2) P.prime

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.fmul1

val fmul1: C.(fmul1_t M51 True)

let fmul1 out f1 f2 = let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let (o0,o1,o2,o3,o4) = fmul15 (f10,f11,f12,f13,f14) f2 in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 17, "end_line": 259, "start_col": 0, "start_line": 248 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem let feval_wideh h f = (wide_as_nat h f) % P.prime noextract let felem_fits = C.f51_felem_fits noextract val felem_wide_fits: h:mem -> f:felem_wide -> m:S.scale128_5 -> Type0 let felem_wide_fits h f m = let s = as_seq h f in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.felem_wide_fits5 (s0, s1, s2, s3, s4) m noextract let as_felem = C.f51_as_felem noextract let mul_inv_t = C.f51_mul_inv_t inline_for_extraction noextract val create_felem: unit -> StackInline felem (requires fun _ -> True) (ensures fun h0 f h1 -> stack_allocated f h0 h1 (LSeq.create 5 (u64 0)) /\ as_nat h1 f == 0) let create_felem () = create 5ul (u64 0) inline_for_extraction noextract val set_zero: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 0) let set_zero f = f.(0ul) <- u64 0; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val set_one: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 1) let set_one f = f.(0ul) <- u64 1; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val copy_felem: f1:felem -> f2:felem -> Stack unit (requires fun h -> live h f1 /\ live h f2 /\ disjoint f1 f2) (ensures fun h0 _ h1 -> modifies (loc f1) h0 h1 /\ as_seq h1 f1 == as_seq h0 f2) let copy_felem f1 f2 = f1.(0ul) <- f2.(0ul); f1.(1ul) <- f2.(1ul); f1.(2ul) <- f2.(2ul); f1.(3ul) <- f2.(3ul); f1.(4ul) <- f2.(4ul); let h1 = ST.get () in LSeq.eq_intro (as_seq h1 f1) (as_seq h1 f2) #set-options "--max_fuel 0 --max_ifuel 0" val fadd: C.(fadd_t M51 True) [@ CInline] let fadd out f1 f2 = let h0 = ST.get () in let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! f20; out.(1ul) <- f11 +! f21; out.(2ul) <- f12 +! f22; out.(3ul) <- f13 +! f23; out.(4ul) <- f14 +! f24; let h1 = ST.get () in assert (as_nat h1 out == as_nat h0 f1 + as_nat h0 f2); FStar.Math.Lemmas.lemma_mod_plus_distr_l (as_nat h0 f1) (as_nat h0 f2) P.prime; FStar.Math.Lemmas.lemma_mod_plus_distr_r (as_nat h0 f1 % P.prime) (as_nat h0 f2) P.prime val fsub: C.(fsub_t M51 True) [@ CInline] let fsub out f1 f2 = let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! u64 0x3fffffffffff68 -! f20; out.(1ul) <- f11 +! u64 0x3ffffffffffff8 -! f21; out.(2ul) <- f12 +! u64 0x3ffffffffffff8 -! f22; out.(3ul) <- f13 +! u64 0x3ffffffffffff8 -! f23; out.(4ul) <- f14 +! u64 0x3ffffffffffff8 -! f24; lemma_fsub (f10, f11, f12, f13, f14) (f20, f21, f22, f23, f24) val fmul: C.(fmul_t M51 True) [@ CInline] let fmul out f1 f2 _ = let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let f20 = f2.(0ul) in let f21 = f2.(1ul) in let f22 = f2.(2ul) in let f23 = f2.(3ul) in let f24 = f2.(4ul) in let (o0,o1,o2,o3,o4) = fmul5 (f10,f11,f12,f13,f14) (f20,f21,f22,f23,f24) in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4 val fmul2: C.(fmul2_t M51 True) #set-options "--z3rlimit 100" [@ CInline] let fmul2 out f1 f2 _ = let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let f20 = f2.(0ul) in let f21 = f2.(1ul) in let f22 = f2.(2ul) in let f23 = f2.(3ul) in let f24 = f2.(4ul) in let f30 = f1.(5ul) in let f31 = f1.(6ul) in let f32 = f1.(7ul) in let f33 = f1.(8ul) in let f34 = f1.(9ul) in let f40 = f2.(5ul) in let f41 = f2.(6ul) in let f42 = f2.(7ul) in let f43 = f2.(8ul) in let f44 = f2.(9ul) in let ((o10,o11,o12,o13,o14), (o20,o21,o22,o23,o24)) = fmul25 (f10,f11,f12,f13,f14) (f20,f21,f22,f23,f24) (f30,f31,f32,f33,f34) (f40,f41,f42,f43,f44) in out.(0ul) <- o10; out.(1ul) <- o11; out.(2ul) <- o12; out.(3ul) <- o13; out.(4ul) <- o14; out.(5ul) <- o20; out.(6ul) <- o21; out.(7ul) <- o22; out.(8ul) <- o23; out.(9ul) <- o24 val fmul1: C.(fmul1_t M51 True)

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Hacl.Impl.Curve25519.Fields.Core.fmul1_t Hacl.Impl.Curve25519.Fields.Core.M51 Prims.l_True

Prims.Tot

[ "total" ]

[]

[ "Hacl.Impl.Curve25519.Fields.Core.felem", "Hacl.Impl.Curve25519.Fields.Core.M51", "Lib.IntTypes.uint64", "Lib.Buffer.op_Array_Assignment", "Hacl.Impl.Curve25519.Fields.Core.limb", "Hacl.Impl.Curve25519.Fields.Core.nlimb", "FStar.UInt32.__uint_to_t", "Prims.unit", "Hacl.Spec.Curve25519.Field51.Definition.felem5", "Hacl.Spec.Curve25519.Field51.fmul15", "FStar.Pervasives.Native.Mktuple5", "Lib.IntTypes.int_t", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "Lib.Buffer.op_Array_Access", "Lib.Buffer.MUT" ]

[]

false

true

false

let fmul1 out f1 f2 =

let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let o0, o1, o2, o3, o4 = fmul15 (f10, f11, f12, f13, f14) f2 in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.copy_felem

val copy_felem: f1:felem -> f2:felem -> Stack unit (requires fun h -> live h f1 /\ live h f2 /\ disjoint f1 f2) (ensures fun h0 _ h1 -> modifies (loc f1) h0 h1 /\ as_seq h1 f1 == as_seq h0 f2)

let copy_felem f1 f2 = f1.(0ul) <- f2.(0ul); f1.(1ul) <- f2.(1ul); f1.(2ul) <- f2.(2ul); f1.(3ul) <- f2.(3ul); f1.(4ul) <- f2.(4ul); let h1 = ST.get () in LSeq.eq_intro (as_seq h1 f1) (as_seq h1 f2)

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 45, "end_line": 128, "start_col": 0, "start_line": 121 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem let feval_wideh h f = (wide_as_nat h f) % P.prime noextract let felem_fits = C.f51_felem_fits noextract val felem_wide_fits: h:mem -> f:felem_wide -> m:S.scale128_5 -> Type0 let felem_wide_fits h f m = let s = as_seq h f in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.felem_wide_fits5 (s0, s1, s2, s3, s4) m noextract let as_felem = C.f51_as_felem noextract let mul_inv_t = C.f51_mul_inv_t inline_for_extraction noextract val create_felem: unit -> StackInline felem (requires fun _ -> True) (ensures fun h0 f h1 -> stack_allocated f h0 h1 (LSeq.create 5 (u64 0)) /\ as_nat h1 f == 0) let create_felem () = create 5ul (u64 0) inline_for_extraction noextract val set_zero: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 0) let set_zero f = f.(0ul) <- u64 0; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val set_one: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 1) let set_one f = f.(0ul) <- u64 1; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val copy_felem: f1:felem -> f2:felem -> Stack unit (requires fun h -> live h f1 /\ live h f2 /\ disjoint f1 f2) (ensures fun h0 _ h1 -> modifies (loc f1) h0 h1 /\

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

f1: Hacl.Impl.Curve25519.Field51.felem -> f2: Hacl.Impl.Curve25519.Field51.felem -> FStar.HyperStack.ST.Stack Prims.unit

FStar.HyperStack.ST.Stack

[]

[ "Hacl.Impl.Curve25519.Field51.felem", "Lib.Sequence.eq_intro", "Lib.IntTypes.uint64", "Lib.IntTypes.v", "Lib.IntTypes.U32", "Lib.IntTypes.PUB", "FStar.UInt32.__uint_to_t", "Lib.Buffer.as_seq", "Lib.Buffer.MUT", "Prims.unit", "FStar.Monotonic.HyperStack.mem", "FStar.HyperStack.ST.get", "Lib.Buffer.op_Array_Assignment", "Lib.IntTypes.int_t", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "Lib.Buffer.op_Array_Access" ]

[]

false

true

false

let copy_felem f1 f2 =

f1.(0ul) <- f2.(0ul); f1.(1ul) <- f2.(1ul); f1.(2ul) <- f2.(2ul); f1.(3ul) <- f2.(3ul); f1.(4ul) <- f2.(4ul); let h1 = ST.get () in LSeq.eq_intro (as_seq h1 f1) (as_seq h1 f2)

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.load_felem

val load_felem: f:felem -> u64s:lbuffer uint64 4ul -> Stack unit (requires fun h -> live h u64s /\ live h f /\ disjoint u64s f /\ v (as_seq h u64s).[3] < pow2 63) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ //felem_fits h1 f (1, 1, 1, 1, 1) /\ mul_inv_t h1 f /\ as_nat h1 f == BSeq.nat_from_intseq_le (as_seq h0 u64s))

let load_felem f u64s = let h0 = ST.get () in let f0l = u64s.(0ul) &. S.mask51 in let f0h = u64s.(0ul) >>. 51ul in let f1l = ((u64s.(1ul) &. u64 0x3fffffffff)) <<. 13ul in let f1h = u64s.(1ul) >>. 38ul in let f2l = (u64s.(2ul) &. u64 0x1ffffff) <<. 26ul in let f2h = u64s.(2ul) >>. 25ul in let f3l = (u64s.(3ul) &. u64 0xfff) <<. 39ul in let f3h = u64s.(3ul) >>. 12ul in f.(0ul) <- f0l; f.(1ul) <- f0h |. f1l; f.(2ul) <- f1h |. f2l; f.(3ul) <- f2h |. f3l; f.(4ul) <- f3h; Lemmas.lemma_load_felem (as_seq h0 u64s)

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 42, "end_line": 333, "start_col": 0, "start_line": 318 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem let feval_wideh h f = (wide_as_nat h f) % P.prime noextract let felem_fits = C.f51_felem_fits noextract val felem_wide_fits: h:mem -> f:felem_wide -> m:S.scale128_5 -> Type0 let felem_wide_fits h f m = let s = as_seq h f in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.felem_wide_fits5 (s0, s1, s2, s3, s4) m noextract let as_felem = C.f51_as_felem noextract let mul_inv_t = C.f51_mul_inv_t inline_for_extraction noextract val create_felem: unit -> StackInline felem (requires fun _ -> True) (ensures fun h0 f h1 -> stack_allocated f h0 h1 (LSeq.create 5 (u64 0)) /\ as_nat h1 f == 0) let create_felem () = create 5ul (u64 0) inline_for_extraction noextract val set_zero: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 0) let set_zero f = f.(0ul) <- u64 0; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val set_one: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 1) let set_one f = f.(0ul) <- u64 1; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val copy_felem: f1:felem -> f2:felem -> Stack unit (requires fun h -> live h f1 /\ live h f2 /\ disjoint f1 f2) (ensures fun h0 _ h1 -> modifies (loc f1) h0 h1 /\ as_seq h1 f1 == as_seq h0 f2) let copy_felem f1 f2 = f1.(0ul) <- f2.(0ul); f1.(1ul) <- f2.(1ul); f1.(2ul) <- f2.(2ul); f1.(3ul) <- f2.(3ul); f1.(4ul) <- f2.(4ul); let h1 = ST.get () in LSeq.eq_intro (as_seq h1 f1) (as_seq h1 f2) #set-options "--max_fuel 0 --max_ifuel 0" val fadd: C.(fadd_t M51 True) [@ CInline] let fadd out f1 f2 = let h0 = ST.get () in let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! f20; out.(1ul) <- f11 +! f21; out.(2ul) <- f12 +! f22; out.(3ul) <- f13 +! f23; out.(4ul) <- f14 +! f24; let h1 = ST.get () in assert (as_nat h1 out == as_nat h0 f1 + as_nat h0 f2); FStar.Math.Lemmas.lemma_mod_plus_distr_l (as_nat h0 f1) (as_nat h0 f2) P.prime; FStar.Math.Lemmas.lemma_mod_plus_distr_r (as_nat h0 f1 % P.prime) (as_nat h0 f2) P.prime val fsub: C.(fsub_t M51 True) [@ CInline] let fsub out f1 f2 = let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! u64 0x3fffffffffff68 -! f20; out.(1ul) <- f11 +! u64 0x3ffffffffffff8 -! f21; out.(2ul) <- f12 +! u64 0x3ffffffffffff8 -! f22; out.(3ul) <- f13 +! u64 0x3ffffffffffff8 -! f23; out.(4ul) <- f14 +! u64 0x3ffffffffffff8 -! f24; lemma_fsub (f10, f11, f12, f13, f14) (f20, f21, f22, f23, f24) val fmul: C.(fmul_t M51 True) [@ CInline] let fmul out f1 f2 _ = let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let f20 = f2.(0ul) in let f21 = f2.(1ul) in let f22 = f2.(2ul) in let f23 = f2.(3ul) in let f24 = f2.(4ul) in let (o0,o1,o2,o3,o4) = fmul5 (f10,f11,f12,f13,f14) (f20,f21,f22,f23,f24) in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4 val fmul2: C.(fmul2_t M51 True) #set-options "--z3rlimit 100" [@ CInline] let fmul2 out f1 f2 _ = let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let f20 = f2.(0ul) in let f21 = f2.(1ul) in let f22 = f2.(2ul) in let f23 = f2.(3ul) in let f24 = f2.(4ul) in let f30 = f1.(5ul) in let f31 = f1.(6ul) in let f32 = f1.(7ul) in let f33 = f1.(8ul) in let f34 = f1.(9ul) in let f40 = f2.(5ul) in let f41 = f2.(6ul) in let f42 = f2.(7ul) in let f43 = f2.(8ul) in let f44 = f2.(9ul) in let ((o10,o11,o12,o13,o14), (o20,o21,o22,o23,o24)) = fmul25 (f10,f11,f12,f13,f14) (f20,f21,f22,f23,f24) (f30,f31,f32,f33,f34) (f40,f41,f42,f43,f44) in out.(0ul) <- o10; out.(1ul) <- o11; out.(2ul) <- o12; out.(3ul) <- o13; out.(4ul) <- o14; out.(5ul) <- o20; out.(6ul) <- o21; out.(7ul) <- o22; out.(8ul) <- o23; out.(9ul) <- o24 val fmul1: C.(fmul1_t M51 True) [@ CInline] let fmul1 out f1 f2 = let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let (o0,o1,o2,o3,o4) = fmul15 (f10,f11,f12,f13,f14) f2 in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4 val fsqr: C.(fsqr_t M51 True) [@ CInline] let fsqr out f _ = let f0 = f.(0ul) in let f1 = f.(1ul) in let f2 = f.(2ul) in let f3 = f.(3ul) in let f4 = f.(4ul) in let (o0,o1,o2,o3,o4) = fsqr5 (f0,f1,f2,f3,f4) in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4 val fsqr2: C.(fsqr2_t M51 True) [@ CInline] let fsqr2 out f _ = let f10 = f.(0ul) in let f11 = f.(1ul) in let f12 = f.(2ul) in let f13 = f.(3ul) in let f14 = f.(4ul) in let f20 = f.(5ul) in let f21 = f.(6ul) in let f22 = f.(7ul) in let f23 = f.(8ul) in let f24 = f.(9ul) in let ((o10,o11,o12,o13,o14),(o20,o21,o22,o23,o24)) = fsqr25 (f10,f11,f12,f13,f14) (f20,f21,f22,f23,f24) in out.(0ul) <- o10; out.(1ul) <- o11; out.(2ul) <- o12; out.(3ul) <- o13; out.(4ul) <- o14; out.(5ul) <- o20; out.(6ul) <- o21; out.(7ul) <- o22; out.(8ul) <- o23; out.(9ul) <- o24 inline_for_extraction noextract val load_felem: f:felem -> u64s:lbuffer uint64 4ul -> Stack unit (requires fun h -> live h u64s /\ live h f /\ disjoint u64s f /\ v (as_seq h u64s).[3] < pow2 63) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ //felem_fits h1 f (1, 1, 1, 1, 1) /\ mul_inv_t h1 f /\

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

f: Hacl.Impl.Curve25519.Field51.felem -> u64s: Lib.Buffer.lbuffer Lib.IntTypes.uint64 4ul -> FStar.HyperStack.ST.Stack Prims.unit

FStar.HyperStack.ST.Stack

[]

[ "Hacl.Impl.Curve25519.Field51.felem", "Lib.Buffer.lbuffer", "Lib.IntTypes.uint64", "FStar.UInt32.__uint_to_t", "Hacl.Spec.Curve25519.Field51.Lemmas.lemma_load_felem", "Lib.Buffer.as_seq", "Lib.Buffer.MUT", "Prims.unit", "Lib.Buffer.op_Array_Assignment", "Lib.IntTypes.op_Bar_Dot", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "Lib.IntTypes.int_t", "Lib.IntTypes.op_Greater_Greater_Dot", "Lib.Buffer.op_Array_Access", "Lib.IntTypes.op_Less_Less_Dot", "Lib.IntTypes.op_Amp_Dot", "Lib.IntTypes.u64", "Hacl.Spec.Curve25519.Field51.Definition.mask51", "FStar.Monotonic.HyperStack.mem", "FStar.HyperStack.ST.get" ]

[]

false

true

false

let load_felem f u64s =

let h0 = ST.get () in let f0l = u64s.(0ul) &. S.mask51 in let f0h = u64s.(0ul) >>. 51ul in let f1l = ((u64s.(1ul) &. u64 0x3fffffffff)) <<. 13ul in let f1h = u64s.(1ul) >>. 38ul in let f2l = (u64s.(2ul) &. u64 0x1ffffff) <<. 26ul in let f2h = u64s.(2ul) >>. 25ul in let f3l = (u64s.(3ul) &. u64 0xfff) <<. 39ul in let f3h = u64s.(3ul) >>. 12ul in f.(0ul) <- f0l; f.(1ul) <- f0h |. f1l; f.(2ul) <- f1h |. f2l; f.(3ul) <- f2h |. f3l; f.(4ul) <- f3h; Lemmas.lemma_load_felem (as_seq h0 u64s)

false

ID5.fst

ID5.wp0

val wp0 (a : Type u#a) : Type u#(max 1 a)

let wp0 a = (a -> Type0) -> Type0

{ "file_name": "examples/layeredeffects/ID5.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 33, "end_line": 7, "start_col": 0, "start_line": 7 }

module ID5 open FStar.Ghost // The base type of WPs

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Monotonic.Pure.fst.checked", "FStar.List.Tot.fst.checked", "FStar.Ghost.fsti.checked" ], "interface_file": false, "source_file": "ID5.fst" }

[ { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

a: Type -> Type

Prims.Tot

[ "total" ]

[]

false

true

let wp0 a =

(a -> Type0) -> Type0

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.store_felem

val store_felem: u64s:lbuffer uint64 4ul -> f:felem -> Stack unit (requires fun h -> live h f /\ live h u64s /\ mul_inv_t h f) (ensures fun h0 _ h1 -> modifies (loc u64s) h0 h1 /\ as_seq h1 u64s == BSeq.nat_to_intseq_le 4 (fevalh h0 f))

let store_felem u64s f = let f0 = f.(0ul) in let f1 = f.(1ul) in let f2 = f.(2ul) in let f3 = f.(3ul) in let f4 = f.(4ul) in let (o0, o1, o2, o3) = store_felem5 (f0, f1, f2, f3, f4) in u64s.(0ul) <- o0; u64s.(1ul) <- o1; u64s.(2ul) <- o2; u64s.(3ul) <- o3; let h1 = ST.get () in Hacl.Impl.Curve25519.Lemmas.lemma_nat_from_uints64_le_4 (as_seq h1 u64s); BSeq.lemma_nat_from_to_intseq_le_preserves_value 4 (as_seq h1 u64s)

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 69, "end_line": 357, "start_col": 0, "start_line": 344 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem let feval_wideh h f = (wide_as_nat h f) % P.prime noextract let felem_fits = C.f51_felem_fits noextract val felem_wide_fits: h:mem -> f:felem_wide -> m:S.scale128_5 -> Type0 let felem_wide_fits h f m = let s = as_seq h f in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.felem_wide_fits5 (s0, s1, s2, s3, s4) m noextract let as_felem = C.f51_as_felem noextract let mul_inv_t = C.f51_mul_inv_t inline_for_extraction noextract val create_felem: unit -> StackInline felem (requires fun _ -> True) (ensures fun h0 f h1 -> stack_allocated f h0 h1 (LSeq.create 5 (u64 0)) /\ as_nat h1 f == 0) let create_felem () = create 5ul (u64 0) inline_for_extraction noextract val set_zero: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 0) let set_zero f = f.(0ul) <- u64 0; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val set_one: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 1) let set_one f = f.(0ul) <- u64 1; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val copy_felem: f1:felem -> f2:felem -> Stack unit (requires fun h -> live h f1 /\ live h f2 /\ disjoint f1 f2) (ensures fun h0 _ h1 -> modifies (loc f1) h0 h1 /\ as_seq h1 f1 == as_seq h0 f2) let copy_felem f1 f2 = f1.(0ul) <- f2.(0ul); f1.(1ul) <- f2.(1ul); f1.(2ul) <- f2.(2ul); f1.(3ul) <- f2.(3ul); f1.(4ul) <- f2.(4ul); let h1 = ST.get () in LSeq.eq_intro (as_seq h1 f1) (as_seq h1 f2) #set-options "--max_fuel 0 --max_ifuel 0" val fadd: C.(fadd_t M51 True) [@ CInline] let fadd out f1 f2 = let h0 = ST.get () in let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! f20; out.(1ul) <- f11 +! f21; out.(2ul) <- f12 +! f22; out.(3ul) <- f13 +! f23; out.(4ul) <- f14 +! f24; let h1 = ST.get () in assert (as_nat h1 out == as_nat h0 f1 + as_nat h0 f2); FStar.Math.Lemmas.lemma_mod_plus_distr_l (as_nat h0 f1) (as_nat h0 f2) P.prime; FStar.Math.Lemmas.lemma_mod_plus_distr_r (as_nat h0 f1 % P.prime) (as_nat h0 f2) P.prime val fsub: C.(fsub_t M51 True) [@ CInline] let fsub out f1 f2 = let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! u64 0x3fffffffffff68 -! f20; out.(1ul) <- f11 +! u64 0x3ffffffffffff8 -! f21; out.(2ul) <- f12 +! u64 0x3ffffffffffff8 -! f22; out.(3ul) <- f13 +! u64 0x3ffffffffffff8 -! f23; out.(4ul) <- f14 +! u64 0x3ffffffffffff8 -! f24; lemma_fsub (f10, f11, f12, f13, f14) (f20, f21, f22, f23, f24) val fmul: C.(fmul_t M51 True) [@ CInline] let fmul out f1 f2 _ = let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let f20 = f2.(0ul) in let f21 = f2.(1ul) in let f22 = f2.(2ul) in let f23 = f2.(3ul) in let f24 = f2.(4ul) in let (o0,o1,o2,o3,o4) = fmul5 (f10,f11,f12,f13,f14) (f20,f21,f22,f23,f24) in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4 val fmul2: C.(fmul2_t M51 True) #set-options "--z3rlimit 100" [@ CInline] let fmul2 out f1 f2 _ = let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let f20 = f2.(0ul) in let f21 = f2.(1ul) in let f22 = f2.(2ul) in let f23 = f2.(3ul) in let f24 = f2.(4ul) in let f30 = f1.(5ul) in let f31 = f1.(6ul) in let f32 = f1.(7ul) in let f33 = f1.(8ul) in let f34 = f1.(9ul) in let f40 = f2.(5ul) in let f41 = f2.(6ul) in let f42 = f2.(7ul) in let f43 = f2.(8ul) in let f44 = f2.(9ul) in let ((o10,o11,o12,o13,o14), (o20,o21,o22,o23,o24)) = fmul25 (f10,f11,f12,f13,f14) (f20,f21,f22,f23,f24) (f30,f31,f32,f33,f34) (f40,f41,f42,f43,f44) in out.(0ul) <- o10; out.(1ul) <- o11; out.(2ul) <- o12; out.(3ul) <- o13; out.(4ul) <- o14; out.(5ul) <- o20; out.(6ul) <- o21; out.(7ul) <- o22; out.(8ul) <- o23; out.(9ul) <- o24 val fmul1: C.(fmul1_t M51 True) [@ CInline] let fmul1 out f1 f2 = let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let (o0,o1,o2,o3,o4) = fmul15 (f10,f11,f12,f13,f14) f2 in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4 val fsqr: C.(fsqr_t M51 True) [@ CInline] let fsqr out f _ = let f0 = f.(0ul) in let f1 = f.(1ul) in let f2 = f.(2ul) in let f3 = f.(3ul) in let f4 = f.(4ul) in let (o0,o1,o2,o3,o4) = fsqr5 (f0,f1,f2,f3,f4) in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4 val fsqr2: C.(fsqr2_t M51 True) [@ CInline] let fsqr2 out f _ = let f10 = f.(0ul) in let f11 = f.(1ul) in let f12 = f.(2ul) in let f13 = f.(3ul) in let f14 = f.(4ul) in let f20 = f.(5ul) in let f21 = f.(6ul) in let f22 = f.(7ul) in let f23 = f.(8ul) in let f24 = f.(9ul) in let ((o10,o11,o12,o13,o14),(o20,o21,o22,o23,o24)) = fsqr25 (f10,f11,f12,f13,f14) (f20,f21,f22,f23,f24) in out.(0ul) <- o10; out.(1ul) <- o11; out.(2ul) <- o12; out.(3ul) <- o13; out.(4ul) <- o14; out.(5ul) <- o20; out.(6ul) <- o21; out.(7ul) <- o22; out.(8ul) <- o23; out.(9ul) <- o24 inline_for_extraction noextract val load_felem: f:felem -> u64s:lbuffer uint64 4ul -> Stack unit (requires fun h -> live h u64s /\ live h f /\ disjoint u64s f /\ v (as_seq h u64s).[3] < pow2 63) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ //felem_fits h1 f (1, 1, 1, 1, 1) /\ mul_inv_t h1 f /\ as_nat h1 f == BSeq.nat_from_intseq_le (as_seq h0 u64s)) let load_felem f u64s = let h0 = ST.get () in let f0l = u64s.(0ul) &. S.mask51 in let f0h = u64s.(0ul) >>. 51ul in let f1l = ((u64s.(1ul) &. u64 0x3fffffffff)) <<. 13ul in let f1h = u64s.(1ul) >>. 38ul in let f2l = (u64s.(2ul) &. u64 0x1ffffff) <<. 26ul in let f2h = u64s.(2ul) >>. 25ul in let f3l = (u64s.(3ul) &. u64 0xfff) <<. 39ul in let f3h = u64s.(3ul) >>. 12ul in f.(0ul) <- f0l; f.(1ul) <- f0h |. f1l; f.(2ul) <- f1h |. f2l; f.(3ul) <- f2h |. f3l; f.(4ul) <- f3h; Lemmas.lemma_load_felem (as_seq h0 u64s) val store_felem: u64s:lbuffer uint64 4ul -> f:felem -> Stack unit (requires fun h -> live h f /\ live h u64s /\ mul_inv_t h f) (ensures fun h0 _ h1 -> modifies (loc u64s) h0 h1 /\

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

u64s: Lib.Buffer.lbuffer Lib.IntTypes.uint64 4ul -> f: Hacl.Impl.Curve25519.Field51.felem -> FStar.HyperStack.ST.Stack Prims.unit

FStar.HyperStack.ST.Stack

[]

[ "Lib.Buffer.lbuffer", "Lib.IntTypes.uint64", "FStar.UInt32.__uint_to_t", "Hacl.Impl.Curve25519.Field51.felem", "Lib.ByteSequence.lemma_nat_from_to_intseq_le_preserves_value", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "Lib.Buffer.as_seq", "Lib.Buffer.MUT", "Prims.unit", "Hacl.Impl.Curve25519.Lemmas.lemma_nat_from_uints64_le_4", "FStar.Monotonic.HyperStack.mem", "FStar.HyperStack.ST.get", "Lib.Buffer.op_Array_Assignment", "FStar.Pervasives.Native.tuple4", "Lib.IntTypes.int_t", "Hacl.Spec.Curve25519.Field51.store_felem5", "FStar.Pervasives.Native.Mktuple5", "Lib.Buffer.op_Array_Access" ]

[]

false

true

false

let store_felem u64s f =

let f0 = f.(0ul) in let f1 = f.(1ul) in let f2 = f.(2ul) in let f3 = f.(3ul) in let f4 = f.(4ul) in let o0, o1, o2, o3 = store_felem5 (f0, f1, f2, f3, f4) in u64s.(0ul) <- o0; u64s.(1ul) <- o1; u64s.(2ul) <- o2; u64s.(3ul) <- o3; let h1 = ST.get () in Hacl.Impl.Curve25519.Lemmas.lemma_nat_from_uints64_le_4 (as_seq h1 u64s); BSeq.lemma_nat_from_to_intseq_le_preserves_value 4 (as_seq h1 u64s)

false

ID5.fst

ID5.wp

val wp (a : Type u#a) : Type u#(max 1 a)

let wp a = pure_wp a

{ "file_name": "examples/layeredeffects/ID5.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 20, "end_line": 10, "start_col": 0, "start_line": 10 }

module ID5 open FStar.Ghost // The base type of WPs val wp0 (a : Type u#a) : Type u#(max 1 a) let wp0 a = (a -> Type0) -> Type0

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Monotonic.Pure.fst.checked", "FStar.List.Tot.fst.checked", "FStar.Ghost.fsti.checked" ], "interface_file": false, "source_file": "ID5.fst" }

[ { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

a: Type -> Type

Prims.Tot

[ "total" ]

[]

[ "Prims.pure_wp" ]

[]

false

true

let wp a =

pure_wp a

false

ID5.fst

ID5.repr

val repr (a: Type u#aa) (w: wp a) : Type u#(max 1 aa)

let repr (a : Type u#aa) (w : wp a) : Type u#(max 1 aa) = // Hmmm, the explicit post bumps the universe level p:erased (a -> Type0) -> squash (w p) -> v:a{reveal p v}

{ "file_name": "examples/layeredeffects/ID5.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 58, "end_line": 14, "start_col": 0, "start_line": 12 }

module ID5 open FStar.Ghost // The base type of WPs val wp0 (a : Type u#a) : Type u#(max 1 a) let wp0 a = (a -> Type0) -> Type0 val wp (a : Type u#a) : Type u#(max 1 a) let wp a = pure_wp a

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Monotonic.Pure.fst.checked", "FStar.List.Tot.fst.checked", "FStar.Ghost.fsti.checked" ], "interface_file": false, "source_file": "ID5.fst" }

[ { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

a: Type -> w: ID5.wp a -> Type

Prims.Tot

[ "total" ]

[]

[ "ID5.wp", "FStar.Ghost.erased", "Prims.squash", "FStar.Ghost.reveal" ]

[]

false

true

let repr (a: Type u#aa) (w: wp a) : Type u#(max 1 aa) =

p: erased (a -> Type0) -> squash (w p) -> v: a{reveal p v}

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.fmul

val fmul: C.(fmul_t M51 True)

let fmul out f1 f2 _ = let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let f20 = f2.(0ul) in let f21 = f2.(1ul) in let f22 = f2.(2ul) in let f23 = f2.(3ul) in let f24 = f2.(4ul) in let (o0,o1,o2,o3,o4) = fmul5 (f10,f11,f12,f13,f14) (f20,f21,f22,f23,f24) in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 17, "end_line": 199, "start_col": 0, "start_line": 180 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem let feval_wideh h f = (wide_as_nat h f) % P.prime noextract let felem_fits = C.f51_felem_fits noextract val felem_wide_fits: h:mem -> f:felem_wide -> m:S.scale128_5 -> Type0 let felem_wide_fits h f m = let s = as_seq h f in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.felem_wide_fits5 (s0, s1, s2, s3, s4) m noextract let as_felem = C.f51_as_felem noextract let mul_inv_t = C.f51_mul_inv_t inline_for_extraction noextract val create_felem: unit -> StackInline felem (requires fun _ -> True) (ensures fun h0 f h1 -> stack_allocated f h0 h1 (LSeq.create 5 (u64 0)) /\ as_nat h1 f == 0) let create_felem () = create 5ul (u64 0) inline_for_extraction noextract val set_zero: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 0) let set_zero f = f.(0ul) <- u64 0; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val set_one: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 1) let set_one f = f.(0ul) <- u64 1; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val copy_felem: f1:felem -> f2:felem -> Stack unit (requires fun h -> live h f1 /\ live h f2 /\ disjoint f1 f2) (ensures fun h0 _ h1 -> modifies (loc f1) h0 h1 /\ as_seq h1 f1 == as_seq h0 f2) let copy_felem f1 f2 = f1.(0ul) <- f2.(0ul); f1.(1ul) <- f2.(1ul); f1.(2ul) <- f2.(2ul); f1.(3ul) <- f2.(3ul); f1.(4ul) <- f2.(4ul); let h1 = ST.get () in LSeq.eq_intro (as_seq h1 f1) (as_seq h1 f2) #set-options "--max_fuel 0 --max_ifuel 0" val fadd: C.(fadd_t M51 True) [@ CInline] let fadd out f1 f2 = let h0 = ST.get () in let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! f20; out.(1ul) <- f11 +! f21; out.(2ul) <- f12 +! f22; out.(3ul) <- f13 +! f23; out.(4ul) <- f14 +! f24; let h1 = ST.get () in assert (as_nat h1 out == as_nat h0 f1 + as_nat h0 f2); FStar.Math.Lemmas.lemma_mod_plus_distr_l (as_nat h0 f1) (as_nat h0 f2) P.prime; FStar.Math.Lemmas.lemma_mod_plus_distr_r (as_nat h0 f1 % P.prime) (as_nat h0 f2) P.prime val fsub: C.(fsub_t M51 True) [@ CInline] let fsub out f1 f2 = let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! u64 0x3fffffffffff68 -! f20; out.(1ul) <- f11 +! u64 0x3ffffffffffff8 -! f21; out.(2ul) <- f12 +! u64 0x3ffffffffffff8 -! f22; out.(3ul) <- f13 +! u64 0x3ffffffffffff8 -! f23; out.(4ul) <- f14 +! u64 0x3ffffffffffff8 -! f24; lemma_fsub (f10, f11, f12, f13, f14) (f20, f21, f22, f23, f24) val fmul: C.(fmul_t M51 True)

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Hacl.Impl.Curve25519.Fields.Core.fmul_t Hacl.Impl.Curve25519.Fields.Core.M51 Prims.l_True

Prims.Tot

[ "total" ]

[]

[ "Hacl.Impl.Curve25519.Fields.Core.felem", "Hacl.Impl.Curve25519.Fields.Core.M51", "Hacl.Impl.Curve25519.Fields.Core.felem_wide2", "Lib.IntTypes.uint64", "Lib.Buffer.op_Array_Assignment", "Hacl.Impl.Curve25519.Fields.Core.limb", "Hacl.Impl.Curve25519.Fields.Core.nlimb", "FStar.UInt32.__uint_to_t", "Prims.unit", "Hacl.Spec.Curve25519.Field51.Definition.felem5", "Prims.l_and", "Hacl.Spec.Curve25519.Field51.mul_inv_t", "Prims.eq2", "Spec.Curve25519.elem", "Hacl.Spec.Curve25519.Field51.Definition.feval", "Spec.Curve25519.fmul", "FStar.Pervasives.Native.Mktuple5", "Lib.IntTypes.int_t", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "Hacl.Spec.Curve25519.Field51.fmul5", "Lib.Buffer.op_Array_Access", "Lib.Buffer.MUT" ]

[]

false

true

false

let fmul out f1 f2 _ =

let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let f20 = f2.(0ul) in let f21 = f2.(1ul) in let f22 = f2.(2ul) in let f23 = f2.(3ul) in let f24 = f2.(4ul) in let o0, o1, o2, o3, o4 = fmul5 (f10, f11, f12, f13, f14) (f20, f21, f22, f23, f24) in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4

false

Hacl.SHA2.Vec128.fst

Hacl.SHA2.Vec128.sha224_init4

val sha224_init4 : Hacl.Impl.SHA2.Generic.init_vec_t Spec.Hash.Definitions.SHA2_224 Hacl.Spec.SHA2.Vec.M128

let sha224_init4 = init #SHA2_224 #M128

{ "file_name": "code/sha2-mb/Hacl.SHA2.Vec128.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 58, "end_line": 23, "start_col": 19, "start_line": 23 }

module Hacl.SHA2.Vec128 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.IntTypes open Lib.NTuple open Lib.Buffer open Lib.MultiBuffer open Spec.Hash.Definitions open Hacl.Spec.SHA2.Vec open Hacl.Impl.SHA2.Generic module ST = FStar.HyperStack.ST module Spec = Spec.Agile.Hash module SpecVec = Hacl.Spec.SHA2.Vec #set-options "--z3rlimit 50 --fuel 0 --ifuel 0"

{ "checked_file": "/", "dependencies": [ "Spec.Hash.Definitions.fst.checked", "Spec.Agile.Hash.fsti.checked", "prims.fst.checked", "Lib.NTuple.fsti.checked", "Lib.MultiBuffer.fst.checked", "Lib.IntTypes.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.SHA2.Vec.fst.checked", "Hacl.Spec.SHA2.Equiv.fst.checked", "Hacl.Impl.SHA2.Generic.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.SHA2.Vec128.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": "SpecVec" }, { "abbrev": true, "full_module": "Spec.Agile.Hash", "short_module": "Spec" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": false, "full_module": "Hacl.Impl.SHA2.Generic", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Lib.MultiBuffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.NTuple", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 50, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Hacl.Impl.SHA2.Generic.init_vec_t Spec.Hash.Definitions.SHA2_224 Hacl.Spec.SHA2.Vec.M128

Prims.Tot

[ "total" ]

[]

[ "Hacl.Impl.SHA2.Generic.init", "Spec.Hash.Definitions.SHA2_224", "Hacl.Spec.SHA2.Vec.M128" ]

[]

false

true

false

let sha224_init4 =

init #SHA2_224 #M128

false

Hacl.SHA2.Vec128.fst

Hacl.SHA2.Vec128.sha224_update4

val sha224_update4 : Hacl.Impl.SHA2.Generic.update_vec_t Spec.Hash.Definitions.SHA2_224 Hacl.Spec.SHA2.Vec.M128

let sha224_update4 = update #SHA2_224 #M128

{ "file_name": "code/sha2-mb/Hacl.SHA2.Vec128.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 62, "end_line": 24, "start_col": 19, "start_line": 24 }

module Hacl.SHA2.Vec128 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.IntTypes open Lib.NTuple open Lib.Buffer open Lib.MultiBuffer open Spec.Hash.Definitions open Hacl.Spec.SHA2.Vec open Hacl.Impl.SHA2.Generic module ST = FStar.HyperStack.ST module Spec = Spec.Agile.Hash module SpecVec = Hacl.Spec.SHA2.Vec #set-options "--z3rlimit 50 --fuel 0 --ifuel 0"

{ "checked_file": "/", "dependencies": [ "Spec.Hash.Definitions.fst.checked", "Spec.Agile.Hash.fsti.checked", "prims.fst.checked", "Lib.NTuple.fsti.checked", "Lib.MultiBuffer.fst.checked", "Lib.IntTypes.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.SHA2.Vec.fst.checked", "Hacl.Spec.SHA2.Equiv.fst.checked", "Hacl.Impl.SHA2.Generic.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.SHA2.Vec128.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": "SpecVec" }, { "abbrev": true, "full_module": "Spec.Agile.Hash", "short_module": "Spec" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": false, "full_module": "Hacl.Impl.SHA2.Generic", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Lib.MultiBuffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.NTuple", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 50, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Hacl.Impl.SHA2.Generic.update_vec_t Spec.Hash.Definitions.SHA2_224 Hacl.Spec.SHA2.Vec.M128

Prims.Tot

[ "total" ]

[]

[ "Hacl.Impl.SHA2.Generic.update", "Spec.Hash.Definitions.SHA2_224", "Hacl.Spec.SHA2.Vec.M128" ]

[]

false

true

false

let sha224_update4 =

update #SHA2_224 #M128

false

Hacl.SHA2.Vec128.fst

Hacl.SHA2.Vec128.sha224_finish4

val sha224_finish4 : Hacl.Impl.SHA2.Generic.finish_vec_t Spec.Hash.Definitions.SHA2_224 Hacl.Spec.SHA2.Vec.M128

let sha224_finish4 = finish #SHA2_224 #M128

{ "file_name": "code/sha2-mb/Hacl.SHA2.Vec128.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 62, "end_line": 27, "start_col": 19, "start_line": 27 }

module Hacl.SHA2.Vec128 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.IntTypes open Lib.NTuple open Lib.Buffer open Lib.MultiBuffer open Spec.Hash.Definitions open Hacl.Spec.SHA2.Vec open Hacl.Impl.SHA2.Generic module ST = FStar.HyperStack.ST module Spec = Spec.Agile.Hash module SpecVec = Hacl.Spec.SHA2.Vec #set-options "--z3rlimit 50 --fuel 0 --ifuel 0" [@CInline] private let sha224_init4 = init #SHA2_224 #M128 [@CInline] private let sha224_update4 = update #SHA2_224 #M128 [@CInline] private let sha224_update_nblocks4 = update_nblocks #SHA2_224 #M128 sha224_update4

{ "checked_file": "/", "dependencies": [ "Spec.Hash.Definitions.fst.checked", "Spec.Agile.Hash.fsti.checked", "prims.fst.checked", "Lib.NTuple.fsti.checked", "Lib.MultiBuffer.fst.checked", "Lib.IntTypes.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.SHA2.Vec.fst.checked", "Hacl.Spec.SHA2.Equiv.fst.checked", "Hacl.Impl.SHA2.Generic.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.SHA2.Vec128.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": "SpecVec" }, { "abbrev": true, "full_module": "Spec.Agile.Hash", "short_module": "Spec" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": false, "full_module": "Hacl.Impl.SHA2.Generic", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Lib.MultiBuffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.NTuple", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 50, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Hacl.Impl.SHA2.Generic.finish_vec_t Spec.Hash.Definitions.SHA2_224 Hacl.Spec.SHA2.Vec.M128

Prims.Tot

[ "total" ]

[]

[ "Hacl.Impl.SHA2.Generic.finish", "Spec.Hash.Definitions.SHA2_224", "Hacl.Spec.SHA2.Vec.M128" ]

[]

false

true

false

let sha224_finish4 =

finish #SHA2_224 #M128

false

Hacl.Impl.Curve25519.Field51.fst

Hacl.Impl.Curve25519.Field51.cswap2

val cswap2: C.(cswap2_t M51 True)

let cswap2 bit p1 p2 = let h0 = ST.get () in let mask = u64 0 -. bit in [@ inline_let] let inv h1 (i:nat{i <= 10}) = (forall (k:nat{k < i}). if v bit = 1 then (as_seq h1 p1).[k] == (as_seq h0 p2).[k] /\ (as_seq h1 p2).[k] == (as_seq h0 p1).[k] else (as_seq h1 p1).[k] == (as_seq h0 p1).[k] /\ (as_seq h1 p2).[k] == (as_seq h0 p2).[k]) /\ (forall (k:nat{i <= k /\ k < 10}). (as_seq h1 p1).[k] == (as_seq h0 p1).[k] /\ (as_seq h1 p2).[k] == (as_seq h0 p2).[k]) /\ modifies (loc p1 |+| loc p2) h0 h1 in Lib.Loops.for 0ul 10ul inv (fun i -> let dummy = mask &. (p1.(i) ^. p2.(i)) in p1.(i) <- p1.(i) ^. dummy; p2.(i) <- p2.(i) ^. dummy; Lemmas.lemma_cswap2_step bit ((as_seq h0 p1).[v i]) ((as_seq h0 p2).[v i]) ); let h1 = ST.get () in Lib.Sequence.eq_intro (as_seq h1 p1) (if v bit = 1 then as_seq h0 p2 else as_seq h0 p1); Lib.Sequence.eq_intro (as_seq h1 p2) (if v bit = 1 then as_seq h0 p1 else as_seq h0 p2)

{ "file_name": "code/curve25519/Hacl.Impl.Curve25519.Field51.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 89, "end_line": 384, "start_col": 0, "start_line": 361 }

module Hacl.Impl.Curve25519.Field51 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.Sequence open Lib.IntTypes open Lib.Buffer include Hacl.Spec.Curve25519.Field51 include Hacl.Spec.Curve25519.Field51.Definition module P = Spec.Curve25519 module S = Hacl.Spec.Curve25519.Field51.Definition module ST = FStar.HyperStack.ST module LSeq = Lib.Sequence module BSeq = Lib.ByteSequence module Lemmas = Hacl.Spec.Curve25519.Field51.Lemmas module C = Hacl.Impl.Curve25519.Fields.Core #reset-options "--z3rlimit 20" let felem = lbuffer uint64 5ul let felem2 = lbuffer uint64 10ul let felem_wide = lbuffer uint128 5ul noextract let as_nat = C.f51_as_nat noextract val wide_as_nat: h:mem -> e:felem_wide -> GTot nat let wide_as_nat h e = let s = as_seq h e in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.wide_as_nat5 (s0, s1, s2, s3, s4) noextract val fevalh: h:mem -> f:felem -> GTot P.elem let fevalh h f = (as_nat h f) % P.prime noextract val feval_wideh: h:mem -> f:felem_wide -> GTot P.elem let feval_wideh h f = (wide_as_nat h f) % P.prime noextract let felem_fits = C.f51_felem_fits noextract val felem_wide_fits: h:mem -> f:felem_wide -> m:S.scale128_5 -> Type0 let felem_wide_fits h f m = let s = as_seq h f in let s0 = s.[0] in let s1 = s.[1] in let s2 = s.[2] in let s3 = s.[3] in let s4 = s.[4] in S.felem_wide_fits5 (s0, s1, s2, s3, s4) m noextract let as_felem = C.f51_as_felem noextract let mul_inv_t = C.f51_mul_inv_t inline_for_extraction noextract val create_felem: unit -> StackInline felem (requires fun _ -> True) (ensures fun h0 f h1 -> stack_allocated f h0 h1 (LSeq.create 5 (u64 0)) /\ as_nat h1 f == 0) let create_felem () = create 5ul (u64 0) inline_for_extraction noextract val set_zero: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 0) let set_zero f = f.(0ul) <- u64 0; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val set_one: f:felem -> Stack unit (requires fun h -> live h f) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ as_nat h1 f == 1) let set_one f = f.(0ul) <- u64 1; f.(1ul) <- u64 0; f.(2ul) <- u64 0; f.(3ul) <- u64 0; f.(4ul) <- u64 0 inline_for_extraction noextract val copy_felem: f1:felem -> f2:felem -> Stack unit (requires fun h -> live h f1 /\ live h f2 /\ disjoint f1 f2) (ensures fun h0 _ h1 -> modifies (loc f1) h0 h1 /\ as_seq h1 f1 == as_seq h0 f2) let copy_felem f1 f2 = f1.(0ul) <- f2.(0ul); f1.(1ul) <- f2.(1ul); f1.(2ul) <- f2.(2ul); f1.(3ul) <- f2.(3ul); f1.(4ul) <- f2.(4ul); let h1 = ST.get () in LSeq.eq_intro (as_seq h1 f1) (as_seq h1 f2) #set-options "--max_fuel 0 --max_ifuel 0" val fadd: C.(fadd_t M51 True) [@ CInline] let fadd out f1 f2 = let h0 = ST.get () in let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! f20; out.(1ul) <- f11 +! f21; out.(2ul) <- f12 +! f22; out.(3ul) <- f13 +! f23; out.(4ul) <- f14 +! f24; let h1 = ST.get () in assert (as_nat h1 out == as_nat h0 f1 + as_nat h0 f2); FStar.Math.Lemmas.lemma_mod_plus_distr_l (as_nat h0 f1) (as_nat h0 f2) P.prime; FStar.Math.Lemmas.lemma_mod_plus_distr_r (as_nat h0 f1 % P.prime) (as_nat h0 f2) P.prime val fsub: C.(fsub_t M51 True) [@ CInline] let fsub out f1 f2 = let f10 = f1.(0ul) in let f20 = f2.(0ul) in let f11 = f1.(1ul) in let f21 = f2.(1ul) in let f12 = f1.(2ul) in let f22 = f2.(2ul) in let f13 = f1.(3ul) in let f23 = f2.(3ul) in let f14 = f1.(4ul) in let f24 = f2.(4ul) in out.(0ul) <- f10 +! u64 0x3fffffffffff68 -! f20; out.(1ul) <- f11 +! u64 0x3ffffffffffff8 -! f21; out.(2ul) <- f12 +! u64 0x3ffffffffffff8 -! f22; out.(3ul) <- f13 +! u64 0x3ffffffffffff8 -! f23; out.(4ul) <- f14 +! u64 0x3ffffffffffff8 -! f24; lemma_fsub (f10, f11, f12, f13, f14) (f20, f21, f22, f23, f24) val fmul: C.(fmul_t M51 True) [@ CInline] let fmul out f1 f2 _ = let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let f20 = f2.(0ul) in let f21 = f2.(1ul) in let f22 = f2.(2ul) in let f23 = f2.(3ul) in let f24 = f2.(4ul) in let (o0,o1,o2,o3,o4) = fmul5 (f10,f11,f12,f13,f14) (f20,f21,f22,f23,f24) in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4 val fmul2: C.(fmul2_t M51 True) #set-options "--z3rlimit 100" [@ CInline] let fmul2 out f1 f2 _ = let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let f20 = f2.(0ul) in let f21 = f2.(1ul) in let f22 = f2.(2ul) in let f23 = f2.(3ul) in let f24 = f2.(4ul) in let f30 = f1.(5ul) in let f31 = f1.(6ul) in let f32 = f1.(7ul) in let f33 = f1.(8ul) in let f34 = f1.(9ul) in let f40 = f2.(5ul) in let f41 = f2.(6ul) in let f42 = f2.(7ul) in let f43 = f2.(8ul) in let f44 = f2.(9ul) in let ((o10,o11,o12,o13,o14), (o20,o21,o22,o23,o24)) = fmul25 (f10,f11,f12,f13,f14) (f20,f21,f22,f23,f24) (f30,f31,f32,f33,f34) (f40,f41,f42,f43,f44) in out.(0ul) <- o10; out.(1ul) <- o11; out.(2ul) <- o12; out.(3ul) <- o13; out.(4ul) <- o14; out.(5ul) <- o20; out.(6ul) <- o21; out.(7ul) <- o22; out.(8ul) <- o23; out.(9ul) <- o24 val fmul1: C.(fmul1_t M51 True) [@ CInline] let fmul1 out f1 f2 = let f10 = f1.(0ul) in let f11 = f1.(1ul) in let f12 = f1.(2ul) in let f13 = f1.(3ul) in let f14 = f1.(4ul) in let (o0,o1,o2,o3,o4) = fmul15 (f10,f11,f12,f13,f14) f2 in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4 val fsqr: C.(fsqr_t M51 True) [@ CInline] let fsqr out f _ = let f0 = f.(0ul) in let f1 = f.(1ul) in let f2 = f.(2ul) in let f3 = f.(3ul) in let f4 = f.(4ul) in let (o0,o1,o2,o3,o4) = fsqr5 (f0,f1,f2,f3,f4) in out.(0ul) <- o0; out.(1ul) <- o1; out.(2ul) <- o2; out.(3ul) <- o3; out.(4ul) <- o4 val fsqr2: C.(fsqr2_t M51 True) [@ CInline] let fsqr2 out f _ = let f10 = f.(0ul) in let f11 = f.(1ul) in let f12 = f.(2ul) in let f13 = f.(3ul) in let f14 = f.(4ul) in let f20 = f.(5ul) in let f21 = f.(6ul) in let f22 = f.(7ul) in let f23 = f.(8ul) in let f24 = f.(9ul) in let ((o10,o11,o12,o13,o14),(o20,o21,o22,o23,o24)) = fsqr25 (f10,f11,f12,f13,f14) (f20,f21,f22,f23,f24) in out.(0ul) <- o10; out.(1ul) <- o11; out.(2ul) <- o12; out.(3ul) <- o13; out.(4ul) <- o14; out.(5ul) <- o20; out.(6ul) <- o21; out.(7ul) <- o22; out.(8ul) <- o23; out.(9ul) <- o24 inline_for_extraction noextract val load_felem: f:felem -> u64s:lbuffer uint64 4ul -> Stack unit (requires fun h -> live h u64s /\ live h f /\ disjoint u64s f /\ v (as_seq h u64s).[3] < pow2 63) (ensures fun h0 _ h1 -> modifies (loc f) h0 h1 /\ //felem_fits h1 f (1, 1, 1, 1, 1) /\ mul_inv_t h1 f /\ as_nat h1 f == BSeq.nat_from_intseq_le (as_seq h0 u64s)) let load_felem f u64s = let h0 = ST.get () in let f0l = u64s.(0ul) &. S.mask51 in let f0h = u64s.(0ul) >>. 51ul in let f1l = ((u64s.(1ul) &. u64 0x3fffffffff)) <<. 13ul in let f1h = u64s.(1ul) >>. 38ul in let f2l = (u64s.(2ul) &. u64 0x1ffffff) <<. 26ul in let f2h = u64s.(2ul) >>. 25ul in let f3l = (u64s.(3ul) &. u64 0xfff) <<. 39ul in let f3h = u64s.(3ul) >>. 12ul in f.(0ul) <- f0l; f.(1ul) <- f0h |. f1l; f.(2ul) <- f1h |. f2l; f.(3ul) <- f2h |. f3l; f.(4ul) <- f3h; Lemmas.lemma_load_felem (as_seq h0 u64s) val store_felem: u64s:lbuffer uint64 4ul -> f:felem -> Stack unit (requires fun h -> live h f /\ live h u64s /\ mul_inv_t h f) (ensures fun h0 _ h1 -> modifies (loc u64s) h0 h1 /\ as_seq h1 u64s == BSeq.nat_to_intseq_le 4 (fevalh h0 f)) let store_felem u64s f = let f0 = f.(0ul) in let f1 = f.(1ul) in let f2 = f.(2ul) in let f3 = f.(3ul) in let f4 = f.(4ul) in let (o0, o1, o2, o3) = store_felem5 (f0, f1, f2, f3, f4) in u64s.(0ul) <- o0; u64s.(1ul) <- o1; u64s.(2ul) <- o2; u64s.(3ul) <- o3; let h1 = ST.get () in Hacl.Impl.Curve25519.Lemmas.lemma_nat_from_uints64_le_4 (as_seq h1 u64s); BSeq.lemma_nat_from_to_intseq_le_preserves_value 4 (as_seq h1 u64s) val cswap2: C.(cswap2_t M51 True)

{ "checked_file": "/", "dependencies": [ "Spec.Curve25519.fst.checked", "prims.fst.checked", "Lib.Sequence.fsti.checked", "Lib.Loops.fsti.checked", "Lib.IntTypes.fsti.checked", "Lib.ByteSequence.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.Curve25519.Field51.Lemmas.fst.checked", "Hacl.Spec.Curve25519.Field51.Definition.fst.checked", "Hacl.Spec.Curve25519.Field51.fst.checked", "Hacl.Impl.Curve25519.Lemmas.fst.checked", "Hacl.Impl.Curve25519.Fields.Core.fsti.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.Impl.Curve25519.Field51.fst" }

[ { "abbrev": true, "full_module": "Hacl.Impl.Curve25519.Fields.Core", "short_module": "C" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Lemmas", "short_module": "Lemmas" }, { "abbrev": true, "full_module": "Lib.ByteSequence", "short_module": "BSeq" }, { "abbrev": true, "full_module": "Lib.Sequence", "short_module": "LSeq" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": true, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": "S" }, { "abbrev": true, "full_module": "Spec.Curve25519", "short_module": "P" }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51.Definition", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.Curve25519.Field51", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "Lib.Sequence", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Impl.Curve25519", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Hacl.Impl.Curve25519.Fields.Core.cswap2_t Hacl.Impl.Curve25519.Fields.Core.M51 Prims.l_True

Prims.Tot

[ "total" ]

[]

[ "Lib.IntTypes.uint64", "Prims.b2t", "Prims.op_LessThanOrEqual", "Lib.IntTypes.v", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "Hacl.Impl.Curve25519.Fields.Core.felem2", "Hacl.Impl.Curve25519.Fields.Core.M51", "Lib.Sequence.eq_intro", "Hacl.Impl.Curve25519.Fields.Core.limb", "Lib.IntTypes.U32", "Lib.IntTypes.PUB", "Lib.IntTypes.op_Plus_Dot", "Hacl.Impl.Curve25519.Fields.Core.nlimb", "Lib.Buffer.as_seq", "Lib.Buffer.MUT", "Prims.op_Equality", "Prims.int", "Prims.bool", "Lib.Sequence.lseq", "Prims.unit", "FStar.Monotonic.HyperStack.mem", "FStar.HyperStack.ST.get", "Lib.Loops.for", "FStar.UInt32.__uint_to_t", "Lib.IntTypes.size_t", "Prims.l_and", "Prims.op_LessThan", "Hacl.Spec.Curve25519.Field51.Lemmas.lemma_cswap2_step", "Lib.Sequence.op_String_Access", "Lib.Buffer.op_Array_Assignment", "Lib.IntTypes.int_t", "Lib.IntTypes.op_Hat_Dot", "Lib.Buffer.op_Array_Access", "Lib.IntTypes.op_Amp_Dot", "Prims.nat", "Prims.logical", "Prims.l_Forall", "Prims.eq2", "Prims.l_or", "FStar.Seq.Base.index", "Lib.Sequence.to_seq", "Lib.Buffer.modifies", "Lib.Buffer.op_Bar_Plus_Bar", "Lib.Buffer.loc", "Lib.IntTypes.op_Subtraction_Dot", "Lib.IntTypes.u64" ]

[]

false

true

false

let cswap2 bit p1 p2 =

false

ID5.fst

ID5.return_wp

val return_wp (#a: _) (x: a) : wp a

let return_wp #a (x:a) : wp a = as_pure_wp (fun p -> p x)

{ "file_name": "examples/layeredeffects/ID5.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 27, "end_line": 20, "start_col": 0, "start_line": 19 }

module ID5 open FStar.Ghost // The base type of WPs val wp0 (a : Type u#a) : Type u#(max 1 a) let wp0 a = (a -> Type0) -> Type0 val wp (a : Type u#a) : Type u#(max 1 a) let wp a = pure_wp a let repr (a : Type u#aa) (w : wp a) : Type u#(max 1 aa) = // Hmmm, the explicit post bumps the universe level p:erased (a -> Type0) -> squash (w p) -> v:a{reveal p v} open FStar.Monotonic.Pure

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Monotonic.Pure.fst.checked", "FStar.List.Tot.fst.checked", "FStar.Ghost.fsti.checked" ], "interface_file": false, "source_file": "ID5.fst" }

[ { "abbrev": false, "full_module": "FStar.Monotonic.Pure", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

x: a -> ID5.wp a

Prims.Tot

[ "total" ]

[]

[ "FStar.Monotonic.Pure.as_pure_wp", "Prims.pure_post", "Prims.pure_pre", "ID5.wp" ]

[]

false

true

false

let return_wp #a (x: a) : wp a =

as_pure_wp (fun p -> p x)

false

Hacl.SHA2.Vec128.fst

Hacl.SHA2.Vec128.sha224_update_nblocks4

val sha224_update_nblocks4 : Hacl.Impl.SHA2.Generic.update_nblocks_vec_t' Spec.Hash.Definitions.SHA2_224 Hacl.Spec.SHA2.Vec.M128

let sha224_update_nblocks4 = update_nblocks #SHA2_224 #M128 sha224_update4

{ "file_name": "code/sha2-mb/Hacl.SHA2.Vec128.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 93, "end_line": 25, "start_col": 19, "start_line": 25 }

module Hacl.SHA2.Vec128 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.IntTypes open Lib.NTuple open Lib.Buffer open Lib.MultiBuffer open Spec.Hash.Definitions open Hacl.Spec.SHA2.Vec open Hacl.Impl.SHA2.Generic module ST = FStar.HyperStack.ST module Spec = Spec.Agile.Hash module SpecVec = Hacl.Spec.SHA2.Vec #set-options "--z3rlimit 50 --fuel 0 --ifuel 0" [@CInline] private let sha224_init4 = init #SHA2_224 #M128

{ "checked_file": "/", "dependencies": [ "Spec.Hash.Definitions.fst.checked", "Spec.Agile.Hash.fsti.checked", "prims.fst.checked", "Lib.NTuple.fsti.checked", "Lib.MultiBuffer.fst.checked", "Lib.IntTypes.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.SHA2.Vec.fst.checked", "Hacl.Spec.SHA2.Equiv.fst.checked", "Hacl.Impl.SHA2.Generic.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.SHA2.Vec128.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": "SpecVec" }, { "abbrev": true, "full_module": "Spec.Agile.Hash", "short_module": "Spec" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": false, "full_module": "Hacl.Impl.SHA2.Generic", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Lib.MultiBuffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.NTuple", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 50, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Hacl.Impl.SHA2.Generic.update_nblocks_vec_t' Spec.Hash.Definitions.SHA2_224 Hacl.Spec.SHA2.Vec.M128

Prims.Tot

[ "total" ]

[]

[ "Hacl.Impl.SHA2.Generic.update_nblocks", "Spec.Hash.Definitions.SHA2_224", "Hacl.Spec.SHA2.Vec.M128", "Hacl.SHA2.Vec128.sha224_update4" ]

[]

false

true

false

let sha224_update_nblocks4 =

update_nblocks #SHA2_224 #M128 sha224_update4

false

ID5.fst

ID5.return

val return (a: Type) (x: a) : repr a (return_wp x)

let return (a : Type) (x : a) : repr a (return_wp x) = // Fun fact: using () instead of _ below makes us // lose the refinement and then this proof fails. // Keep that in mind all ye who enter here. fun p _ -> x

{ "file_name": "examples/layeredeffects/ID5.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 14, "end_line": 26, "start_col": 0, "start_line": 22 }

module ID5 open FStar.Ghost // The base type of WPs val wp0 (a : Type u#a) : Type u#(max 1 a) let wp0 a = (a -> Type0) -> Type0 val wp (a : Type u#a) : Type u#(max 1 a) let wp a = pure_wp a let repr (a : Type u#aa) (w : wp a) : Type u#(max 1 aa) = // Hmmm, the explicit post bumps the universe level p:erased (a -> Type0) -> squash (w p) -> v:a{reveal p v} open FStar.Monotonic.Pure unfold let return_wp #a (x:a) : wp a = as_pure_wp (fun p -> p x)

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Monotonic.Pure.fst.checked", "FStar.List.Tot.fst.checked", "FStar.Ghost.fsti.checked" ], "interface_file": false, "source_file": "ID5.fst" }

[ { "abbrev": false, "full_module": "FStar.Monotonic.Pure", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

a: Type -> x: a -> ID5.repr a (ID5.return_wp x)

Prims.Tot

[ "total" ]

[]

[ "FStar.Ghost.erased", "Prims.squash", "ID5.return_wp", "FStar.Ghost.reveal", "ID5.repr" ]

[]

false

let return (a: Type) (x: a) : repr a (return_wp x) =

fun p _ -> x

false

Hacl.SHA2.Vec128.fst

Hacl.SHA2.Vec128.sha224_update_last4

val sha224_update_last4 : Hacl.Impl.SHA2.Generic.update_last_vec_t' Spec.Hash.Definitions.SHA2_224 Hacl.Spec.SHA2.Vec.M128

let sha224_update_last4 = update_last #SHA2_224 #M128 sha224_update4

{ "file_name": "code/sha2-mb/Hacl.SHA2.Vec128.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 87, "end_line": 26, "start_col": 19, "start_line": 26 }

module Hacl.SHA2.Vec128 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.IntTypes open Lib.NTuple open Lib.Buffer open Lib.MultiBuffer open Spec.Hash.Definitions open Hacl.Spec.SHA2.Vec open Hacl.Impl.SHA2.Generic module ST = FStar.HyperStack.ST module Spec = Spec.Agile.Hash module SpecVec = Hacl.Spec.SHA2.Vec #set-options "--z3rlimit 50 --fuel 0 --ifuel 0" [@CInline] private let sha224_init4 = init #SHA2_224 #M128 [@CInline] private let sha224_update4 = update #SHA2_224 #M128

{ "checked_file": "/", "dependencies": [ "Spec.Hash.Definitions.fst.checked", "Spec.Agile.Hash.fsti.checked", "prims.fst.checked", "Lib.NTuple.fsti.checked", "Lib.MultiBuffer.fst.checked", "Lib.IntTypes.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.SHA2.Vec.fst.checked", "Hacl.Spec.SHA2.Equiv.fst.checked", "Hacl.Impl.SHA2.Generic.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.SHA2.Vec128.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": "SpecVec" }, { "abbrev": true, "full_module": "Spec.Agile.Hash", "short_module": "Spec" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": false, "full_module": "Hacl.Impl.SHA2.Generic", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Lib.MultiBuffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.NTuple", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 50, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Hacl.Impl.SHA2.Generic.update_last_vec_t' Spec.Hash.Definitions.SHA2_224 Hacl.Spec.SHA2.Vec.M128

Prims.Tot

[ "total" ]

[]

[ "Hacl.Impl.SHA2.Generic.update_last", "Spec.Hash.Definitions.SHA2_224", "Hacl.Spec.SHA2.Vec.M128", "Hacl.SHA2.Vec128.sha224_update4" ]

[]

false

true

false

let sha224_update_last4 =

update_last #SHA2_224 #M128 sha224_update4

false

ID5.fst

ID5.bind

val bind (a b: Type) (wp_v: wp a) (wp_f: (a -> wp b)) (v: repr a wp_v) (f: (x: a -> repr b (wp_f x))) : repr b (bind_wp wp_v wp_f)

let bind (a b : Type) (wp_v : wp a) (wp_f: a -> wp b) (v : repr a wp_v) (f : (x:a -> repr b (wp_f x))) : repr b (bind_wp wp_v wp_f) = fun p _ -> let x = v (fun x -> wp_f x p) () in f x p ()

{ "file_name": "examples/layeredeffects/ID5.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 18, "end_line": 41, "start_col": 0, "start_line": 36 }

module ID5 open FStar.Ghost // The base type of WPs val wp0 (a : Type u#a) : Type u#(max 1 a) let wp0 a = (a -> Type0) -> Type0 val wp (a : Type u#a) : Type u#(max 1 a) let wp a = pure_wp a let repr (a : Type u#aa) (w : wp a) : Type u#(max 1 aa) = // Hmmm, the explicit post bumps the universe level p:erased (a -> Type0) -> squash (w p) -> v:a{reveal p v} open FStar.Monotonic.Pure unfold let return_wp #a (x:a) : wp a = as_pure_wp (fun p -> p x) let return (a : Type) (x : a) : repr a (return_wp x) = // Fun fact: using () instead of _ below makes us // lose the refinement and then this proof fails. // Keep that in mind all ye who enter here. fun p _ -> x unfold let bind_wp #a #b (wp_v : wp a) (wp_f : (x:a -> wp b)) : wp b = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun p -> wp_v (fun x -> wp_f x p))

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Monotonic.Pure.fst.checked", "FStar.List.Tot.fst.checked", "FStar.Ghost.fsti.checked" ], "interface_file": false, "source_file": "ID5.fst" }

[ { "abbrev": false, "full_module": "FStar.Monotonic.Pure", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

a: Type -> b: Type -> wp_v: ID5.wp a -> wp_f: (_: a -> ID5.wp b) -> v: ID5.repr a wp_v -> f: (x: a -> ID5.repr b (wp_f x)) -> ID5.repr b (ID5.bind_wp wp_v wp_f)

Prims.Tot

[ "total" ]

[]

[ "ID5.wp", "ID5.repr", "FStar.Ghost.erased", "Prims.squash", "ID5.bind_wp", "FStar.Ghost.reveal", "FStar.Ghost.hide" ]

[]

false

let bind (a b: Type) (wp_v: wp a) (wp_f: (a -> wp b)) (v: repr a wp_v) (f: (x: a -> repr b (wp_f x))) : repr b (bind_wp wp_v wp_f) =

fun p _ -> let x = v (fun x -> wp_f x p) () in f x p ()

false

ID5.fst

ID5.bind_wp

val bind_wp (#a #b: _) (wp_v: wp a) (wp_f: (x: a -> wp b)) : wp b

let bind_wp #a #b (wp_v : wp a) (wp_f : (x:a -> wp b)) : wp b = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun p -> wp_v (fun x -> wp_f x p))

{ "file_name": "examples/layeredeffects/ID5.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 50, "end_line": 34, "start_col": 0, "start_line": 29 }

module ID5 open FStar.Ghost // The base type of WPs val wp0 (a : Type u#a) : Type u#(max 1 a) let wp0 a = (a -> Type0) -> Type0 val wp (a : Type u#a) : Type u#(max 1 a) let wp a = pure_wp a let repr (a : Type u#aa) (w : wp a) : Type u#(max 1 aa) = // Hmmm, the explicit post bumps the universe level p:erased (a -> Type0) -> squash (w p) -> v:a{reveal p v} open FStar.Monotonic.Pure unfold let return_wp #a (x:a) : wp a = as_pure_wp (fun p -> p x) let return (a : Type) (x : a) : repr a (return_wp x) = // Fun fact: using () instead of _ below makes us // lose the refinement and then this proof fails. // Keep that in mind all ye who enter here. fun p _ -> x

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Monotonic.Pure.fst.checked", "FStar.List.Tot.fst.checked", "FStar.Ghost.fsti.checked" ], "interface_file": false, "source_file": "ID5.fst" }

[ { "abbrev": false, "full_module": "FStar.Monotonic.Pure", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

wp_v: ID5.wp a -> wp_f: (x: a -> ID5.wp b) -> ID5.wp b

Prims.Tot

[ "total" ]

[]

[ "ID5.wp", "FStar.Monotonic.Pure.as_pure_wp", "Prims.pure_post", "Prims.l_True", "Prims.pure_pre", "Prims.unit", "FStar.Monotonic.Pure.elim_pure_wp_monotonicity_forall" ]

[]

false

true

false

let bind_wp #a #b (wp_v: wp a) (wp_f: (x: a -> wp b)) : wp b =

elim_pure_wp_monotonicity_forall (); as_pure_wp (fun p -> wp_v (fun x -> wp_f x p))

false

ID5.fst

ID5.l

val l: Prims.unit -> int

let l () : int = reify (test_f ()) (fun _ -> True) ()

{ "file_name": "examples/layeredeffects/ID5.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 53, "end_line": 145, "start_col": 0, "start_line": 145 }

module ID5 open FStar.Ghost // The base type of WPs val wp0 (a : Type u#a) : Type u#(max 1 a) let wp0 a = (a -> Type0) -> Type0 val wp (a : Type u#a) : Type u#(max 1 a) let wp a = pure_wp a let repr (a : Type u#aa) (w : wp a) : Type u#(max 1 aa) = // Hmmm, the explicit post bumps the universe level p:erased (a -> Type0) -> squash (w p) -> v:a{reveal p v} open FStar.Monotonic.Pure unfold let return_wp #a (x:a) : wp a = as_pure_wp (fun p -> p x) let return (a : Type) (x : a) : repr a (return_wp x) = // Fun fact: using () instead of _ below makes us // lose the refinement and then this proof fails. // Keep that in mind all ye who enter here. fun p _ -> x unfold let bind_wp #a #b (wp_v : wp a) (wp_f : (x:a -> wp b)) : wp b = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun p -> wp_v (fun x -> wp_f x p)) let bind (a b : Type) (wp_v : wp a) (wp_f: a -> wp b) (v : repr a wp_v) (f : (x:a -> repr b (wp_f x))) : repr b (bind_wp wp_v wp_f) = fun p _ -> let x = v (fun x -> wp_f x p) () in f x p () irreducible let refine : unit = () let subcomp (a:Type u#uu) (w1 w2:wp a) (f : repr a w1) : Pure (repr a w2) (requires forall p. w2 p ==> w1 p) (ensures fun _ -> True) = f // useful? //let subcomp (a b:Type u#uu) (w1:wp a) (w2: wp b) // (f : repr a w1) //: Pure (repr b w2) // (requires a `subtype_of` b /\ (forall (p:b->Type0). w2 p ==> w1 (fun x -> p x))) // (ensures fun _ -> True) //= fun p pf -> f (hide (fun x -> reveal p x)) () unfold let ite_wp #a (wp1 wp2 : wp a) (b : bool) : wp a = elim_pure_wp_monotonicity_forall (); (as_pure_wp (fun (p:a -> Type) -> (b ==> wp1 p) /\ ((~b) ==> wp2 p))) let if_then_else (a : Type) (wp1 wp2 : wp a) (f : repr a wp1) (g : repr a wp2) (p : bool) : Type = repr a (ite_wp wp1 wp2 p) let default_if_then_else (a:Type) (wp:wp a) (f:repr a wp) (g:repr a wp) (p:bool) : Type = repr a wp unfold let strengthen_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p /\ w post) let strengthen #a #w (p:Type0) (f : squash p -> repr a w) : repr a (strengthen_wp w p) = fun post _ -> f () post () unfold let weaken_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p ==> w post) let weaken #a #w (p:Type0) (f : repr a w) : Pure (repr a (weaken_wp w p)) (requires p) (ensures (fun _ -> True)) = fun post _ -> f post () unfold let cut_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p /\ (p ==> w post)) let cut #a #w (p:Type0) (f : repr a w) : repr a (cut_wp w p) = strengthen p (fun _ -> weaken p f) // requires to prove that // p ==> f <: (if_then_else p f g) // ~p ==> g <: (if_then_else p f g) // if the effect definition fails, add lemmas for the // above with smtpats total reifiable reflectable effect { ID (a:Type) (_:wp a) with {repr; return; bind; subcomp; if_then_else} } effect Id (a:Type) (pre:Type0) (post:a->Type0) = ID a (as_pure_wp (fun p -> pre /\ (forall x. post x ==> p x))) effect I (a:Type) = Id a True (fun _ -> True) open FStar.Tactics.V2 let lift_pure_nd (a:Type) (wp:wp a) (f:unit -> PURE a wp) : Pure (repr a wp) (requires True) (ensures (fun _ -> True)) = fun p _ -> elim_pure f p sub_effect PURE ~> ID = lift_pure_nd //tests to make sure we are actually checking subcomp even now let apply (f:unit -> Id int True (fun x -> x > 3)) : Id int True (fun x -> x > 2) = f () [@@expect_failure] let incorrect_apply (f:unit -> Id int True (fun x -> x > 3)) : Id int True (fun x -> x > 5) = f () [@@expect_failure] let another_one (n:int) (f:(x:int -> Id int (x > 0) (fun _ -> True))) : Id int True (fun _ -> True) = f n let iassert (q:Type0) : ID unit (as_pure_wp (fun p -> q /\ (q ==> p ()))) = () assume val iassume (q:Type0) : ID unit (as_pure_wp (fun p -> q ==> p ())) (* Checking that it's kind of usable *) val test_f : unit -> ID int (as_pure_wp (fun p -> p 5 /\ p 3)) let test_f () = 3

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Monotonic.Pure.fst.checked", "FStar.List.Tot.fst.checked", "FStar.Ghost.fsti.checked" ], "interface_file": false, "source_file": "ID5.fst" }

[ { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "FStar.Monotonic.Pure", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

_: Prims.unit -> Prims.int

Prims.Tot

[ "total" ]

[]

[ "Prims.unit", "ID5.test_f", "Prims.int", "FStar.Ghost.hide", "Prims.l_True" ]

[]

false

true

false

let l () : int =

reify (test_f ()) (fun _ -> True) ()

false

Hacl.SHA2.Vec128.fst

Hacl.SHA2.Vec128.sha256_init4

val sha256_init4 : Hacl.Impl.SHA2.Generic.init_vec_t Spec.Hash.Definitions.SHA2_256 Hacl.Spec.SHA2.Vec.M128

let sha256_init4 = init #SHA2_256 #M128

{ "file_name": "code/sha2-mb/Hacl.SHA2.Vec128.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 58, "end_line": 59, "start_col": 19, "start_line": 59 }

module Hacl.SHA2.Vec128 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.IntTypes open Lib.NTuple open Lib.Buffer open Lib.MultiBuffer open Spec.Hash.Definitions open Hacl.Spec.SHA2.Vec open Hacl.Impl.SHA2.Generic module ST = FStar.HyperStack.ST module Spec = Spec.Agile.Hash module SpecVec = Hacl.Spec.SHA2.Vec #set-options "--z3rlimit 50 --fuel 0 --ifuel 0" [@CInline] private let sha224_init4 = init #SHA2_224 #M128 [@CInline] private let sha224_update4 = update #SHA2_224 #M128 [@CInline] private let sha224_update_nblocks4 = update_nblocks #SHA2_224 #M128 sha224_update4 [@CInline] private let sha224_update_last4 = update_last #SHA2_224 #M128 sha224_update4 [@CInline] private let sha224_finish4 = finish #SHA2_224 #M128 val sha224_4 (dst0 dst1 dst2 dst3: lbuffer uint8 28ul) (input_len:size_t) (input0 input1 input2 input3: lbuffer uint8 input_len) : Stack unit (requires fun h0 -> v input_len `less_than_max_input_length` SHA2_224 /\ live4 h0 input0 input1 input2 input3 /\ live4 h0 dst0 dst1 dst2 dst3 /\ internally_disjoint4 dst0 dst1 dst2 dst3) (ensures fun h0 _ h1 -> modifies (loc dst0 |+| loc dst1 |+| loc dst2 |+| loc dst3) h0 h1 /\ as_seq h1 dst0 == Spec.hash SHA2_224 (as_seq h0 input0) /\ as_seq h1 dst1 == Spec.hash SHA2_224 (as_seq h0 input1) /\ as_seq h1 dst2 == Spec.hash SHA2_224 (as_seq h0 input2) /\ as_seq h1 dst3 == Spec.hash SHA2_224 (as_seq h0 input3)) let sha224_4 dst0 dst1 dst2 dst3 input_len input0 input1 input2 input3 = let ib = ntup4 (input0,(input1,(input2,input3))) in let rb = ntup4 (dst0,(dst1,(dst2,dst3))) in let h0 = ST.get() in assert (live_multi h0 ib); assert (live_multi h0 rb); assert (internally_disjoint rb); loc_multi4 rb; hash #SHA2_224 #M128 sha224_init4 sha224_update_nblocks4 sha224_update_last4 sha224_finish4 rb input_len ib; let h1 = ST.get() in Hacl.Spec.SHA2.Equiv.hash_agile_lemma #SHA2_224 #M128 (v input_len) (as_seq_multi h0 ib); assert ((as_seq_multi h1 rb).(|0|) == as_seq h1 dst0); assert ((as_seq_multi h1 rb).(|1|) == as_seq h1 dst1); assert ((as_seq_multi h1 rb).(|2|) == as_seq h1 dst2); assert ((as_seq_multi h1 rb).(|3|) == as_seq h1 dst3)

{ "checked_file": "/", "dependencies": [ "Spec.Hash.Definitions.fst.checked", "Spec.Agile.Hash.fsti.checked", "prims.fst.checked", "Lib.NTuple.fsti.checked", "Lib.MultiBuffer.fst.checked", "Lib.IntTypes.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.SHA2.Vec.fst.checked", "Hacl.Spec.SHA2.Equiv.fst.checked", "Hacl.Impl.SHA2.Generic.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.SHA2.Vec128.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": "SpecVec" }, { "abbrev": true, "full_module": "Spec.Agile.Hash", "short_module": "Spec" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": false, "full_module": "Hacl.Impl.SHA2.Generic", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Lib.MultiBuffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.NTuple", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 50, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Hacl.Impl.SHA2.Generic.init_vec_t Spec.Hash.Definitions.SHA2_256 Hacl.Spec.SHA2.Vec.M128

Prims.Tot

[ "total" ]

[]

[ "Hacl.Impl.SHA2.Generic.init", "Spec.Hash.Definitions.SHA2_256", "Hacl.Spec.SHA2.Vec.M128" ]

[]

false

true

false

let sha256_init4 =

init #SHA2_256 #M128

false

ID5.fst

ID5.even

val even : x: Prims.int -> Prims.logical

let even x = x % 2 == 0

{ "file_name": "examples/layeredeffects/ID5.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 23, "end_line": 159, "start_col": 0, "start_line": 159 }

module ID5 open FStar.Ghost // The base type of WPs val wp0 (a : Type u#a) : Type u#(max 1 a) let wp0 a = (a -> Type0) -> Type0 val wp (a : Type u#a) : Type u#(max 1 a) let wp a = pure_wp a let repr (a : Type u#aa) (w : wp a) : Type u#(max 1 aa) = // Hmmm, the explicit post bumps the universe level p:erased (a -> Type0) -> squash (w p) -> v:a{reveal p v} open FStar.Monotonic.Pure unfold let return_wp #a (x:a) : wp a = as_pure_wp (fun p -> p x) let return (a : Type) (x : a) : repr a (return_wp x) = // Fun fact: using () instead of _ below makes us // lose the refinement and then this proof fails. // Keep that in mind all ye who enter here. fun p _ -> x unfold let bind_wp #a #b (wp_v : wp a) (wp_f : (x:a -> wp b)) : wp b = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun p -> wp_v (fun x -> wp_f x p)) let bind (a b : Type) (wp_v : wp a) (wp_f: a -> wp b) (v : repr a wp_v) (f : (x:a -> repr b (wp_f x))) : repr b (bind_wp wp_v wp_f) = fun p _ -> let x = v (fun x -> wp_f x p) () in f x p () irreducible let refine : unit = () let subcomp (a:Type u#uu) (w1 w2:wp a) (f : repr a w1) : Pure (repr a w2) (requires forall p. w2 p ==> w1 p) (ensures fun _ -> True) = f // useful? //let subcomp (a b:Type u#uu) (w1:wp a) (w2: wp b) // (f : repr a w1) //: Pure (repr b w2) // (requires a `subtype_of` b /\ (forall (p:b->Type0). w2 p ==> w1 (fun x -> p x))) // (ensures fun _ -> True) //= fun p pf -> f (hide (fun x -> reveal p x)) () unfold let ite_wp #a (wp1 wp2 : wp a) (b : bool) : wp a = elim_pure_wp_monotonicity_forall (); (as_pure_wp (fun (p:a -> Type) -> (b ==> wp1 p) /\ ((~b) ==> wp2 p))) let if_then_else (a : Type) (wp1 wp2 : wp a) (f : repr a wp1) (g : repr a wp2) (p : bool) : Type = repr a (ite_wp wp1 wp2 p) let default_if_then_else (a:Type) (wp:wp a) (f:repr a wp) (g:repr a wp) (p:bool) : Type = repr a wp unfold let strengthen_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p /\ w post) let strengthen #a #w (p:Type0) (f : squash p -> repr a w) : repr a (strengthen_wp w p) = fun post _ -> f () post () unfold let weaken_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p ==> w post) let weaken #a #w (p:Type0) (f : repr a w) : Pure (repr a (weaken_wp w p)) (requires p) (ensures (fun _ -> True)) = fun post _ -> f post () unfold let cut_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p /\ (p ==> w post)) let cut #a #w (p:Type0) (f : repr a w) : repr a (cut_wp w p) = strengthen p (fun _ -> weaken p f) // requires to prove that // p ==> f <: (if_then_else p f g) // ~p ==> g <: (if_then_else p f g) // if the effect definition fails, add lemmas for the // above with smtpats total reifiable reflectable effect { ID (a:Type) (_:wp a) with {repr; return; bind; subcomp; if_then_else} } effect Id (a:Type) (pre:Type0) (post:a->Type0) = ID a (as_pure_wp (fun p -> pre /\ (forall x. post x ==> p x))) effect I (a:Type) = Id a True (fun _ -> True) open FStar.Tactics.V2 let lift_pure_nd (a:Type) (wp:wp a) (f:unit -> PURE a wp) : Pure (repr a wp) (requires True) (ensures (fun _ -> True)) = fun p _ -> elim_pure f p sub_effect PURE ~> ID = lift_pure_nd //tests to make sure we are actually checking subcomp even now let apply (f:unit -> Id int True (fun x -> x > 3)) : Id int True (fun x -> x > 2) = f () [@@expect_failure] let incorrect_apply (f:unit -> Id int True (fun x -> x > 3)) : Id int True (fun x -> x > 5) = f () [@@expect_failure] let another_one (n:int) (f:(x:int -> Id int (x > 0) (fun _ -> True))) : Id int True (fun _ -> True) = f n let iassert (q:Type0) : ID unit (as_pure_wp (fun p -> q /\ (q ==> p ()))) = () assume val iassume (q:Type0) : ID unit (as_pure_wp (fun p -> q ==> p ())) (* Checking that it's kind of usable *) val test_f : unit -> ID int (as_pure_wp (fun p -> p 5 /\ p 3)) let test_f () = 3 let l () : int = reify (test_f ()) (fun _ -> True) () open FStar.List.Tot let rec map #a #b #pre (f : (x:a -> Id b (requires (pre x)) (ensures (fun _ -> True)))) (l : list a) : Id (list b) (requires (forall x. memP x l ==> pre x)) (ensures (fun _ -> True)) = match l with | [] -> [] | x::xs -> f x :: map #_ #_ #pre f xs

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Monotonic.Pure.fst.checked", "FStar.List.Tot.fst.checked", "FStar.Ghost.fsti.checked" ], "interface_file": false, "source_file": "ID5.fst" }

[ { "abbrev": false, "full_module": "FStar.List.Tot", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "FStar.Monotonic.Pure", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

x: Prims.int -> Prims.logical

Prims.Tot

[ "total" ]

[]

[ "Prims.int", "Prims.eq2", "Prims.op_Modulus", "Prims.logical" ]

[]

false

true

let even x =

x % 2 == 0

false

Hacl.SHA2.Vec128.fst

Hacl.SHA2.Vec128.sha256_update4

val sha256_update4 : Hacl.Impl.SHA2.Generic.update_vec_t Spec.Hash.Definitions.SHA2_256 Hacl.Spec.SHA2.Vec.M128

let sha256_update4 = update #SHA2_256 #M128

{ "file_name": "code/sha2-mb/Hacl.SHA2.Vec128.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 62, "end_line": 60, "start_col": 19, "start_line": 60 }

module Hacl.SHA2.Vec128 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.IntTypes open Lib.NTuple open Lib.Buffer open Lib.MultiBuffer open Spec.Hash.Definitions open Hacl.Spec.SHA2.Vec open Hacl.Impl.SHA2.Generic module ST = FStar.HyperStack.ST module Spec = Spec.Agile.Hash module SpecVec = Hacl.Spec.SHA2.Vec #set-options "--z3rlimit 50 --fuel 0 --ifuel 0" [@CInline] private let sha224_init4 = init #SHA2_224 #M128 [@CInline] private let sha224_update4 = update #SHA2_224 #M128 [@CInline] private let sha224_update_nblocks4 = update_nblocks #SHA2_224 #M128 sha224_update4 [@CInline] private let sha224_update_last4 = update_last #SHA2_224 #M128 sha224_update4 [@CInline] private let sha224_finish4 = finish #SHA2_224 #M128 val sha224_4 (dst0 dst1 dst2 dst3: lbuffer uint8 28ul) (input_len:size_t) (input0 input1 input2 input3: lbuffer uint8 input_len) : Stack unit (requires fun h0 -> v input_len `less_than_max_input_length` SHA2_224 /\ live4 h0 input0 input1 input2 input3 /\ live4 h0 dst0 dst1 dst2 dst3 /\ internally_disjoint4 dst0 dst1 dst2 dst3) (ensures fun h0 _ h1 -> modifies (loc dst0 |+| loc dst1 |+| loc dst2 |+| loc dst3) h0 h1 /\ as_seq h1 dst0 == Spec.hash SHA2_224 (as_seq h0 input0) /\ as_seq h1 dst1 == Spec.hash SHA2_224 (as_seq h0 input1) /\ as_seq h1 dst2 == Spec.hash SHA2_224 (as_seq h0 input2) /\ as_seq h1 dst3 == Spec.hash SHA2_224 (as_seq h0 input3)) let sha224_4 dst0 dst1 dst2 dst3 input_len input0 input1 input2 input3 = let ib = ntup4 (input0,(input1,(input2,input3))) in let rb = ntup4 (dst0,(dst1,(dst2,dst3))) in let h0 = ST.get() in assert (live_multi h0 ib); assert (live_multi h0 rb); assert (internally_disjoint rb); loc_multi4 rb; hash #SHA2_224 #M128 sha224_init4 sha224_update_nblocks4 sha224_update_last4 sha224_finish4 rb input_len ib; let h1 = ST.get() in Hacl.Spec.SHA2.Equiv.hash_agile_lemma #SHA2_224 #M128 (v input_len) (as_seq_multi h0 ib); assert ((as_seq_multi h1 rb).(|0|) == as_seq h1 dst0); assert ((as_seq_multi h1 rb).(|1|) == as_seq h1 dst1); assert ((as_seq_multi h1 rb).(|2|) == as_seq h1 dst2); assert ((as_seq_multi h1 rb).(|3|) == as_seq h1 dst3)

{ "checked_file": "/", "dependencies": [ "Spec.Hash.Definitions.fst.checked", "Spec.Agile.Hash.fsti.checked", "prims.fst.checked", "Lib.NTuple.fsti.checked", "Lib.MultiBuffer.fst.checked", "Lib.IntTypes.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.SHA2.Vec.fst.checked", "Hacl.Spec.SHA2.Equiv.fst.checked", "Hacl.Impl.SHA2.Generic.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.SHA2.Vec128.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": "SpecVec" }, { "abbrev": true, "full_module": "Spec.Agile.Hash", "short_module": "Spec" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": false, "full_module": "Hacl.Impl.SHA2.Generic", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Lib.MultiBuffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.NTuple", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 50, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Hacl.Impl.SHA2.Generic.update_vec_t Spec.Hash.Definitions.SHA2_256 Hacl.Spec.SHA2.Vec.M128

Prims.Tot

[ "total" ]

[]

[ "Hacl.Impl.SHA2.Generic.update", "Spec.Hash.Definitions.SHA2_256", "Hacl.Spec.SHA2.Vec.M128" ]

[]

false

true

false

let sha256_update4 =

update #SHA2_256 #M128

false

Hacl.SHA2.Vec128.fst

Hacl.SHA2.Vec128.sha256_finish4

val sha256_finish4 : Hacl.Impl.SHA2.Generic.finish_vec_t Spec.Hash.Definitions.SHA2_256 Hacl.Spec.SHA2.Vec.M128

let sha256_finish4 = finish #SHA2_256 #M128

{ "file_name": "code/sha2-mb/Hacl.SHA2.Vec128.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 62, "end_line": 63, "start_col": 19, "start_line": 63 }

module Hacl.SHA2.Vec128 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.IntTypes open Lib.NTuple open Lib.Buffer open Lib.MultiBuffer open Spec.Hash.Definitions open Hacl.Spec.SHA2.Vec open Hacl.Impl.SHA2.Generic module ST = FStar.HyperStack.ST module Spec = Spec.Agile.Hash module SpecVec = Hacl.Spec.SHA2.Vec #set-options "--z3rlimit 50 --fuel 0 --ifuel 0" [@CInline] private let sha224_init4 = init #SHA2_224 #M128 [@CInline] private let sha224_update4 = update #SHA2_224 #M128 [@CInline] private let sha224_update_nblocks4 = update_nblocks #SHA2_224 #M128 sha224_update4 [@CInline] private let sha224_update_last4 = update_last #SHA2_224 #M128 sha224_update4 [@CInline] private let sha224_finish4 = finish #SHA2_224 #M128 val sha224_4 (dst0 dst1 dst2 dst3: lbuffer uint8 28ul) (input_len:size_t) (input0 input1 input2 input3: lbuffer uint8 input_len) : Stack unit (requires fun h0 -> v input_len `less_than_max_input_length` SHA2_224 /\ live4 h0 input0 input1 input2 input3 /\ live4 h0 dst0 dst1 dst2 dst3 /\ internally_disjoint4 dst0 dst1 dst2 dst3) (ensures fun h0 _ h1 -> modifies (loc dst0 |+| loc dst1 |+| loc dst2 |+| loc dst3) h0 h1 /\ as_seq h1 dst0 == Spec.hash SHA2_224 (as_seq h0 input0) /\ as_seq h1 dst1 == Spec.hash SHA2_224 (as_seq h0 input1) /\ as_seq h1 dst2 == Spec.hash SHA2_224 (as_seq h0 input2) /\ as_seq h1 dst3 == Spec.hash SHA2_224 (as_seq h0 input3)) let sha224_4 dst0 dst1 dst2 dst3 input_len input0 input1 input2 input3 = let ib = ntup4 (input0,(input1,(input2,input3))) in let rb = ntup4 (dst0,(dst1,(dst2,dst3))) in let h0 = ST.get() in assert (live_multi h0 ib); assert (live_multi h0 rb); assert (internally_disjoint rb); loc_multi4 rb; hash #SHA2_224 #M128 sha224_init4 sha224_update_nblocks4 sha224_update_last4 sha224_finish4 rb input_len ib; let h1 = ST.get() in Hacl.Spec.SHA2.Equiv.hash_agile_lemma #SHA2_224 #M128 (v input_len) (as_seq_multi h0 ib); assert ((as_seq_multi h1 rb).(|0|) == as_seq h1 dst0); assert ((as_seq_multi h1 rb).(|1|) == as_seq h1 dst1); assert ((as_seq_multi h1 rb).(|2|) == as_seq h1 dst2); assert ((as_seq_multi h1 rb).(|3|) == as_seq h1 dst3) [@CInline] private let sha256_init4 = init #SHA2_256 #M128 [@CInline] private let sha256_update4 = update #SHA2_256 #M128 [@CInline] private let sha256_update_nblocks4 = update_nblocks #SHA2_256 #M128 sha256_update4

{ "checked_file": "/", "dependencies": [ "Spec.Hash.Definitions.fst.checked", "Spec.Agile.Hash.fsti.checked", "prims.fst.checked", "Lib.NTuple.fsti.checked", "Lib.MultiBuffer.fst.checked", "Lib.IntTypes.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.SHA2.Vec.fst.checked", "Hacl.Spec.SHA2.Equiv.fst.checked", "Hacl.Impl.SHA2.Generic.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.SHA2.Vec128.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": "SpecVec" }, { "abbrev": true, "full_module": "Spec.Agile.Hash", "short_module": "Spec" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": false, "full_module": "Hacl.Impl.SHA2.Generic", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Lib.MultiBuffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.NTuple", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 50, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Hacl.Impl.SHA2.Generic.finish_vec_t Spec.Hash.Definitions.SHA2_256 Hacl.Spec.SHA2.Vec.M128

Prims.Tot

[ "total" ]

[]

[ "Hacl.Impl.SHA2.Generic.finish", "Spec.Hash.Definitions.SHA2_256", "Hacl.Spec.SHA2.Vec.M128" ]

[]

false

true

false

let sha256_finish4 =

finish #SHA2_256 #M128

false

ID5.fst

ID5.ite_wp

val ite_wp (#a: _) (wp1 wp2: wp a) (b: bool) : wp a

let ite_wp #a (wp1 wp2 : wp a) (b : bool) : wp a = elim_pure_wp_monotonicity_forall (); (as_pure_wp (fun (p:a -> Type) -> (b ==> wp1 p) /\ ((~b) ==> wp2 p)))

{ "file_name": "examples/layeredeffects/ID5.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 71, "end_line": 63, "start_col": 0, "start_line": 61 }

module ID5 open FStar.Ghost // The base type of WPs val wp0 (a : Type u#a) : Type u#(max 1 a) let wp0 a = (a -> Type0) -> Type0 val wp (a : Type u#a) : Type u#(max 1 a) let wp a = pure_wp a let repr (a : Type u#aa) (w : wp a) : Type u#(max 1 aa) = // Hmmm, the explicit post bumps the universe level p:erased (a -> Type0) -> squash (w p) -> v:a{reveal p v} open FStar.Monotonic.Pure unfold let return_wp #a (x:a) : wp a = as_pure_wp (fun p -> p x) let return (a : Type) (x : a) : repr a (return_wp x) = // Fun fact: using () instead of _ below makes us // lose the refinement and then this proof fails. // Keep that in mind all ye who enter here. fun p _ -> x unfold let bind_wp #a #b (wp_v : wp a) (wp_f : (x:a -> wp b)) : wp b = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun p -> wp_v (fun x -> wp_f x p)) let bind (a b : Type) (wp_v : wp a) (wp_f: a -> wp b) (v : repr a wp_v) (f : (x:a -> repr b (wp_f x))) : repr b (bind_wp wp_v wp_f) = fun p _ -> let x = v (fun x -> wp_f x p) () in f x p () irreducible let refine : unit = () let subcomp (a:Type u#uu) (w1 w2:wp a) (f : repr a w1) : Pure (repr a w2) (requires forall p. w2 p ==> w1 p) (ensures fun _ -> True) = f // useful? //let subcomp (a b:Type u#uu) (w1:wp a) (w2: wp b) // (f : repr a w1) //: Pure (repr b w2) // (requires a `subtype_of` b /\ (forall (p:b->Type0). w2 p ==> w1 (fun x -> p x))) // (ensures fun _ -> True) //= fun p pf -> f (hide (fun x -> reveal p x)) ()

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Monotonic.Pure.fst.checked", "FStar.List.Tot.fst.checked", "FStar.Ghost.fsti.checked" ], "interface_file": false, "source_file": "ID5.fst" }

[ { "abbrev": false, "full_module": "FStar.Monotonic.Pure", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

wp1: ID5.wp a -> wp2: ID5.wp a -> b: Prims.bool -> ID5.wp a

Prims.Tot

[ "total" ]

[]

[ "ID5.wp", "Prims.bool", "FStar.Monotonic.Pure.as_pure_wp", "Prims.l_and", "Prims.l_imp", "Prims.b2t", "Prims.l_not", "Prims.pure_pre", "Prims.unit", "FStar.Monotonic.Pure.elim_pure_wp_monotonicity_forall" ]

[]

false

true

false

let ite_wp #a (wp1: wp a) (wp2: wp a) (b: bool) : wp a =

elim_pure_wp_monotonicity_forall (); (as_pure_wp (fun (p: (a -> Type)) -> (b ==> wp1 p) /\ ((~b) ==> wp2 p)))

false

ID5.fst

ID5.subcomp

val subcomp (a: Type u#uu) (w1 w2: wp a) (f: repr a w1) : Pure (repr a w2) (requires forall p. w2 p ==> w1 p) (ensures fun _ -> True)

let subcomp (a:Type u#uu) (w1 w2:wp a) (f : repr a w1) : Pure (repr a w2) (requires forall p. w2 p ==> w1 p) (ensures fun _ -> True) = f

{ "file_name": "examples/layeredeffects/ID5.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 3, "end_line": 50, "start_col": 0, "start_line": 45 }

module ID5 open FStar.Ghost // The base type of WPs val wp0 (a : Type u#a) : Type u#(max 1 a) let wp0 a = (a -> Type0) -> Type0 val wp (a : Type u#a) : Type u#(max 1 a) let wp a = pure_wp a let repr (a : Type u#aa) (w : wp a) : Type u#(max 1 aa) = // Hmmm, the explicit post bumps the universe level p:erased (a -> Type0) -> squash (w p) -> v:a{reveal p v} open FStar.Monotonic.Pure unfold let return_wp #a (x:a) : wp a = as_pure_wp (fun p -> p x) let return (a : Type) (x : a) : repr a (return_wp x) = // Fun fact: using () instead of _ below makes us // lose the refinement and then this proof fails. // Keep that in mind all ye who enter here. fun p _ -> x unfold let bind_wp #a #b (wp_v : wp a) (wp_f : (x:a -> wp b)) : wp b = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun p -> wp_v (fun x -> wp_f x p)) let bind (a b : Type) (wp_v : wp a) (wp_f: a -> wp b) (v : repr a wp_v) (f : (x:a -> repr b (wp_f x))) : repr b (bind_wp wp_v wp_f) = fun p _ -> let x = v (fun x -> wp_f x p) () in f x p () irreducible let refine : unit = ()

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Monotonic.Pure.fst.checked", "FStar.List.Tot.fst.checked", "FStar.Ghost.fsti.checked" ], "interface_file": false, "source_file": "ID5.fst" }

[ { "abbrev": false, "full_module": "FStar.Monotonic.Pure", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

a: Type -> w1: ID5.wp a -> w2: ID5.wp a -> f: ID5.repr a w1 -> Prims.Pure (ID5.repr a w2)

Prims.Pure

[]

[ "ID5.wp", "ID5.repr", "Prims.l_Forall", "Prims.pure_post", "Prims.l_imp", "Prims.l_True" ]

[]

false

let subcomp (a: Type u#uu) (w1 w2: wp a) (f: repr a w1) : Pure (repr a w2) (requires forall p. w2 p ==> w1 p) (ensures fun _ -> True) =

f

false

ID5.fst

ID5.weaken_wp

val weaken_wp (#a: Type) (w: wp a) (p: Type0) : wp a

let weaken_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p ==> w post)

{ "file_name": "examples/layeredeffects/ID5.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 39, "end_line": 83, "start_col": 0, "start_line": 81 }

module ID5 open FStar.Ghost // The base type of WPs val wp0 (a : Type u#a) : Type u#(max 1 a) let wp0 a = (a -> Type0) -> Type0 val wp (a : Type u#a) : Type u#(max 1 a) let wp a = pure_wp a let repr (a : Type u#aa) (w : wp a) : Type u#(max 1 aa) = // Hmmm, the explicit post bumps the universe level p:erased (a -> Type0) -> squash (w p) -> v:a{reveal p v} open FStar.Monotonic.Pure unfold let return_wp #a (x:a) : wp a = as_pure_wp (fun p -> p x) let return (a : Type) (x : a) : repr a (return_wp x) = // Fun fact: using () instead of _ below makes us // lose the refinement and then this proof fails. // Keep that in mind all ye who enter here. fun p _ -> x unfold let bind_wp #a #b (wp_v : wp a) (wp_f : (x:a -> wp b)) : wp b = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun p -> wp_v (fun x -> wp_f x p)) let bind (a b : Type) (wp_v : wp a) (wp_f: a -> wp b) (v : repr a wp_v) (f : (x:a -> repr b (wp_f x))) : repr b (bind_wp wp_v wp_f) = fun p _ -> let x = v (fun x -> wp_f x p) () in f x p () irreducible let refine : unit = () let subcomp (a:Type u#uu) (w1 w2:wp a) (f : repr a w1) : Pure (repr a w2) (requires forall p. w2 p ==> w1 p) (ensures fun _ -> True) = f // useful? //let subcomp (a b:Type u#uu) (w1:wp a) (w2: wp b) // (f : repr a w1) //: Pure (repr b w2) // (requires a `subtype_of` b /\ (forall (p:b->Type0). w2 p ==> w1 (fun x -> p x))) // (ensures fun _ -> True) //= fun p pf -> f (hide (fun x -> reveal p x)) () unfold let ite_wp #a (wp1 wp2 : wp a) (b : bool) : wp a = elim_pure_wp_monotonicity_forall (); (as_pure_wp (fun (p:a -> Type) -> (b ==> wp1 p) /\ ((~b) ==> wp2 p))) let if_then_else (a : Type) (wp1 wp2 : wp a) (f : repr a wp1) (g : repr a wp2) (p : bool) : Type = repr a (ite_wp wp1 wp2 p) let default_if_then_else (a:Type) (wp:wp a) (f:repr a wp) (g:repr a wp) (p:bool) : Type = repr a wp unfold let strengthen_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p /\ w post) let strengthen #a #w (p:Type0) (f : squash p -> repr a w) : repr a (strengthen_wp w p) = fun post _ -> f () post ()

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Monotonic.Pure.fst.checked", "FStar.List.Tot.fst.checked", "FStar.Ghost.fsti.checked" ], "interface_file": false, "source_file": "ID5.fst" }

[ { "abbrev": false, "full_module": "FStar.Monotonic.Pure", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

w: ID5.wp a -> p: Type0 -> ID5.wp a

Prims.Tot

[ "total" ]

[]

[ "ID5.wp", "FStar.Monotonic.Pure.as_pure_wp", "Prims.pure_post", "Prims.l_imp", "Prims.pure_pre", "Prims.unit", "FStar.Monotonic.Pure.elim_pure_wp_monotonicity_forall" ]

[]

false

true

false

let weaken_wp (#a: Type) (w: wp a) (p: Type0) : wp a =

elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p ==> w post)

false

ID5.fst

ID5.cut_wp

val cut_wp (#a: Type) (w: wp a) (p: Type0) : wp a

let cut_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p /\ (p ==> w post))

{ "file_name": "examples/layeredeffects/ID5.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 46, "end_line": 93, "start_col": 0, "start_line": 91 }

module ID5 open FStar.Ghost // The base type of WPs val wp0 (a : Type u#a) : Type u#(max 1 a) let wp0 a = (a -> Type0) -> Type0 val wp (a : Type u#a) : Type u#(max 1 a) let wp a = pure_wp a let repr (a : Type u#aa) (w : wp a) : Type u#(max 1 aa) = // Hmmm, the explicit post bumps the universe level p:erased (a -> Type0) -> squash (w p) -> v:a{reveal p v} open FStar.Monotonic.Pure unfold let return_wp #a (x:a) : wp a = as_pure_wp (fun p -> p x) let return (a : Type) (x : a) : repr a (return_wp x) = // Fun fact: using () instead of _ below makes us // lose the refinement and then this proof fails. // Keep that in mind all ye who enter here. fun p _ -> x unfold let bind_wp #a #b (wp_v : wp a) (wp_f : (x:a -> wp b)) : wp b = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun p -> wp_v (fun x -> wp_f x p)) let bind (a b : Type) (wp_v : wp a) (wp_f: a -> wp b) (v : repr a wp_v) (f : (x:a -> repr b (wp_f x))) : repr b (bind_wp wp_v wp_f) = fun p _ -> let x = v (fun x -> wp_f x p) () in f x p () irreducible let refine : unit = () let subcomp (a:Type u#uu) (w1 w2:wp a) (f : repr a w1) : Pure (repr a w2) (requires forall p. w2 p ==> w1 p) (ensures fun _ -> True) = f // useful? //let subcomp (a b:Type u#uu) (w1:wp a) (w2: wp b) // (f : repr a w1) //: Pure (repr b w2) // (requires a `subtype_of` b /\ (forall (p:b->Type0). w2 p ==> w1 (fun x -> p x))) // (ensures fun _ -> True) //= fun p pf -> f (hide (fun x -> reveal p x)) () unfold let ite_wp #a (wp1 wp2 : wp a) (b : bool) : wp a = elim_pure_wp_monotonicity_forall (); (as_pure_wp (fun (p:a -> Type) -> (b ==> wp1 p) /\ ((~b) ==> wp2 p))) let if_then_else (a : Type) (wp1 wp2 : wp a) (f : repr a wp1) (g : repr a wp2) (p : bool) : Type = repr a (ite_wp wp1 wp2 p) let default_if_then_else (a:Type) (wp:wp a) (f:repr a wp) (g:repr a wp) (p:bool) : Type = repr a wp unfold let strengthen_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p /\ w post) let strengthen #a #w (p:Type0) (f : squash p -> repr a w) : repr a (strengthen_wp w p) = fun post _ -> f () post () unfold let weaken_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p ==> w post) let weaken #a #w (p:Type0) (f : repr a w) : Pure (repr a (weaken_wp w p)) (requires p) (ensures (fun _ -> True)) = fun post _ -> f post ()

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Monotonic.Pure.fst.checked", "FStar.List.Tot.fst.checked", "FStar.Ghost.fsti.checked" ], "interface_file": false, "source_file": "ID5.fst" }

[ { "abbrev": false, "full_module": "FStar.Monotonic.Pure", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

w: ID5.wp a -> p: Type0 -> ID5.wp a

Prims.Tot

[ "total" ]

[]

[ "ID5.wp", "FStar.Monotonic.Pure.as_pure_wp", "Prims.pure_post", "Prims.l_and", "Prims.l_imp", "Prims.pure_pre", "Prims.unit", "FStar.Monotonic.Pure.elim_pure_wp_monotonicity_forall" ]

[]

false

true

false

let cut_wp (#a: Type) (w: wp a) (p: Type0) : wp a =

elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p /\ (p ==> w post))

false

ID5.fst

ID5.strengthen

val strengthen (#a #w: _) (p: Type0) (f: (squash p -> repr a w)) : repr a (strengthen_wp w p)

let strengthen #a #w (p:Type0) (f : squash p -> repr a w) : repr a (strengthen_wp w p) = fun post _ -> f () post ()

{ "file_name": "examples/layeredeffects/ID5.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 28, "end_line": 78, "start_col": 0, "start_line": 77 }

module ID5 open FStar.Ghost // The base type of WPs val wp0 (a : Type u#a) : Type u#(max 1 a) let wp0 a = (a -> Type0) -> Type0 val wp (a : Type u#a) : Type u#(max 1 a) let wp a = pure_wp a let repr (a : Type u#aa) (w : wp a) : Type u#(max 1 aa) = // Hmmm, the explicit post bumps the universe level p:erased (a -> Type0) -> squash (w p) -> v:a{reveal p v} open FStar.Monotonic.Pure unfold let return_wp #a (x:a) : wp a = as_pure_wp (fun p -> p x) let return (a : Type) (x : a) : repr a (return_wp x) = // Fun fact: using () instead of _ below makes us // lose the refinement and then this proof fails. // Keep that in mind all ye who enter here. fun p _ -> x unfold let bind_wp #a #b (wp_v : wp a) (wp_f : (x:a -> wp b)) : wp b = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun p -> wp_v (fun x -> wp_f x p)) let bind (a b : Type) (wp_v : wp a) (wp_f: a -> wp b) (v : repr a wp_v) (f : (x:a -> repr b (wp_f x))) : repr b (bind_wp wp_v wp_f) = fun p _ -> let x = v (fun x -> wp_f x p) () in f x p () irreducible let refine : unit = () let subcomp (a:Type u#uu) (w1 w2:wp a) (f : repr a w1) : Pure (repr a w2) (requires forall p. w2 p ==> w1 p) (ensures fun _ -> True) = f // useful? //let subcomp (a b:Type u#uu) (w1:wp a) (w2: wp b) // (f : repr a w1) //: Pure (repr b w2) // (requires a `subtype_of` b /\ (forall (p:b->Type0). w2 p ==> w1 (fun x -> p x))) // (ensures fun _ -> True) //= fun p pf -> f (hide (fun x -> reveal p x)) () unfold let ite_wp #a (wp1 wp2 : wp a) (b : bool) : wp a = elim_pure_wp_monotonicity_forall (); (as_pure_wp (fun (p:a -> Type) -> (b ==> wp1 p) /\ ((~b) ==> wp2 p))) let if_then_else (a : Type) (wp1 wp2 : wp a) (f : repr a wp1) (g : repr a wp2) (p : bool) : Type = repr a (ite_wp wp1 wp2 p) let default_if_then_else (a:Type) (wp:wp a) (f:repr a wp) (g:repr a wp) (p:bool) : Type = repr a wp unfold let strengthen_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p /\ w post)

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Monotonic.Pure.fst.checked", "FStar.List.Tot.fst.checked", "FStar.Ghost.fsti.checked" ], "interface_file": false, "source_file": "ID5.fst" }

[ { "abbrev": false, "full_module": "FStar.Monotonic.Pure", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

p: Type0 -> f: (_: Prims.squash p -> ID5.repr a w) -> ID5.repr a (ID5.strengthen_wp w p)

Prims.Tot

[ "total" ]

[]

[ "ID5.wp", "Prims.squash", "ID5.repr", "FStar.Ghost.erased", "ID5.strengthen_wp", "FStar.Ghost.reveal" ]

[]

false

let strengthen #a #w (p: Type0) (f: (squash p -> repr a w)) : repr a (strengthen_wp w p) =

fun post _ -> f () post ()

false

ID5.fst

ID5.tot_i

val tot_i (#a: _) (f: (unit -> Tot a)) : I a

let tot_i #a (f : unit -> Tot a) : I a = f ()

{ "file_name": "examples/layeredeffects/ID5.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 6, "end_line": 219, "start_col": 0, "start_line": 218 }

module ID5 open FStar.Ghost // The base type of WPs val wp0 (a : Type u#a) : Type u#(max 1 a) let wp0 a = (a -> Type0) -> Type0 val wp (a : Type u#a) : Type u#(max 1 a) let wp a = pure_wp a let repr (a : Type u#aa) (w : wp a) : Type u#(max 1 aa) = // Hmmm, the explicit post bumps the universe level p:erased (a -> Type0) -> squash (w p) -> v:a{reveal p v} open FStar.Monotonic.Pure unfold let return_wp #a (x:a) : wp a = as_pure_wp (fun p -> p x) let return (a : Type) (x : a) : repr a (return_wp x) = // Fun fact: using () instead of _ below makes us // lose the refinement and then this proof fails. // Keep that in mind all ye who enter here. fun p _ -> x unfold let bind_wp #a #b (wp_v : wp a) (wp_f : (x:a -> wp b)) : wp b = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun p -> wp_v (fun x -> wp_f x p)) let bind (a b : Type) (wp_v : wp a) (wp_f: a -> wp b) (v : repr a wp_v) (f : (x:a -> repr b (wp_f x))) : repr b (bind_wp wp_v wp_f) = fun p _ -> let x = v (fun x -> wp_f x p) () in f x p () irreducible let refine : unit = () let subcomp (a:Type u#uu) (w1 w2:wp a) (f : repr a w1) : Pure (repr a w2) (requires forall p. w2 p ==> w1 p) (ensures fun _ -> True) = f // useful? //let subcomp (a b:Type u#uu) (w1:wp a) (w2: wp b) // (f : repr a w1) //: Pure (repr b w2) // (requires a `subtype_of` b /\ (forall (p:b->Type0). w2 p ==> w1 (fun x -> p x))) // (ensures fun _ -> True) //= fun p pf -> f (hide (fun x -> reveal p x)) () unfold let ite_wp #a (wp1 wp2 : wp a) (b : bool) : wp a = elim_pure_wp_monotonicity_forall (); (as_pure_wp (fun (p:a -> Type) -> (b ==> wp1 p) /\ ((~b) ==> wp2 p))) let if_then_else (a : Type) (wp1 wp2 : wp a) (f : repr a wp1) (g : repr a wp2) (p : bool) : Type = repr a (ite_wp wp1 wp2 p) let default_if_then_else (a:Type) (wp:wp a) (f:repr a wp) (g:repr a wp) (p:bool) : Type = repr a wp unfold let strengthen_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p /\ w post) let strengthen #a #w (p:Type0) (f : squash p -> repr a w) : repr a (strengthen_wp w p) = fun post _ -> f () post () unfold let weaken_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p ==> w post) let weaken #a #w (p:Type0) (f : repr a w) : Pure (repr a (weaken_wp w p)) (requires p) (ensures (fun _ -> True)) = fun post _ -> f post () unfold let cut_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p /\ (p ==> w post)) let cut #a #w (p:Type0) (f : repr a w) : repr a (cut_wp w p) = strengthen p (fun _ -> weaken p f) // requires to prove that // p ==> f <: (if_then_else p f g) // ~p ==> g <: (if_then_else p f g) // if the effect definition fails, add lemmas for the // above with smtpats total reifiable reflectable effect { ID (a:Type) (_:wp a) with {repr; return; bind; subcomp; if_then_else} } effect Id (a:Type) (pre:Type0) (post:a->Type0) = ID a (as_pure_wp (fun p -> pre /\ (forall x. post x ==> p x))) effect I (a:Type) = Id a True (fun _ -> True) open FStar.Tactics.V2 let lift_pure_nd (a:Type) (wp:wp a) (f:unit -> PURE a wp) : Pure (repr a wp) (requires True) (ensures (fun _ -> True)) = fun p _ -> elim_pure f p sub_effect PURE ~> ID = lift_pure_nd //tests to make sure we are actually checking subcomp even now let apply (f:unit -> Id int True (fun x -> x > 3)) : Id int True (fun x -> x > 2) = f () [@@expect_failure] let incorrect_apply (f:unit -> Id int True (fun x -> x > 3)) : Id int True (fun x -> x > 5) = f () [@@expect_failure] let another_one (n:int) (f:(x:int -> Id int (x > 0) (fun _ -> True))) : Id int True (fun _ -> True) = f n let iassert (q:Type0) : ID unit (as_pure_wp (fun p -> q /\ (q ==> p ()))) = () assume val iassume (q:Type0) : ID unit (as_pure_wp (fun p -> q ==> p ())) (* Checking that it's kind of usable *) val test_f : unit -> ID int (as_pure_wp (fun p -> p 5 /\ p 3)) let test_f () = 3 let l () : int = reify (test_f ()) (fun _ -> True) () open FStar.List.Tot let rec map #a #b #pre (f : (x:a -> Id b (requires (pre x)) (ensures (fun _ -> True)))) (l : list a) : Id (list b) (requires (forall x. memP x l ==> pre x)) (ensures (fun _ -> True)) = match l with | [] -> [] | x::xs -> f x :: map #_ #_ #pre f xs let even x = x % 2 == 0 //let fmap (x:nat) : Id nat (requires (even x)) (ensures (fun r -> r > x)) = // I cannot have a stronger post, subeffecting doesn't kick in in callmap? let fmap (x:nat) : Id nat (requires (even x)) (ensures (fun r -> r <= x)) = x/2 let callmap () : Id (list nat) True (fun _ -> True) = let lmap : list nat = [2;4;6;8] in map #_ #_ #even fmap lmap let rec count (n:nat) : I int = if n = 0 then 0 else count (n-1) let rec pow2 (n:nat) : I int = if n = 0 then 1 else pow2 (n-1) + pow2 (n-1) let rec fibl (i:nat) : I nat = if i = 0 || i = 1 then 1 else fibl (i-1) let rec fibr (i:nat) : I nat = if i = 0 || i = 1 then 1 else fibr (i-2) // TODO: I cannot use direct syntax and nat for the return type, or // subtyping fails to kick in? "expected int, got nat". let rec fib (i:nat) : I nat = if i < 2 then 1 else let x = fib (i-1) in let y = fib (i-2) in x+y //else fib (i-1) + fib (i-2) let test_assert () : ID unit (as_pure_wp (fun p -> p ())) = (); iassume False; (); iassert False; () let rec idiv (a b : nat) : Id int (requires (a >= 0 /\ b > 0)) (ensures (fun r -> r >= 0)) (decreases a) = if a < b then 0 else 1 + idiv (a-b) b let rec ack (m n : nat) : I nat = match m, n with | 0, n -> n+1 | m, 0 -> ack (m-1) 1 | m, n -> ack (m-1) (ack m (n-1)) let add1 (x:int) : Id int (requires (x > 0)) (ensures (fun r -> r == x+1)) = x + 1

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Monotonic.Pure.fst.checked", "FStar.List.Tot.fst.checked", "FStar.Ghost.fsti.checked" ], "interface_file": false, "source_file": "ID5.fst" }

[ { "abbrev": false, "full_module": "FStar.List.Tot", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "FStar.Monotonic.Pure", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

f: (_: Prims.unit -> a) -> ID5.I a

ID5.I

[]

[ "Prims.unit" ]

[]

false

true

false

let tot_i #a (f: (unit -> Tot a)) : I a =

f ()

false

ID5.fst

ID5.apply

val apply (f: (unit -> Id int True (fun x -> x > 3))) : Id int True (fun x -> x > 2)

let apply (f:unit -> Id int True (fun x -> x > 3)) : Id int True (fun x -> x > 2) = f ()

{ "file_name": "examples/layeredeffects/ID5.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 88, "end_line": 127, "start_col": 0, "start_line": 127 }

module ID5 open FStar.Ghost // The base type of WPs val wp0 (a : Type u#a) : Type u#(max 1 a) let wp0 a = (a -> Type0) -> Type0 val wp (a : Type u#a) : Type u#(max 1 a) let wp a = pure_wp a let repr (a : Type u#aa) (w : wp a) : Type u#(max 1 aa) = // Hmmm, the explicit post bumps the universe level p:erased (a -> Type0) -> squash (w p) -> v:a{reveal p v} open FStar.Monotonic.Pure unfold let return_wp #a (x:a) : wp a = as_pure_wp (fun p -> p x) let return (a : Type) (x : a) : repr a (return_wp x) = // Fun fact: using () instead of _ below makes us // lose the refinement and then this proof fails. // Keep that in mind all ye who enter here. fun p _ -> x unfold let bind_wp #a #b (wp_v : wp a) (wp_f : (x:a -> wp b)) : wp b = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun p -> wp_v (fun x -> wp_f x p)) let bind (a b : Type) (wp_v : wp a) (wp_f: a -> wp b) (v : repr a wp_v) (f : (x:a -> repr b (wp_f x))) : repr b (bind_wp wp_v wp_f) = fun p _ -> let x = v (fun x -> wp_f x p) () in f x p () irreducible let refine : unit = () let subcomp (a:Type u#uu) (w1 w2:wp a) (f : repr a w1) : Pure (repr a w2) (requires forall p. w2 p ==> w1 p) (ensures fun _ -> True) = f // useful? //let subcomp (a b:Type u#uu) (w1:wp a) (w2: wp b) // (f : repr a w1) //: Pure (repr b w2) // (requires a `subtype_of` b /\ (forall (p:b->Type0). w2 p ==> w1 (fun x -> p x))) // (ensures fun _ -> True) //= fun p pf -> f (hide (fun x -> reveal p x)) () unfold let ite_wp #a (wp1 wp2 : wp a) (b : bool) : wp a = elim_pure_wp_monotonicity_forall (); (as_pure_wp (fun (p:a -> Type) -> (b ==> wp1 p) /\ ((~b) ==> wp2 p))) let if_then_else (a : Type) (wp1 wp2 : wp a) (f : repr a wp1) (g : repr a wp2) (p : bool) : Type = repr a (ite_wp wp1 wp2 p) let default_if_then_else (a:Type) (wp:wp a) (f:repr a wp) (g:repr a wp) (p:bool) : Type = repr a wp unfold let strengthen_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p /\ w post) let strengthen #a #w (p:Type0) (f : squash p -> repr a w) : repr a (strengthen_wp w p) = fun post _ -> f () post () unfold let weaken_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p ==> w post) let weaken #a #w (p:Type0) (f : repr a w) : Pure (repr a (weaken_wp w p)) (requires p) (ensures (fun _ -> True)) = fun post _ -> f post () unfold let cut_wp (#a:Type) (w:wp a) (p:Type0) : wp a = elim_pure_wp_monotonicity_forall (); as_pure_wp (fun post -> p /\ (p ==> w post)) let cut #a #w (p:Type0) (f : repr a w) : repr a (cut_wp w p) = strengthen p (fun _ -> weaken p f) // requires to prove that // p ==> f <: (if_then_else p f g) // ~p ==> g <: (if_then_else p f g) // if the effect definition fails, add lemmas for the // above with smtpats total reifiable reflectable effect { ID (a:Type) (_:wp a) with {repr; return; bind; subcomp; if_then_else} } effect Id (a:Type) (pre:Type0) (post:a->Type0) = ID a (as_pure_wp (fun p -> pre /\ (forall x. post x ==> p x))) effect I (a:Type) = Id a True (fun _ -> True) open FStar.Tactics.V2 let lift_pure_nd (a:Type) (wp:wp a) (f:unit -> PURE a wp) : Pure (repr a wp) (requires True) (ensures (fun _ -> True)) = fun p _ -> elim_pure f p sub_effect PURE ~> ID = lift_pure_nd

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Monotonic.Pure.fst.checked", "FStar.List.Tot.fst.checked", "FStar.Ghost.fsti.checked" ], "interface_file": false, "source_file": "ID5.fst" }

[ { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "FStar.Monotonic.Pure", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

f: (_: Prims.unit -> ID5.Id Prims.int) -> ID5.Id Prims.int

ID5.Id

[]

[ "Prims.unit", "Prims.int", "Prims.l_True", "Prims.b2t", "Prims.op_GreaterThan" ]

[]

false

true

false

let apply (f: (unit -> Id int True (fun x -> x > 3))) : Id int True (fun x -> x > 2) =

f ()

false

Hacl.SHA2.Vec128.fst

Hacl.SHA2.Vec128.sha256_update_nblocks4

val sha256_update_nblocks4 : Hacl.Impl.SHA2.Generic.update_nblocks_vec_t' Spec.Hash.Definitions.SHA2_256 Hacl.Spec.SHA2.Vec.M128

let sha256_update_nblocks4 = update_nblocks #SHA2_256 #M128 sha256_update4

{ "file_name": "code/sha2-mb/Hacl.SHA2.Vec128.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 93, "end_line": 61, "start_col": 19, "start_line": 61 }

module Hacl.SHA2.Vec128 open FStar.HyperStack open FStar.HyperStack.All open FStar.Mul open Lib.IntTypes open Lib.NTuple open Lib.Buffer open Lib.MultiBuffer open Spec.Hash.Definitions open Hacl.Spec.SHA2.Vec open Hacl.Impl.SHA2.Generic module ST = FStar.HyperStack.ST module Spec = Spec.Agile.Hash module SpecVec = Hacl.Spec.SHA2.Vec #set-options "--z3rlimit 50 --fuel 0 --ifuel 0" [@CInline] private let sha224_init4 = init #SHA2_224 #M128 [@CInline] private let sha224_update4 = update #SHA2_224 #M128 [@CInline] private let sha224_update_nblocks4 = update_nblocks #SHA2_224 #M128 sha224_update4 [@CInline] private let sha224_update_last4 = update_last #SHA2_224 #M128 sha224_update4 [@CInline] private let sha224_finish4 = finish #SHA2_224 #M128 val sha224_4 (dst0 dst1 dst2 dst3: lbuffer uint8 28ul) (input_len:size_t) (input0 input1 input2 input3: lbuffer uint8 input_len) : Stack unit (requires fun h0 -> v input_len `less_than_max_input_length` SHA2_224 /\ live4 h0 input0 input1 input2 input3 /\ live4 h0 dst0 dst1 dst2 dst3 /\ internally_disjoint4 dst0 dst1 dst2 dst3) (ensures fun h0 _ h1 -> modifies (loc dst0 |+| loc dst1 |+| loc dst2 |+| loc dst3) h0 h1 /\ as_seq h1 dst0 == Spec.hash SHA2_224 (as_seq h0 input0) /\ as_seq h1 dst1 == Spec.hash SHA2_224 (as_seq h0 input1) /\ as_seq h1 dst2 == Spec.hash SHA2_224 (as_seq h0 input2) /\ as_seq h1 dst3 == Spec.hash SHA2_224 (as_seq h0 input3)) let sha224_4 dst0 dst1 dst2 dst3 input_len input0 input1 input2 input3 = let ib = ntup4 (input0,(input1,(input2,input3))) in let rb = ntup4 (dst0,(dst1,(dst2,dst3))) in let h0 = ST.get() in assert (live_multi h0 ib); assert (live_multi h0 rb); assert (internally_disjoint rb); loc_multi4 rb; hash #SHA2_224 #M128 sha224_init4 sha224_update_nblocks4 sha224_update_last4 sha224_finish4 rb input_len ib; let h1 = ST.get() in Hacl.Spec.SHA2.Equiv.hash_agile_lemma #SHA2_224 #M128 (v input_len) (as_seq_multi h0 ib); assert ((as_seq_multi h1 rb).(|0|) == as_seq h1 dst0); assert ((as_seq_multi h1 rb).(|1|) == as_seq h1 dst1); assert ((as_seq_multi h1 rb).(|2|) == as_seq h1 dst2); assert ((as_seq_multi h1 rb).(|3|) == as_seq h1 dst3) [@CInline] private let sha256_init4 = init #SHA2_256 #M128

{ "checked_file": "/", "dependencies": [ "Spec.Hash.Definitions.fst.checked", "Spec.Agile.Hash.fsti.checked", "prims.fst.checked", "Lib.NTuple.fsti.checked", "Lib.MultiBuffer.fst.checked", "Lib.IntTypes.fsti.checked", "Lib.Buffer.fsti.checked", "Hacl.Spec.SHA2.Vec.fst.checked", "Hacl.Spec.SHA2.Equiv.fst.checked", "Hacl.Impl.SHA2.Generic.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.HyperStack.ST.fsti.checked", "FStar.HyperStack.All.fst.checked", "FStar.HyperStack.fst.checked" ], "interface_file": false, "source_file": "Hacl.SHA2.Vec128.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": "SpecVec" }, { "abbrev": true, "full_module": "Spec.Agile.Hash", "short_module": "Spec" }, { "abbrev": true, "full_module": "FStar.HyperStack.ST", "short_module": "ST" }, { "abbrev": false, "full_module": "Hacl.Impl.SHA2.Generic", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.SHA2.Vec", "short_module": null }, { "abbrev": false, "full_module": "Spec.Hash.Definitions", "short_module": null }, { "abbrev": false, "full_module": "Lib.MultiBuffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.Buffer", "short_module": null }, { "abbrev": false, "full_module": "Lib.NTuple", "short_module": null }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack.All", "short_module": null }, { "abbrev": false, "full_module": "FStar.HyperStack", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "Hacl.SHA2", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 50, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

Hacl.Impl.SHA2.Generic.update_nblocks_vec_t' Spec.Hash.Definitions.SHA2_256 Hacl.Spec.SHA2.Vec.M128

Prims.Tot

[ "total" ]

[]

[ "Hacl.Impl.SHA2.Generic.update_nblocks", "Spec.Hash.Definitions.SHA2_256", "Hacl.Spec.SHA2.Vec.M128", "Hacl.SHA2.Vec128.sha256_update4" ]

[]

false

true

false

let sha256_update_nblocks4 =

update_nblocks #SHA2_256 #M128 sha256_update4

false