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|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Prims.Tot | val ws_aux (a: sha2_alg) (b: block_w a) (t: counter{t < size_k_w a}) : Tot (word a) | [
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Seq",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Spec.SHA2.Constants",
"short_module": "C"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let rec ws_aux (a:sha2_alg) (b:block_w a) (t:counter{t < size_k_w a}): Tot (word a) =
if t < block_word_length a then b.[t]
else
let t16 = ws_aux a b (t - 16) in
let t15 = ws_aux a b (t - 15) in
let t7 = ws_aux a b (t - 7) in
let t2 = ws_aux a b (t - 2) in
let s1 = _sigma1 a t2 in
let s0 = _sigma0 a t15 in
(s1 +. t7 +. s0 +. t16) | val ws_aux (a: sha2_alg) (b: block_w a) (t: counter{t < size_k_w a}) : Tot (word a)
let rec ws_aux (a: sha2_alg) (b: block_w a) (t: counter{t < size_k_w a}) : Tot (word a) = | false | null | false | if t < block_word_length a
then b.[ t ]
else
let t16 = ws_aux a b (t - 16) in
let t15 = ws_aux a b (t - 15) in
let t7 = ws_aux a b (t - 7) in
let t2 = ws_aux a b (t - 2) in
let s1 = _sigma1 a t2 in
let s0 = _sigma0 a t15 in
(s1 +. t7 +. s0 +. t16) | {
"checked_file": "Spec.SHA2.Lemmas.fst.checked",
"dependencies": [
"Spec.SHA2.Constants.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Lemmas.fsti.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fst.checked",
"prims.fst.checked",
"Lib.UpdateMulti.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.LoopCombinators.fsti.checked",
"Lib.IntTypes.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": true,
"source_file": "Spec.SHA2.Lemmas.fst"
} | [
"total"
] | [
"Spec.Hash.Definitions.sha2_alg",
"Spec.SHA2.block_w",
"Spec.SHA2.counter",
"Prims.b2t",
"Prims.op_LessThan",
"Spec.SHA2.size_k_w",
"Spec.Hash.Definitions.block_word_length",
"Spec.SHA2.op_String_Access",
"Spec.Hash.Definitions.word",
"Prims.bool",
"Spec.SHA2.op_Plus_Dot",
"Spec.SHA2._sigma0",
"Spec.SHA2._sigma1",
"Spec.SHA2.Lemmas.ws_aux",
"Prims.op_Subtraction"
] | [] | module Spec.SHA2.Lemmas
open Lib.IntTypes
module C = Spec.SHA2.Constants
module S = FStar.Seq
open Spec.Hash.Definitions
open Spec.SHA2
open Spec.Hash.Lemmas
friend Spec.SHA2
friend Spec.Agile.Hash
#set-options "--z3rlimit 25 --fuel 0 --ifuel 0"
(* Scheduling function *)
(* Recursive Version *) | false | false | Spec.SHA2.Lemmas.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 25,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val ws_aux (a: sha2_alg) (b: block_w a) (t: counter{t < size_k_w a}) : Tot (word a) | [
"recursion"
] | Spec.SHA2.Lemmas.ws_aux | {
"file_name": "specs/lemmas/Spec.SHA2.Lemmas.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
a: Spec.Hash.Definitions.sha2_alg ->
b: Spec.SHA2.block_w a ->
t: Spec.SHA2.counter{t < Spec.SHA2.size_k_w a}
-> Spec.Hash.Definitions.word a | {
"end_col": 27,
"end_line": 29,
"start_col": 2,
"start_line": 20
} |
Prims.Tot | val update_aux (a: sha2_alg) (hash: words_state a) (block: bytes{S.length block = block_length a})
: Tot (words_state a) | [
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Seq",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Spec.SHA2.Constants",
"short_module": "C"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let update_aux (a:sha2_alg) (hash:words_state a) (block:bytes{S.length block = block_length a}): Tot (words_state a) =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle_aux a hash block_w in
Lib.Sequence.map2 ( +. ) (hash <: Lib.Sequence.lseq (word a) (state_word_length a)) hash_1 | val update_aux (a: sha2_alg) (hash: words_state a) (block: bytes{S.length block = block_length a})
: Tot (words_state a)
let update_aux (a: sha2_alg) (hash: words_state a) (block: bytes{S.length block = block_length a})
: Tot (words_state a) = | false | null | false | let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle_aux a hash block_w in
Lib.Sequence.map2 ( +. ) (hash <: Lib.Sequence.lseq (word a) (state_word_length a)) hash_1 | {
"checked_file": "Spec.SHA2.Lemmas.fst.checked",
"dependencies": [
"Spec.SHA2.Constants.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Lemmas.fsti.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fst.checked",
"prims.fst.checked",
"Lib.UpdateMulti.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.LoopCombinators.fsti.checked",
"Lib.IntTypes.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": true,
"source_file": "Spec.SHA2.Lemmas.fst"
} | [
"total"
] | [
"Spec.Hash.Definitions.sha2_alg",
"Spec.Hash.Definitions.words_state",
"Spec.Hash.Definitions.bytes",
"Prims.b2t",
"Prims.op_Equality",
"Prims.int",
"Prims.l_or",
"Prims.op_GreaterThanOrEqual",
"Prims.op_disEquality",
"FStar.Seq.Base.length",
"Lib.IntTypes.uint8",
"Spec.Hash.Definitions.block_length",
"Lib.Sequence.map2",
"Spec.Hash.Definitions.word",
"Spec.Hash.Definitions.state_word_length",
"Spec.SHA2.op_Plus_Dot",
"Lib.Sequence.lseq",
"Spec.SHA2.Lemmas.shuffle_aux",
"Spec.Hash.Definitions.block_word_length",
"Spec.Hash.Definitions.words_of_bytes"
] | [] | module Spec.SHA2.Lemmas
open Lib.IntTypes
module C = Spec.SHA2.Constants
module S = FStar.Seq
open Spec.Hash.Definitions
open Spec.SHA2
open Spec.Hash.Lemmas
friend Spec.SHA2
friend Spec.Agile.Hash
#set-options "--z3rlimit 25 --fuel 0 --ifuel 0"
(* Scheduling function *)
(* Recursive Version *)
let rec ws_aux (a:sha2_alg) (b:block_w a) (t:counter{t < size_k_w a}): Tot (word a) =
if t < block_word_length a then b.[t]
else
let t16 = ws_aux a b (t - 16) in
let t15 = ws_aux a b (t - 15) in
let t7 = ws_aux a b (t - 7) in
let t2 = ws_aux a b (t - 2) in
let s1 = _sigma1 a t2 in
let s0 = _sigma0 a t15 in
(s1 +. t7 +. s0 +. t16)
[@"opaque_to_smt"]
let ws = ws_aux
(* Core shuffling function *)
let shuffle_core_ (a:sha2_alg) (block:block_w a) (hash:words_state a) (t:counter{t < size_k_w a}): Tot (words_state a) =
(**) assert(7 <= S.length hash);
let a0 = hash.[0] in
let b0 = hash.[1] in
let c0 = hash.[2] in
let d0 = hash.[3] in
let e0 = hash.[4] in
let f0 = hash.[5] in
let g0 = hash.[6] in
let h0 = hash.[7] in
(**) assert(S.length (k0 a) = size_k_w a);
let t1 = h0 +. (_Sigma1 a e0) +. (_Ch a e0 f0 g0) +. (k0 a).[t] +. (ws a block t) in
let t2 = (_Sigma0 a a0) +. (_Maj a a0 b0 c0) in
(**) assert(t < S.length (k0 a));
let l = [ t1 +. t2; a0; b0; c0; d0 +. t1; e0; f0; g0 ] in
assert_norm (List.Tot.length l = 8);
S.seq_of_list l
[@"opaque_to_smt"]
let shuffle_core = shuffle_core_
(* Full shuffling function *)
let shuffle_aux (a:sha2_alg) (hash:words_state a) (block:block_w a): Tot (words_state a) =
Spec.Loops.repeat_range 0 (size_k_w a) (shuffle_core a block) hash
#push-options "--max_fuel 1 --max_ifuel 0"
val shuffle_is_shuffle_pre: a:sha2_alg -> hash:words_state a -> block:block_w a ->
Lemma (shuffle a hash block == shuffle_aux a hash block)
let shuffle_is_shuffle_pre a hash block =
let rec repeati_is_repeat_range #a (n:nat)
(f:a -> (i:nat{i < n}) -> Tot a)
(f': (i:nat{i < n}) -> a -> Tot a)
(i:nat{i <= n})
(acc0:a)
: Lemma
(requires forall x i. f x i == f' i x)
(ensures Spec.Loops.repeat_range 0 i f acc0 == Lib.LoopCombinators.repeati i f' acc0)
= if i = 0 then (
Lib.LoopCombinators.eq_repeati0 n f' acc0
) else (
Spec.Loops.repeat_range_induction 0 i f acc0;
Lib.LoopCombinators.unfold_repeati n f' acc0 (i-1);
repeati_is_repeat_range n f f' (i-1) acc0
)
in
let rec ws_is_ws_pre (i:nat{i <= size_k_w a}) : Lemma
(ensures forall (j:nat{j < i}).
ws a block j ==
(Lib.LoopCombinators.repeati i
(ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0))).[j]
)
= if i = 0 then ()
else (
ws_is_ws_pre (i - 1);
Lib.LoopCombinators.unfold_repeati (size_k_w a) (ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0)) (i - 1);
let f = ws_pre_inner a block in
let acc0 = Seq.create (size_k_w a) (to_word a 0) in
assert (Lib.LoopCombinators.repeati i f acc0 ==
f (i - 1) (Lib.LoopCombinators.repeati (i-1) f acc0));
reveal_opaque (`%ws) ws
)
in
let ws = ws_pre a block in
let k = k0 a in
let shuffle_core_is_shuffle_core_pre
hash
(i:counter{i < size_k_w a})
: Lemma (shuffle_core a block hash i == shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] hash)
= ws_is_ws_pre (size_k_w a);
reveal_opaque (`%ws_pre) ws_pre;
reveal_opaque (`%shuffle_core) shuffle_core;
reveal_opaque (`%shuffle_core_pre) shuffle_core_pre
in
Classical.forall_intro_2 shuffle_core_is_shuffle_core_pre;
repeati_is_repeat_range (size_k_w a) (shuffle_core a block) (fun i h -> shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] h) (size_k_w a) hash;
assert (shuffle_pre a hash block == shuffle_aux a hash block);
reveal_opaque (`%shuffle) shuffle
#pop-options | false | false | Spec.SHA2.Lemmas.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 25,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val update_aux (a: sha2_alg) (hash: words_state a) (block: bytes{S.length block = block_length a})
: Tot (words_state a) | [] | Spec.SHA2.Lemmas.update_aux | {
"file_name": "specs/lemmas/Spec.SHA2.Lemmas.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
a: Spec.Hash.Definitions.sha2_alg ->
hash: Spec.Hash.Definitions.words_state a ->
block:
Spec.Hash.Definitions.bytes
{FStar.Seq.Base.length block = Spec.Hash.Definitions.block_length a}
-> Spec.Hash.Definitions.words_state a | {
"end_col": 92,
"end_line": 128,
"start_col": 118,
"start_line": 125
} |
Prims.Tot | val shuffle_core_
(a: sha2_alg)
(block: block_w a)
(hash: words_state a)
(t: counter{t < size_k_w a})
: Tot (words_state a) | [
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Seq",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Spec.SHA2.Constants",
"short_module": "C"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let shuffle_core_ (a:sha2_alg) (block:block_w a) (hash:words_state a) (t:counter{t < size_k_w a}): Tot (words_state a) =
(**) assert(7 <= S.length hash);
let a0 = hash.[0] in
let b0 = hash.[1] in
let c0 = hash.[2] in
let d0 = hash.[3] in
let e0 = hash.[4] in
let f0 = hash.[5] in
let g0 = hash.[6] in
let h0 = hash.[7] in
(**) assert(S.length (k0 a) = size_k_w a);
let t1 = h0 +. (_Sigma1 a e0) +. (_Ch a e0 f0 g0) +. (k0 a).[t] +. (ws a block t) in
let t2 = (_Sigma0 a a0) +. (_Maj a a0 b0 c0) in
(**) assert(t < S.length (k0 a));
let l = [ t1 +. t2; a0; b0; c0; d0 +. t1; e0; f0; g0 ] in
assert_norm (List.Tot.length l = 8);
S.seq_of_list l | val shuffle_core_
(a: sha2_alg)
(block: block_w a)
(hash: words_state a)
(t: counter{t < size_k_w a})
: Tot (words_state a)
let shuffle_core_
(a: sha2_alg)
(block: block_w a)
(hash: words_state a)
(t: counter{t < size_k_w a})
: Tot (words_state a) = | false | null | false | assert (7 <= S.length hash);
let a0 = hash.[ 0 ] in
let b0 = hash.[ 1 ] in
let c0 = hash.[ 2 ] in
let d0 = hash.[ 3 ] in
let e0 = hash.[ 4 ] in
let f0 = hash.[ 5 ] in
let g0 = hash.[ 6 ] in
let h0 = hash.[ 7 ] in
assert (S.length (k0 a) = size_k_w a);
let t1 = h0 +. (_Sigma1 a e0) +. (_Ch a e0 f0 g0) +. (k0 a).[ t ] +. (ws a block t) in
let t2 = (_Sigma0 a a0) +. (_Maj a a0 b0 c0) in
assert (t < S.length (k0 a));
let l = [t1 +. t2; a0; b0; c0; d0 +. t1; e0; f0; g0] in
assert_norm (List.Tot.length l = 8);
S.seq_of_list l | {
"checked_file": "Spec.SHA2.Lemmas.fst.checked",
"dependencies": [
"Spec.SHA2.Constants.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Lemmas.fsti.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fst.checked",
"prims.fst.checked",
"Lib.UpdateMulti.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.LoopCombinators.fsti.checked",
"Lib.IntTypes.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": true,
"source_file": "Spec.SHA2.Lemmas.fst"
} | [
"total"
] | [
"Spec.Hash.Definitions.sha2_alg",
"Spec.SHA2.block_w",
"Spec.Hash.Definitions.words_state",
"Spec.SHA2.counter",
"Prims.b2t",
"Prims.op_LessThan",
"Spec.SHA2.size_k_w",
"FStar.Seq.Properties.seq_of_list",
"Spec.Hash.Definitions.word",
"Prims.unit",
"FStar.Pervasives.assert_norm",
"Prims.op_Equality",
"Prims.int",
"FStar.List.Tot.Base.length",
"Prims.list",
"Prims.Cons",
"Spec.SHA2.op_Plus_Dot",
"Prims.Nil",
"Prims._assert",
"FStar.Seq.Base.length",
"Spec.SHA2.k0",
"Spec.SHA2._Sigma0",
"Spec.SHA2._Maj",
"Spec.SHA2._Sigma1",
"Spec.SHA2._Ch",
"Spec.SHA2.op_String_Access",
"Spec.SHA2.Lemmas.ws",
"Prims.nat",
"Prims.op_LessThanOrEqual"
] | [] | module Spec.SHA2.Lemmas
open Lib.IntTypes
module C = Spec.SHA2.Constants
module S = FStar.Seq
open Spec.Hash.Definitions
open Spec.SHA2
open Spec.Hash.Lemmas
friend Spec.SHA2
friend Spec.Agile.Hash
#set-options "--z3rlimit 25 --fuel 0 --ifuel 0"
(* Scheduling function *)
(* Recursive Version *)
let rec ws_aux (a:sha2_alg) (b:block_w a) (t:counter{t < size_k_w a}): Tot (word a) =
if t < block_word_length a then b.[t]
else
let t16 = ws_aux a b (t - 16) in
let t15 = ws_aux a b (t - 15) in
let t7 = ws_aux a b (t - 7) in
let t2 = ws_aux a b (t - 2) in
let s1 = _sigma1 a t2 in
let s0 = _sigma0 a t15 in
(s1 +. t7 +. s0 +. t16)
[@"opaque_to_smt"]
let ws = ws_aux
(* Core shuffling function *) | false | false | Spec.SHA2.Lemmas.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 25,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val shuffle_core_
(a: sha2_alg)
(block: block_w a)
(hash: words_state a)
(t: counter{t < size_k_w a})
: Tot (words_state a) | [] | Spec.SHA2.Lemmas.shuffle_core_ | {
"file_name": "specs/lemmas/Spec.SHA2.Lemmas.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
a: Spec.Hash.Definitions.sha2_alg ->
block: Spec.SHA2.block_w a ->
hash: Spec.Hash.Definitions.words_state a ->
t: Spec.SHA2.counter{t < Spec.SHA2.size_k_w a}
-> Spec.Hash.Definitions.words_state a | {
"end_col": 17,
"end_line": 53,
"start_col": 7,
"start_line": 36
} |
FStar.Pervasives.Lemma | val update_is_update_pre: a:sha2_alg -> hash:words_state a -> block:bytes{S.length block = block_length a} ->
Lemma (update a hash block == update_aux a hash block) | [
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Seq",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Spec.SHA2.Constants",
"short_module": "C"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let update_is_update_pre a hash block =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle a hash block_w in
shuffle_is_shuffle_pre a hash block_w;
let hash:Lib.Sequence.lseq (word a) (state_word_length a) = hash in
reveal_opaque (`%update) update;
let s1 = Lib.Sequence.map2 (+.) hash hash_1 in
let s2 = Spec.Loops.seq_map2 (+.) hash hash_1 in
assert (Seq.length s1 == Seq.length s2);
let aux (i:nat{i < Seq.length s1}) : Lemma (Seq.index s1 i == Seq.index s2 i)
=
// Need Lib.Sequence.index in the context for map2's postcondition to trigger
assert (Lib.Sequence.index s1 i == ( +. ) (Seq.index hash i) (Seq.index hash_1 i))
in Classical.forall_intro aux;
assert (s1 `Seq.equal` s2) | val update_is_update_pre: a:sha2_alg -> hash:words_state a -> block:bytes{S.length block = block_length a} ->
Lemma (update a hash block == update_aux a hash block)
let update_is_update_pre a hash block = | false | null | true | let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle a hash block_w in
shuffle_is_shuffle_pre a hash block_w;
let hash:Lib.Sequence.lseq (word a) (state_word_length a) = hash in
reveal_opaque (`%update) update;
let s1 = Lib.Sequence.map2 ( +. ) hash hash_1 in
let s2 = Spec.Loops.seq_map2 ( +. ) hash hash_1 in
assert (Seq.length s1 == Seq.length s2);
let aux (i: nat{i < Seq.length s1}) : Lemma (Seq.index s1 i == Seq.index s2 i) =
assert (Lib.Sequence.index s1 i == ( +. ) (Seq.index hash i) (Seq.index hash_1 i))
in
Classical.forall_intro aux;
assert (s1 `Seq.equal` s2) | {
"checked_file": "Spec.SHA2.Lemmas.fst.checked",
"dependencies": [
"Spec.SHA2.Constants.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Lemmas.fsti.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fst.checked",
"prims.fst.checked",
"Lib.UpdateMulti.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.LoopCombinators.fsti.checked",
"Lib.IntTypes.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": true,
"source_file": "Spec.SHA2.Lemmas.fst"
} | [
"lemma"
] | [
"Spec.Hash.Definitions.sha2_alg",
"Spec.Hash.Definitions.words_state",
"Spec.Hash.Definitions.bytes",
"Prims.b2t",
"Prims.op_Equality",
"Prims.int",
"Prims.l_or",
"Prims.op_GreaterThanOrEqual",
"Prims.op_disEquality",
"FStar.Seq.Base.length",
"Lib.IntTypes.uint8",
"Spec.Hash.Definitions.block_length",
"Prims._assert",
"FStar.Seq.Base.equal",
"Spec.Hash.Definitions.word",
"Prims.unit",
"FStar.Classical.forall_intro",
"Prims.nat",
"Prims.op_LessThan",
"Prims.eq2",
"FStar.Seq.Base.index",
"Prims.l_True",
"Prims.squash",
"Prims.Nil",
"FStar.Pervasives.pattern",
"Lib.Sequence.to_seq",
"Spec.Hash.Definitions.state_word_length",
"Lib.Sequence.index",
"Spec.SHA2.op_Plus_Dot",
"FStar.Seq.Base.seq",
"Prims.l_and",
"Prims.l_Forall",
"Prims.l_imp",
"Spec.Loops.seq_map2",
"Lib.Sequence.lseq",
"Lib.Sequence.map2",
"FStar.Pervasives.reveal_opaque",
"Spec.Hash.Definitions.update_t",
"Spec.SHA2.update",
"Spec.SHA2.Lemmas.shuffle_is_shuffle_pre",
"Spec.SHA2.shuffle",
"Spec.Hash.Definitions.block_word_length",
"Spec.Hash.Definitions.words_of_bytes"
] | [] | module Spec.SHA2.Lemmas
open Lib.IntTypes
module C = Spec.SHA2.Constants
module S = FStar.Seq
open Spec.Hash.Definitions
open Spec.SHA2
open Spec.Hash.Lemmas
friend Spec.SHA2
friend Spec.Agile.Hash
#set-options "--z3rlimit 25 --fuel 0 --ifuel 0"
(* Scheduling function *)
(* Recursive Version *)
let rec ws_aux (a:sha2_alg) (b:block_w a) (t:counter{t < size_k_w a}): Tot (word a) =
if t < block_word_length a then b.[t]
else
let t16 = ws_aux a b (t - 16) in
let t15 = ws_aux a b (t - 15) in
let t7 = ws_aux a b (t - 7) in
let t2 = ws_aux a b (t - 2) in
let s1 = _sigma1 a t2 in
let s0 = _sigma0 a t15 in
(s1 +. t7 +. s0 +. t16)
[@"opaque_to_smt"]
let ws = ws_aux
(* Core shuffling function *)
let shuffle_core_ (a:sha2_alg) (block:block_w a) (hash:words_state a) (t:counter{t < size_k_w a}): Tot (words_state a) =
(**) assert(7 <= S.length hash);
let a0 = hash.[0] in
let b0 = hash.[1] in
let c0 = hash.[2] in
let d0 = hash.[3] in
let e0 = hash.[4] in
let f0 = hash.[5] in
let g0 = hash.[6] in
let h0 = hash.[7] in
(**) assert(S.length (k0 a) = size_k_w a);
let t1 = h0 +. (_Sigma1 a e0) +. (_Ch a e0 f0 g0) +. (k0 a).[t] +. (ws a block t) in
let t2 = (_Sigma0 a a0) +. (_Maj a a0 b0 c0) in
(**) assert(t < S.length (k0 a));
let l = [ t1 +. t2; a0; b0; c0; d0 +. t1; e0; f0; g0 ] in
assert_norm (List.Tot.length l = 8);
S.seq_of_list l
[@"opaque_to_smt"]
let shuffle_core = shuffle_core_
(* Full shuffling function *)
let shuffle_aux (a:sha2_alg) (hash:words_state a) (block:block_w a): Tot (words_state a) =
Spec.Loops.repeat_range 0 (size_k_w a) (shuffle_core a block) hash
#push-options "--max_fuel 1 --max_ifuel 0"
val shuffle_is_shuffle_pre: a:sha2_alg -> hash:words_state a -> block:block_w a ->
Lemma (shuffle a hash block == shuffle_aux a hash block)
let shuffle_is_shuffle_pre a hash block =
let rec repeati_is_repeat_range #a (n:nat)
(f:a -> (i:nat{i < n}) -> Tot a)
(f': (i:nat{i < n}) -> a -> Tot a)
(i:nat{i <= n})
(acc0:a)
: Lemma
(requires forall x i. f x i == f' i x)
(ensures Spec.Loops.repeat_range 0 i f acc0 == Lib.LoopCombinators.repeati i f' acc0)
= if i = 0 then (
Lib.LoopCombinators.eq_repeati0 n f' acc0
) else (
Spec.Loops.repeat_range_induction 0 i f acc0;
Lib.LoopCombinators.unfold_repeati n f' acc0 (i-1);
repeati_is_repeat_range n f f' (i-1) acc0
)
in
let rec ws_is_ws_pre (i:nat{i <= size_k_w a}) : Lemma
(ensures forall (j:nat{j < i}).
ws a block j ==
(Lib.LoopCombinators.repeati i
(ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0))).[j]
)
= if i = 0 then ()
else (
ws_is_ws_pre (i - 1);
Lib.LoopCombinators.unfold_repeati (size_k_w a) (ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0)) (i - 1);
let f = ws_pre_inner a block in
let acc0 = Seq.create (size_k_w a) (to_word a 0) in
assert (Lib.LoopCombinators.repeati i f acc0 ==
f (i - 1) (Lib.LoopCombinators.repeati (i-1) f acc0));
reveal_opaque (`%ws) ws
)
in
let ws = ws_pre a block in
let k = k0 a in
let shuffle_core_is_shuffle_core_pre
hash
(i:counter{i < size_k_w a})
: Lemma (shuffle_core a block hash i == shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] hash)
= ws_is_ws_pre (size_k_w a);
reveal_opaque (`%ws_pre) ws_pre;
reveal_opaque (`%shuffle_core) shuffle_core;
reveal_opaque (`%shuffle_core_pre) shuffle_core_pre
in
Classical.forall_intro_2 shuffle_core_is_shuffle_core_pre;
repeati_is_repeat_range (size_k_w a) (shuffle_core a block) (fun i h -> shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] h) (size_k_w a) hash;
assert (shuffle_pre a hash block == shuffle_aux a hash block);
reveal_opaque (`%shuffle) shuffle
#pop-options
(* Compression function *)
let update_aux (a:sha2_alg) (hash:words_state a) (block:bytes{S.length block = block_length a}): Tot (words_state a) =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle_aux a hash block_w in
Lib.Sequence.map2 ( +. ) (hash <: Lib.Sequence.lseq (word a) (state_word_length a)) hash_1
val update_is_update_pre: a:sha2_alg -> hash:words_state a -> block:bytes{S.length block = block_length a} -> | false | false | Spec.SHA2.Lemmas.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 25,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val update_is_update_pre: a:sha2_alg -> hash:words_state a -> block:bytes{S.length block = block_length a} ->
Lemma (update a hash block == update_aux a hash block) | [] | Spec.SHA2.Lemmas.update_is_update_pre | {
"file_name": "specs/lemmas/Spec.SHA2.Lemmas.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
a: Spec.Hash.Definitions.sha2_alg ->
hash: Spec.Hash.Definitions.words_state a ->
block:
Spec.Hash.Definitions.bytes
{FStar.Seq.Base.length block = Spec.Hash.Definitions.block_length a}
-> FStar.Pervasives.Lemma
(ensures Spec.SHA2.update a hash block == Spec.SHA2.Lemmas.update_aux a hash block) | {
"end_col": 28,
"end_line": 146,
"start_col": 39,
"start_line": 132
} |
FStar.Pervasives.Lemma | val update_multi_update (a: md_alg) (h: words_state a) (input: bytes_block a)
: Lemma
(ensures (Spec.Agile.Hash.update_multi a h () input) == (Spec.Agile.Hash.update a h input)) | [
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Seq",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Spec.SHA2.Constants",
"short_module": "C"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let update_multi_update (a: md_alg) (h: words_state a) (input: bytes_block a): Lemma
(ensures (Spec.Agile.Hash.update_multi a h () input) == (Spec.Agile.Hash.update a h input))
=
let h1 = Spec.Agile.Hash.update_multi a h () input in
assert(h1 == Lib.UpdateMulti.mk_update_multi (block_length a) (Spec.Agile.Hash.update a) h input);
if S.length input = 0 then
begin
assert(h1 == h)
end
else
begin
let block, rem = Lib.UpdateMulti.split_block (block_length a) input 1 in
let h2 = Spec.Agile.Hash.update a h block in
assert(rem `Seq.equal` Seq.empty);
assert(block `Seq.equal` input);
let h3 = Lib.UpdateMulti.mk_update_multi (block_length a) (Spec.Agile.Hash.update a) h2 rem in
assert(h1 == h3)
end | val update_multi_update (a: md_alg) (h: words_state a) (input: bytes_block a)
: Lemma
(ensures (Spec.Agile.Hash.update_multi a h () input) == (Spec.Agile.Hash.update a h input))
let update_multi_update (a: md_alg) (h: words_state a) (input: bytes_block a)
: Lemma
(ensures (Spec.Agile.Hash.update_multi a h () input) == (Spec.Agile.Hash.update a h input)) = | false | null | true | let h1 = Spec.Agile.Hash.update_multi a h () input in
assert (h1 == Lib.UpdateMulti.mk_update_multi (block_length a) (Spec.Agile.Hash.update a) h input);
if S.length input = 0
then assert (h1 == h)
else
let block, rem = Lib.UpdateMulti.split_block (block_length a) input 1 in
let h2 = Spec.Agile.Hash.update a h block in
assert (rem `Seq.equal` Seq.empty);
assert (block `Seq.equal` input);
let h3 = Lib.UpdateMulti.mk_update_multi (block_length a) (Spec.Agile.Hash.update a) h2 rem in
assert (h1 == h3) | {
"checked_file": "Spec.SHA2.Lemmas.fst.checked",
"dependencies": [
"Spec.SHA2.Constants.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Lemmas.fsti.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fst.checked",
"prims.fst.checked",
"Lib.UpdateMulti.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.LoopCombinators.fsti.checked",
"Lib.IntTypes.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": true,
"source_file": "Spec.SHA2.Lemmas.fst"
} | [
"lemma"
] | [
"Spec.Hash.Definitions.md_alg",
"Spec.Hash.Definitions.words_state",
"Spec.Hash.Definitions.bytes_block",
"Prims.op_Equality",
"Prims.int",
"FStar.Seq.Base.length",
"Lib.IntTypes.uint8",
"Prims._assert",
"Prims.eq2",
"Prims.bool",
"FStar.Seq.Base.seq",
"Lib.UpdateMulti.uint8",
"Lib.UpdateMulti.mk_update_multi",
"Spec.Hash.Definitions.block_length",
"Spec.Agile.Hash.update",
"Prims.unit",
"FStar.Seq.Base.equal",
"FStar.Seq.Base.empty",
"FStar.Pervasives.Native.tuple2",
"Lib.UpdateMulti.split_block",
"Spec.Agile.Hash.update_multi",
"Prims.l_True",
"Prims.squash",
"Prims.Nil",
"FStar.Pervasives.pattern"
] | [] | module Spec.SHA2.Lemmas
open Lib.IntTypes
module C = Spec.SHA2.Constants
module S = FStar.Seq
open Spec.Hash.Definitions
open Spec.SHA2
open Spec.Hash.Lemmas
friend Spec.SHA2
friend Spec.Agile.Hash
#set-options "--z3rlimit 25 --fuel 0 --ifuel 0"
(* Scheduling function *)
(* Recursive Version *)
let rec ws_aux (a:sha2_alg) (b:block_w a) (t:counter{t < size_k_w a}): Tot (word a) =
if t < block_word_length a then b.[t]
else
let t16 = ws_aux a b (t - 16) in
let t15 = ws_aux a b (t - 15) in
let t7 = ws_aux a b (t - 7) in
let t2 = ws_aux a b (t - 2) in
let s1 = _sigma1 a t2 in
let s0 = _sigma0 a t15 in
(s1 +. t7 +. s0 +. t16)
[@"opaque_to_smt"]
let ws = ws_aux
(* Core shuffling function *)
let shuffle_core_ (a:sha2_alg) (block:block_w a) (hash:words_state a) (t:counter{t < size_k_w a}): Tot (words_state a) =
(**) assert(7 <= S.length hash);
let a0 = hash.[0] in
let b0 = hash.[1] in
let c0 = hash.[2] in
let d0 = hash.[3] in
let e0 = hash.[4] in
let f0 = hash.[5] in
let g0 = hash.[6] in
let h0 = hash.[7] in
(**) assert(S.length (k0 a) = size_k_w a);
let t1 = h0 +. (_Sigma1 a e0) +. (_Ch a e0 f0 g0) +. (k0 a).[t] +. (ws a block t) in
let t2 = (_Sigma0 a a0) +. (_Maj a a0 b0 c0) in
(**) assert(t < S.length (k0 a));
let l = [ t1 +. t2; a0; b0; c0; d0 +. t1; e0; f0; g0 ] in
assert_norm (List.Tot.length l = 8);
S.seq_of_list l
[@"opaque_to_smt"]
let shuffle_core = shuffle_core_
(* Full shuffling function *)
let shuffle_aux (a:sha2_alg) (hash:words_state a) (block:block_w a): Tot (words_state a) =
Spec.Loops.repeat_range 0 (size_k_w a) (shuffle_core a block) hash
#push-options "--max_fuel 1 --max_ifuel 0"
val shuffle_is_shuffle_pre: a:sha2_alg -> hash:words_state a -> block:block_w a ->
Lemma (shuffle a hash block == shuffle_aux a hash block)
let shuffle_is_shuffle_pre a hash block =
let rec repeati_is_repeat_range #a (n:nat)
(f:a -> (i:nat{i < n}) -> Tot a)
(f': (i:nat{i < n}) -> a -> Tot a)
(i:nat{i <= n})
(acc0:a)
: Lemma
(requires forall x i. f x i == f' i x)
(ensures Spec.Loops.repeat_range 0 i f acc0 == Lib.LoopCombinators.repeati i f' acc0)
= if i = 0 then (
Lib.LoopCombinators.eq_repeati0 n f' acc0
) else (
Spec.Loops.repeat_range_induction 0 i f acc0;
Lib.LoopCombinators.unfold_repeati n f' acc0 (i-1);
repeati_is_repeat_range n f f' (i-1) acc0
)
in
let rec ws_is_ws_pre (i:nat{i <= size_k_w a}) : Lemma
(ensures forall (j:nat{j < i}).
ws a block j ==
(Lib.LoopCombinators.repeati i
(ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0))).[j]
)
= if i = 0 then ()
else (
ws_is_ws_pre (i - 1);
Lib.LoopCombinators.unfold_repeati (size_k_w a) (ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0)) (i - 1);
let f = ws_pre_inner a block in
let acc0 = Seq.create (size_k_w a) (to_word a 0) in
assert (Lib.LoopCombinators.repeati i f acc0 ==
f (i - 1) (Lib.LoopCombinators.repeati (i-1) f acc0));
reveal_opaque (`%ws) ws
)
in
let ws = ws_pre a block in
let k = k0 a in
let shuffle_core_is_shuffle_core_pre
hash
(i:counter{i < size_k_w a})
: Lemma (shuffle_core a block hash i == shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] hash)
= ws_is_ws_pre (size_k_w a);
reveal_opaque (`%ws_pre) ws_pre;
reveal_opaque (`%shuffle_core) shuffle_core;
reveal_opaque (`%shuffle_core_pre) shuffle_core_pre
in
Classical.forall_intro_2 shuffle_core_is_shuffle_core_pre;
repeati_is_repeat_range (size_k_w a) (shuffle_core a block) (fun i h -> shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] h) (size_k_w a) hash;
assert (shuffle_pre a hash block == shuffle_aux a hash block);
reveal_opaque (`%shuffle) shuffle
#pop-options
(* Compression function *)
let update_aux (a:sha2_alg) (hash:words_state a) (block:bytes{S.length block = block_length a}): Tot (words_state a) =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle_aux a hash block_w in
Lib.Sequence.map2 ( +. ) (hash <: Lib.Sequence.lseq (word a) (state_word_length a)) hash_1
val update_is_update_pre: a:sha2_alg -> hash:words_state a -> block:bytes{S.length block = block_length a} ->
Lemma (update a hash block == update_aux a hash block)
let update_is_update_pre a hash block =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle a hash block_w in
shuffle_is_shuffle_pre a hash block_w;
let hash:Lib.Sequence.lseq (word a) (state_word_length a) = hash in
reveal_opaque (`%update) update;
let s1 = Lib.Sequence.map2 (+.) hash hash_1 in
let s2 = Spec.Loops.seq_map2 (+.) hash hash_1 in
assert (Seq.length s1 == Seq.length s2);
let aux (i:nat{i < Seq.length s1}) : Lemma (Seq.index s1 i == Seq.index s2 i)
=
// Need Lib.Sequence.index in the context for map2's postcondition to trigger
assert (Lib.Sequence.index s1 i == ( +. ) (Seq.index hash i) (Seq.index hash_1 i))
in Classical.forall_intro aux;
assert (s1 `Seq.equal` s2)
#push-options "--max_fuel 1 --max_ifuel 1 --z3rlimit 200"
let update_224_256 hash block =
assert_norm (words_state SHA2_224 == words_state SHA2_256);
let rec ws_224_256 (b: block_w SHA2_256) (t:counter{t < size_k_w SHA2_256}):
Lemma
(ensures (ws SHA2_224 b t == ws SHA2_256 b t))
[ SMTPat (ws SHA2_256 b t) ]
=
reveal_opaque (`%ws) ws;
assert_norm (block_w SHA2_256 == block_w SHA2_224);
assert_norm (size_k_w SHA2_256 == size_k_w SHA2_224);
(*
* The code earlier was doing assert_norm (_sigma0 SHA2_256 == _sigma0 SHA2_224)
*
* This is a bit suboptimal, since assert_norm is a heavy hammer,
* it also ends up unfolding `==`, which means the equality is not
* reduced in F*, rather the query for proving equality of two
* lambda terms reaches Z3 -- once that happens we are at the mercy of
* hashconsing etc. to prove the equality
*
* Instead, if we do controlled normalization, we can prove the equality
* within F*
*)
let steps = [iota; primops; simplify; delta_only [
`%_sigma0; `%_sigma1; `%op0; `%word; `%word_t;
`%__proj__Mkops__item__e5; `%op224_256; `%__proj__Mkops__item__e3;
`%__proj__Mkops__item__e4;
`%Spec.SHA2.op_Hat_Dot; `%Spec.SHA2.op_Greater_Greater_Dot;
`%Spec.SHA2.op_Greater_Greater_Greater_Dot ]] in
assert (norm steps (_sigma0 SHA2_256) == norm steps (_sigma0 SHA2_224));
assert (norm steps (_sigma1 SHA2_256) == norm steps (_sigma1 SHA2_224));
norm_spec steps (_sigma0 SHA2_256);
norm_spec steps (_sigma0 SHA2_224);
norm_spec steps (_sigma1 SHA2_256);
norm_spec steps (_sigma1 SHA2_224);
// assert_norm (word_add_mod SHA2_256 == word_add_mod SHA2_224);
if t < block_word_length SHA2_256 then
()
else begin
ws_224_256 b (t - 16);
ws_224_256 b (t - 15);
ws_224_256 b (t - 7);
ws_224_256 b (t - 2)
end
in
let shuffle_core_224_256 (block:block_w SHA2_256) (hash:words_state SHA2_256) (t:counter{t < size_k_w SHA2_256}):
Lemma (ensures (shuffle_core SHA2_224 block hash t == shuffle_core SHA2_256 block hash t))
[ SMTPat (shuffle_core SHA2_256 block hash t) ]
=
reveal_opaque (`%shuffle_core) shuffle_core
in
let rec repeat_range_f (#a:Type) (min:nat) (max:nat{min <= max}) (f g:(a -> i:nat{i < max} -> Tot a)) (x: a):
Lemma
(requires (forall x (i: nat { i < max }). {:pattern f x i \/ g x i } f x i == g x i))
(ensures (Spec.Loops.repeat_range min max f x == Spec.Loops.repeat_range min max g x))
(decreases (max - min))
[ SMTPat (Spec.Loops.repeat_range min max f x); SMTPat (Spec.Loops.repeat_range min max g x) ]
=
if min = max then
()
else
repeat_range_f (min + 1) max f g (f x min)
in
let shuffle_224_256 (hash:words_state SHA2_256) (block:block_w SHA2_256):
Lemma (ensures (shuffle SHA2_224 hash block == shuffle SHA2_256 hash block))
[ SMTPat (shuffle SHA2_256 hash block) ]
=
shuffle_is_shuffle_pre SHA2_224 hash block;
shuffle_is_shuffle_pre SHA2_256 hash block;
reveal_opaque (`%shuffle) shuffle;
assert_norm (words_state SHA2_224 == words_state SHA2_256)
in
let rec seq_map2_f
(#a:Type) (#b:Type) (#c:Type)
(f g:(a -> b -> Tot c))
(s:S.seq a) (s':S.seq b{S.length s = S.length s'}):
Lemma
(requires (forall x y. {:pattern f x y \/ g x y} f x y == g x y))
(ensures (Spec.Loops.(seq_map2 f s s' == seq_map2 g s s')))
(decreases (S.length s))
[ SMTPat (Spec.Loops.seq_map2 f s s'); SMTPat (Spec.Loops.seq_map2 g s s') ]
=
if S.length s = 0 then
()
else
seq_map2_f f g (S.tail s) (S.tail s')
in
assert_norm (words_of_bytes SHA2_256 #(block_word_length SHA2_256) == words_of_bytes SHA2_224 #(block_word_length SHA2_224));
reveal_opaque (`%shuffle) shuffle;
reveal_opaque (`%update) update
#pop-options
#push-options "--fuel 1"
let update_multi_update (a: md_alg) (h: words_state a) (input: bytes_block a): Lemma | false | false | Spec.SHA2.Lemmas.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 1,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 25,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val update_multi_update (a: md_alg) (h: words_state a) (input: bytes_block a)
: Lemma
(ensures (Spec.Agile.Hash.update_multi a h () input) == (Spec.Agile.Hash.update a h input)) | [] | Spec.SHA2.Lemmas.update_multi_update | {
"file_name": "specs/lemmas/Spec.SHA2.Lemmas.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
a: Spec.Hash.Definitions.md_alg ->
h: Spec.Hash.Definitions.words_state a ->
input: Spec.Hash.Definitions.bytes_block a
-> FStar.Pervasives.Lemma
(ensures Spec.Agile.Hash.update_multi a h () input == Spec.Agile.Hash.update a h input) | {
"end_col": 7,
"end_line": 264,
"start_col": 1,
"start_line": 249
} |
FStar.Pervasives.Lemma | val update_multi_224_256: hash:words_state SHA2_256 -> blocks:bytes_blocks SHA2_256 ->
Lemma
(ensures (Spec.Agile.Hash.update_multi SHA2_256 hash () blocks ==
Spec.Agile.Hash.update_multi SHA2_224 hash () blocks))
(decreases (Seq.length blocks)) | [
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Seq",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Spec.SHA2.Constants",
"short_module": "C"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let rec update_multi_224_256 hash blocks =
let a = SHA2_256 in
let a' = SHA2_224 in
assert_norm (words_state a == words_state a');
if S.length blocks = 0 then
begin
assert(blocks `S.equal` S.empty);
Spec.Hash.Lemmas.update_multi_zero a hash;
Spec.Hash.Lemmas.update_multi_zero a' hash
end
else
begin
assert(block_length a = block_length a');
let block1, blocks_end = S.split blocks (block_length a) in
assert(S.length block1 = block_length a);
assert(S.length blocks_end % block_length a = 0);
assert(S.append block1 blocks_end `S.equal` blocks);
update_multi_associative a hash block1 blocks_end;
update_multi_associative a' hash block1 blocks_end;
update_multi_update a hash block1;
update_multi_update a' hash block1;
let hash1 = Spec.Agile.Hash.update a hash block1 in
let hash2 = Spec.Agile.Hash.update a' hash block1 in
update_224_256 hash block1;
assert(hash1 == hash2);
update_multi_224_256 hash1 blocks_end
end | val update_multi_224_256: hash:words_state SHA2_256 -> blocks:bytes_blocks SHA2_256 ->
Lemma
(ensures (Spec.Agile.Hash.update_multi SHA2_256 hash () blocks ==
Spec.Agile.Hash.update_multi SHA2_224 hash () blocks))
(decreases (Seq.length blocks))
let rec update_multi_224_256 hash blocks = | false | null | true | let a = SHA2_256 in
let a' = SHA2_224 in
assert_norm (words_state a == words_state a');
if S.length blocks = 0
then
(assert (blocks `S.equal` S.empty);
Spec.Hash.Lemmas.update_multi_zero a hash;
Spec.Hash.Lemmas.update_multi_zero a' hash)
else
(assert (block_length a = block_length a');
let block1, blocks_end = S.split blocks (block_length a) in
assert (S.length block1 = block_length a);
assert (S.length blocks_end % block_length a = 0);
assert ((S.append block1 blocks_end) `S.equal` blocks);
update_multi_associative a hash block1 blocks_end;
update_multi_associative a' hash block1 blocks_end;
update_multi_update a hash block1;
update_multi_update a' hash block1;
let hash1 = Spec.Agile.Hash.update a hash block1 in
let hash2 = Spec.Agile.Hash.update a' hash block1 in
update_224_256 hash block1;
assert (hash1 == hash2);
update_multi_224_256 hash1 blocks_end) | {
"checked_file": "Spec.SHA2.Lemmas.fst.checked",
"dependencies": [
"Spec.SHA2.Constants.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Lemmas.fsti.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fst.checked",
"prims.fst.checked",
"Lib.UpdateMulti.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.LoopCombinators.fsti.checked",
"Lib.IntTypes.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": true,
"source_file": "Spec.SHA2.Lemmas.fst"
} | [
"lemma",
""
] | [
"Spec.Hash.Definitions.words_state",
"Spec.Hash.Definitions.SHA2_256",
"Spec.Hash.Definitions.bytes_blocks",
"Prims.op_Equality",
"Prims.int",
"FStar.Seq.Base.length",
"Lib.IntTypes.uint8",
"Spec.Hash.Lemmas.update_multi_zero",
"Prims.unit",
"Prims._assert",
"FStar.Seq.Base.equal",
"FStar.Seq.Base.empty",
"Prims.bool",
"FStar.Seq.Base.seq",
"Spec.SHA2.Lemmas.update_multi_224_256",
"Prims.eq2",
"Lib.Sequence.seq",
"Spec.Hash.Definitions.word",
"Prims.l_or",
"Prims.nat",
"Spec.Hash.Definitions.state_word_length",
"Spec.SHA2.Lemmas.update_224_256",
"Spec.Agile.Hash.update",
"Spec.SHA2.Lemmas.update_multi_update",
"Spec.Hash.Lemmas.update_multi_associative",
"FStar.Seq.Base.append",
"Prims.b2t",
"Prims.op_Modulus",
"Spec.Hash.Definitions.block_length",
"Prims.op_GreaterThanOrEqual",
"Prims.op_disEquality",
"FStar.Pervasives.Native.tuple2",
"Lib.IntTypes.int_t",
"Lib.IntTypes.U8",
"Lib.IntTypes.SEC",
"FStar.Seq.Properties.split",
"Prims.nonzero",
"FStar.Pervasives.assert_norm",
"Spec.Hash.Definitions.hash_alg",
"Spec.Hash.Definitions.SHA2_224"
] | [] | module Spec.SHA2.Lemmas
open Lib.IntTypes
module C = Spec.SHA2.Constants
module S = FStar.Seq
open Spec.Hash.Definitions
open Spec.SHA2
open Spec.Hash.Lemmas
friend Spec.SHA2
friend Spec.Agile.Hash
#set-options "--z3rlimit 25 --fuel 0 --ifuel 0"
(* Scheduling function *)
(* Recursive Version *)
let rec ws_aux (a:sha2_alg) (b:block_w a) (t:counter{t < size_k_w a}): Tot (word a) =
if t < block_word_length a then b.[t]
else
let t16 = ws_aux a b (t - 16) in
let t15 = ws_aux a b (t - 15) in
let t7 = ws_aux a b (t - 7) in
let t2 = ws_aux a b (t - 2) in
let s1 = _sigma1 a t2 in
let s0 = _sigma0 a t15 in
(s1 +. t7 +. s0 +. t16)
[@"opaque_to_smt"]
let ws = ws_aux
(* Core shuffling function *)
let shuffle_core_ (a:sha2_alg) (block:block_w a) (hash:words_state a) (t:counter{t < size_k_w a}): Tot (words_state a) =
(**) assert(7 <= S.length hash);
let a0 = hash.[0] in
let b0 = hash.[1] in
let c0 = hash.[2] in
let d0 = hash.[3] in
let e0 = hash.[4] in
let f0 = hash.[5] in
let g0 = hash.[6] in
let h0 = hash.[7] in
(**) assert(S.length (k0 a) = size_k_w a);
let t1 = h0 +. (_Sigma1 a e0) +. (_Ch a e0 f0 g0) +. (k0 a).[t] +. (ws a block t) in
let t2 = (_Sigma0 a a0) +. (_Maj a a0 b0 c0) in
(**) assert(t < S.length (k0 a));
let l = [ t1 +. t2; a0; b0; c0; d0 +. t1; e0; f0; g0 ] in
assert_norm (List.Tot.length l = 8);
S.seq_of_list l
[@"opaque_to_smt"]
let shuffle_core = shuffle_core_
(* Full shuffling function *)
let shuffle_aux (a:sha2_alg) (hash:words_state a) (block:block_w a): Tot (words_state a) =
Spec.Loops.repeat_range 0 (size_k_w a) (shuffle_core a block) hash
#push-options "--max_fuel 1 --max_ifuel 0"
val shuffle_is_shuffle_pre: a:sha2_alg -> hash:words_state a -> block:block_w a ->
Lemma (shuffle a hash block == shuffle_aux a hash block)
let shuffle_is_shuffle_pre a hash block =
let rec repeati_is_repeat_range #a (n:nat)
(f:a -> (i:nat{i < n}) -> Tot a)
(f': (i:nat{i < n}) -> a -> Tot a)
(i:nat{i <= n})
(acc0:a)
: Lemma
(requires forall x i. f x i == f' i x)
(ensures Spec.Loops.repeat_range 0 i f acc0 == Lib.LoopCombinators.repeati i f' acc0)
= if i = 0 then (
Lib.LoopCombinators.eq_repeati0 n f' acc0
) else (
Spec.Loops.repeat_range_induction 0 i f acc0;
Lib.LoopCombinators.unfold_repeati n f' acc0 (i-1);
repeati_is_repeat_range n f f' (i-1) acc0
)
in
let rec ws_is_ws_pre (i:nat{i <= size_k_w a}) : Lemma
(ensures forall (j:nat{j < i}).
ws a block j ==
(Lib.LoopCombinators.repeati i
(ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0))).[j]
)
= if i = 0 then ()
else (
ws_is_ws_pre (i - 1);
Lib.LoopCombinators.unfold_repeati (size_k_w a) (ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0)) (i - 1);
let f = ws_pre_inner a block in
let acc0 = Seq.create (size_k_w a) (to_word a 0) in
assert (Lib.LoopCombinators.repeati i f acc0 ==
f (i - 1) (Lib.LoopCombinators.repeati (i-1) f acc0));
reveal_opaque (`%ws) ws
)
in
let ws = ws_pre a block in
let k = k0 a in
let shuffle_core_is_shuffle_core_pre
hash
(i:counter{i < size_k_w a})
: Lemma (shuffle_core a block hash i == shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] hash)
= ws_is_ws_pre (size_k_w a);
reveal_opaque (`%ws_pre) ws_pre;
reveal_opaque (`%shuffle_core) shuffle_core;
reveal_opaque (`%shuffle_core_pre) shuffle_core_pre
in
Classical.forall_intro_2 shuffle_core_is_shuffle_core_pre;
repeati_is_repeat_range (size_k_w a) (shuffle_core a block) (fun i h -> shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] h) (size_k_w a) hash;
assert (shuffle_pre a hash block == shuffle_aux a hash block);
reveal_opaque (`%shuffle) shuffle
#pop-options
(* Compression function *)
let update_aux (a:sha2_alg) (hash:words_state a) (block:bytes{S.length block = block_length a}): Tot (words_state a) =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle_aux a hash block_w in
Lib.Sequence.map2 ( +. ) (hash <: Lib.Sequence.lseq (word a) (state_word_length a)) hash_1
val update_is_update_pre: a:sha2_alg -> hash:words_state a -> block:bytes{S.length block = block_length a} ->
Lemma (update a hash block == update_aux a hash block)
let update_is_update_pre a hash block =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle a hash block_w in
shuffle_is_shuffle_pre a hash block_w;
let hash:Lib.Sequence.lseq (word a) (state_word_length a) = hash in
reveal_opaque (`%update) update;
let s1 = Lib.Sequence.map2 (+.) hash hash_1 in
let s2 = Spec.Loops.seq_map2 (+.) hash hash_1 in
assert (Seq.length s1 == Seq.length s2);
let aux (i:nat{i < Seq.length s1}) : Lemma (Seq.index s1 i == Seq.index s2 i)
=
// Need Lib.Sequence.index in the context for map2's postcondition to trigger
assert (Lib.Sequence.index s1 i == ( +. ) (Seq.index hash i) (Seq.index hash_1 i))
in Classical.forall_intro aux;
assert (s1 `Seq.equal` s2)
#push-options "--max_fuel 1 --max_ifuel 1 --z3rlimit 200"
let update_224_256 hash block =
assert_norm (words_state SHA2_224 == words_state SHA2_256);
let rec ws_224_256 (b: block_w SHA2_256) (t:counter{t < size_k_w SHA2_256}):
Lemma
(ensures (ws SHA2_224 b t == ws SHA2_256 b t))
[ SMTPat (ws SHA2_256 b t) ]
=
reveal_opaque (`%ws) ws;
assert_norm (block_w SHA2_256 == block_w SHA2_224);
assert_norm (size_k_w SHA2_256 == size_k_w SHA2_224);
(*
* The code earlier was doing assert_norm (_sigma0 SHA2_256 == _sigma0 SHA2_224)
*
* This is a bit suboptimal, since assert_norm is a heavy hammer,
* it also ends up unfolding `==`, which means the equality is not
* reduced in F*, rather the query for proving equality of two
* lambda terms reaches Z3 -- once that happens we are at the mercy of
* hashconsing etc. to prove the equality
*
* Instead, if we do controlled normalization, we can prove the equality
* within F*
*)
let steps = [iota; primops; simplify; delta_only [
`%_sigma0; `%_sigma1; `%op0; `%word; `%word_t;
`%__proj__Mkops__item__e5; `%op224_256; `%__proj__Mkops__item__e3;
`%__proj__Mkops__item__e4;
`%Spec.SHA2.op_Hat_Dot; `%Spec.SHA2.op_Greater_Greater_Dot;
`%Spec.SHA2.op_Greater_Greater_Greater_Dot ]] in
assert (norm steps (_sigma0 SHA2_256) == norm steps (_sigma0 SHA2_224));
assert (norm steps (_sigma1 SHA2_256) == norm steps (_sigma1 SHA2_224));
norm_spec steps (_sigma0 SHA2_256);
norm_spec steps (_sigma0 SHA2_224);
norm_spec steps (_sigma1 SHA2_256);
norm_spec steps (_sigma1 SHA2_224);
// assert_norm (word_add_mod SHA2_256 == word_add_mod SHA2_224);
if t < block_word_length SHA2_256 then
()
else begin
ws_224_256 b (t - 16);
ws_224_256 b (t - 15);
ws_224_256 b (t - 7);
ws_224_256 b (t - 2)
end
in
let shuffle_core_224_256 (block:block_w SHA2_256) (hash:words_state SHA2_256) (t:counter{t < size_k_w SHA2_256}):
Lemma (ensures (shuffle_core SHA2_224 block hash t == shuffle_core SHA2_256 block hash t))
[ SMTPat (shuffle_core SHA2_256 block hash t) ]
=
reveal_opaque (`%shuffle_core) shuffle_core
in
let rec repeat_range_f (#a:Type) (min:nat) (max:nat{min <= max}) (f g:(a -> i:nat{i < max} -> Tot a)) (x: a):
Lemma
(requires (forall x (i: nat { i < max }). {:pattern f x i \/ g x i } f x i == g x i))
(ensures (Spec.Loops.repeat_range min max f x == Spec.Loops.repeat_range min max g x))
(decreases (max - min))
[ SMTPat (Spec.Loops.repeat_range min max f x); SMTPat (Spec.Loops.repeat_range min max g x) ]
=
if min = max then
()
else
repeat_range_f (min + 1) max f g (f x min)
in
let shuffle_224_256 (hash:words_state SHA2_256) (block:block_w SHA2_256):
Lemma (ensures (shuffle SHA2_224 hash block == shuffle SHA2_256 hash block))
[ SMTPat (shuffle SHA2_256 hash block) ]
=
shuffle_is_shuffle_pre SHA2_224 hash block;
shuffle_is_shuffle_pre SHA2_256 hash block;
reveal_opaque (`%shuffle) shuffle;
assert_norm (words_state SHA2_224 == words_state SHA2_256)
in
let rec seq_map2_f
(#a:Type) (#b:Type) (#c:Type)
(f g:(a -> b -> Tot c))
(s:S.seq a) (s':S.seq b{S.length s = S.length s'}):
Lemma
(requires (forall x y. {:pattern f x y \/ g x y} f x y == g x y))
(ensures (Spec.Loops.(seq_map2 f s s' == seq_map2 g s s')))
(decreases (S.length s))
[ SMTPat (Spec.Loops.seq_map2 f s s'); SMTPat (Spec.Loops.seq_map2 g s s') ]
=
if S.length s = 0 then
()
else
seq_map2_f f g (S.tail s) (S.tail s')
in
assert_norm (words_of_bytes SHA2_256 #(block_word_length SHA2_256) == words_of_bytes SHA2_224 #(block_word_length SHA2_224));
reveal_opaque (`%shuffle) shuffle;
reveal_opaque (`%update) update
#pop-options
#push-options "--fuel 1"
let update_multi_update (a: md_alg) (h: words_state a) (input: bytes_block a): Lemma
(ensures (Spec.Agile.Hash.update_multi a h () input) == (Spec.Agile.Hash.update a h input))
=
let h1 = Spec.Agile.Hash.update_multi a h () input in
assert(h1 == Lib.UpdateMulti.mk_update_multi (block_length a) (Spec.Agile.Hash.update a) h input);
if S.length input = 0 then
begin
assert(h1 == h)
end
else
begin
let block, rem = Lib.UpdateMulti.split_block (block_length a) input 1 in
let h2 = Spec.Agile.Hash.update a h block in
assert(rem `Seq.equal` Seq.empty);
assert(block `Seq.equal` input);
let h3 = Lib.UpdateMulti.mk_update_multi (block_length a) (Spec.Agile.Hash.update a) h2 rem in
assert(h1 == h3)
end
#pop-options | false | false | Spec.SHA2.Lemmas.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 25,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val update_multi_224_256: hash:words_state SHA2_256 -> blocks:bytes_blocks SHA2_256 ->
Lemma
(ensures (Spec.Agile.Hash.update_multi SHA2_256 hash () blocks ==
Spec.Agile.Hash.update_multi SHA2_224 hash () blocks))
(decreases (Seq.length blocks)) | [
"recursion"
] | Spec.SHA2.Lemmas.update_multi_224_256 | {
"file_name": "specs/lemmas/Spec.SHA2.Lemmas.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
hash: Spec.Hash.Definitions.words_state Spec.Hash.Definitions.SHA2_256 ->
blocks: Spec.Hash.Definitions.bytes_blocks Spec.Hash.Definitions.SHA2_256
-> FStar.Pervasives.Lemma
(ensures
Spec.Agile.Hash.update_multi Spec.Hash.Definitions.SHA2_256 hash () blocks ==
Spec.Agile.Hash.update_multi Spec.Hash.Definitions.SHA2_224 hash () blocks)
(decreases FStar.Seq.Base.length blocks) | {
"end_col": 7,
"end_line": 294,
"start_col": 42,
"start_line": 268
} |
FStar.Pervasives.Lemma | val update_last_384_512:
hash:words_state SHA2_512 ->
prevlen:Spec.Hash.Incremental.Definitions.prev_length_t SHA2_512 ->
input:bytes{ (Seq.length input + prevlen) `less_than_max_input_length` SHA2_512 /\
Seq.length input <= block_length SHA2_512 } ->
Lemma
(ensures Spec.Hash.Incremental.Definitions.update_last SHA2_512 hash prevlen input ==
Spec.Hash.Incremental.Definitions.update_last SHA2_384 hash prevlen input) | [
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Seq",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Spec.SHA2.Constants",
"short_module": "C"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let update_last_384_512 hash prevlen input =
let update_multi_384_512 (hash:words_state SHA2_512) (blocks:bytes_blocks SHA2_512):
Lemma
(ensures (Spec.Agile.Hash.update_multi SHA2_512 hash () blocks ==
Spec.Agile.Hash.update_multi SHA2_384 hash () blocks))
(decreases (Seq.length blocks))
[ SMTPat (Spec.Agile.Hash.update_multi SHA2_512 hash () blocks) ]
=
update_multi_384_512 hash blocks
in
() | val update_last_384_512:
hash:words_state SHA2_512 ->
prevlen:Spec.Hash.Incremental.Definitions.prev_length_t SHA2_512 ->
input:bytes{ (Seq.length input + prevlen) `less_than_max_input_length` SHA2_512 /\
Seq.length input <= block_length SHA2_512 } ->
Lemma
(ensures Spec.Hash.Incremental.Definitions.update_last SHA2_512 hash prevlen input ==
Spec.Hash.Incremental.Definitions.update_last SHA2_384 hash prevlen input)
let update_last_384_512 hash prevlen input = | false | null | true | let update_multi_384_512 (hash: words_state SHA2_512) (blocks: bytes_blocks SHA2_512)
: Lemma
(ensures
(Spec.Agile.Hash.update_multi SHA2_512 hash () blocks ==
Spec.Agile.Hash.update_multi SHA2_384 hash () blocks))
(decreases (Seq.length blocks))
[SMTPat (Spec.Agile.Hash.update_multi SHA2_512 hash () blocks)] =
update_multi_384_512 hash blocks
in
() | {
"checked_file": "Spec.SHA2.Lemmas.fst.checked",
"dependencies": [
"Spec.SHA2.Constants.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Lemmas.fsti.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fst.checked",
"prims.fst.checked",
"Lib.UpdateMulti.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.LoopCombinators.fsti.checked",
"Lib.IntTypes.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": true,
"source_file": "Spec.SHA2.Lemmas.fst"
} | [
"lemma"
] | [
"Spec.Hash.Definitions.words_state",
"Spec.Hash.Definitions.SHA2_512",
"Spec.Hash.Incremental.Definitions.prev_length_t",
"Spec.Hash.Definitions.bytes",
"Prims.l_and",
"Prims.b2t",
"Spec.Hash.Definitions.less_than_max_input_length",
"Prims.op_Addition",
"FStar.Seq.Base.length",
"Lib.IntTypes.uint8",
"Prims.op_LessThanOrEqual",
"Spec.Hash.Definitions.block_length",
"Spec.Hash.Definitions.bytes_blocks",
"Prims.unit",
"Lib.IntTypes.int_t",
"Lib.IntTypes.U8",
"Lib.IntTypes.SEC",
"Prims.l_True",
"Prims.squash",
"Prims.eq2",
"Lib.Sequence.seq",
"Spec.Hash.Definitions.word",
"Prims.l_or",
"Prims.nat",
"Spec.Hash.Definitions.state_word_length",
"Spec.Hash.Definitions.SHA2_384",
"Spec.Agile.Hash.update_multi",
"Prims.Cons",
"FStar.Pervasives.pattern",
"FStar.Pervasives.smt_pat",
"Prims.Nil",
"Spec.SHA2.Lemmas.update_multi_384_512"
] | [] | module Spec.SHA2.Lemmas
open Lib.IntTypes
module C = Spec.SHA2.Constants
module S = FStar.Seq
open Spec.Hash.Definitions
open Spec.SHA2
open Spec.Hash.Lemmas
friend Spec.SHA2
friend Spec.Agile.Hash
#set-options "--z3rlimit 25 --fuel 0 --ifuel 0"
(* Scheduling function *)
(* Recursive Version *)
let rec ws_aux (a:sha2_alg) (b:block_w a) (t:counter{t < size_k_w a}): Tot (word a) =
if t < block_word_length a then b.[t]
else
let t16 = ws_aux a b (t - 16) in
let t15 = ws_aux a b (t - 15) in
let t7 = ws_aux a b (t - 7) in
let t2 = ws_aux a b (t - 2) in
let s1 = _sigma1 a t2 in
let s0 = _sigma0 a t15 in
(s1 +. t7 +. s0 +. t16)
[@"opaque_to_smt"]
let ws = ws_aux
(* Core shuffling function *)
let shuffle_core_ (a:sha2_alg) (block:block_w a) (hash:words_state a) (t:counter{t < size_k_w a}): Tot (words_state a) =
(**) assert(7 <= S.length hash);
let a0 = hash.[0] in
let b0 = hash.[1] in
let c0 = hash.[2] in
let d0 = hash.[3] in
let e0 = hash.[4] in
let f0 = hash.[5] in
let g0 = hash.[6] in
let h0 = hash.[7] in
(**) assert(S.length (k0 a) = size_k_w a);
let t1 = h0 +. (_Sigma1 a e0) +. (_Ch a e0 f0 g0) +. (k0 a).[t] +. (ws a block t) in
let t2 = (_Sigma0 a a0) +. (_Maj a a0 b0 c0) in
(**) assert(t < S.length (k0 a));
let l = [ t1 +. t2; a0; b0; c0; d0 +. t1; e0; f0; g0 ] in
assert_norm (List.Tot.length l = 8);
S.seq_of_list l
[@"opaque_to_smt"]
let shuffle_core = shuffle_core_
(* Full shuffling function *)
let shuffle_aux (a:sha2_alg) (hash:words_state a) (block:block_w a): Tot (words_state a) =
Spec.Loops.repeat_range 0 (size_k_w a) (shuffle_core a block) hash
#push-options "--max_fuel 1 --max_ifuel 0"
val shuffle_is_shuffle_pre: a:sha2_alg -> hash:words_state a -> block:block_w a ->
Lemma (shuffle a hash block == shuffle_aux a hash block)
let shuffle_is_shuffle_pre a hash block =
let rec repeati_is_repeat_range #a (n:nat)
(f:a -> (i:nat{i < n}) -> Tot a)
(f': (i:nat{i < n}) -> a -> Tot a)
(i:nat{i <= n})
(acc0:a)
: Lemma
(requires forall x i. f x i == f' i x)
(ensures Spec.Loops.repeat_range 0 i f acc0 == Lib.LoopCombinators.repeati i f' acc0)
= if i = 0 then (
Lib.LoopCombinators.eq_repeati0 n f' acc0
) else (
Spec.Loops.repeat_range_induction 0 i f acc0;
Lib.LoopCombinators.unfold_repeati n f' acc0 (i-1);
repeati_is_repeat_range n f f' (i-1) acc0
)
in
let rec ws_is_ws_pre (i:nat{i <= size_k_w a}) : Lemma
(ensures forall (j:nat{j < i}).
ws a block j ==
(Lib.LoopCombinators.repeati i
(ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0))).[j]
)
= if i = 0 then ()
else (
ws_is_ws_pre (i - 1);
Lib.LoopCombinators.unfold_repeati (size_k_w a) (ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0)) (i - 1);
let f = ws_pre_inner a block in
let acc0 = Seq.create (size_k_w a) (to_word a 0) in
assert (Lib.LoopCombinators.repeati i f acc0 ==
f (i - 1) (Lib.LoopCombinators.repeati (i-1) f acc0));
reveal_opaque (`%ws) ws
)
in
let ws = ws_pre a block in
let k = k0 a in
let shuffle_core_is_shuffle_core_pre
hash
(i:counter{i < size_k_w a})
: Lemma (shuffle_core a block hash i == shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] hash)
= ws_is_ws_pre (size_k_w a);
reveal_opaque (`%ws_pre) ws_pre;
reveal_opaque (`%shuffle_core) shuffle_core;
reveal_opaque (`%shuffle_core_pre) shuffle_core_pre
in
Classical.forall_intro_2 shuffle_core_is_shuffle_core_pre;
repeati_is_repeat_range (size_k_w a) (shuffle_core a block) (fun i h -> shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] h) (size_k_w a) hash;
assert (shuffle_pre a hash block == shuffle_aux a hash block);
reveal_opaque (`%shuffle) shuffle
#pop-options
(* Compression function *)
let update_aux (a:sha2_alg) (hash:words_state a) (block:bytes{S.length block = block_length a}): Tot (words_state a) =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle_aux a hash block_w in
Lib.Sequence.map2 ( +. ) (hash <: Lib.Sequence.lseq (word a) (state_word_length a)) hash_1
val update_is_update_pre: a:sha2_alg -> hash:words_state a -> block:bytes{S.length block = block_length a} ->
Lemma (update a hash block == update_aux a hash block)
let update_is_update_pre a hash block =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle a hash block_w in
shuffle_is_shuffle_pre a hash block_w;
let hash:Lib.Sequence.lseq (word a) (state_word_length a) = hash in
reveal_opaque (`%update) update;
let s1 = Lib.Sequence.map2 (+.) hash hash_1 in
let s2 = Spec.Loops.seq_map2 (+.) hash hash_1 in
assert (Seq.length s1 == Seq.length s2);
let aux (i:nat{i < Seq.length s1}) : Lemma (Seq.index s1 i == Seq.index s2 i)
=
// Need Lib.Sequence.index in the context for map2's postcondition to trigger
assert (Lib.Sequence.index s1 i == ( +. ) (Seq.index hash i) (Seq.index hash_1 i))
in Classical.forall_intro aux;
assert (s1 `Seq.equal` s2)
#push-options "--max_fuel 1 --max_ifuel 1 --z3rlimit 200"
let update_224_256 hash block =
assert_norm (words_state SHA2_224 == words_state SHA2_256);
let rec ws_224_256 (b: block_w SHA2_256) (t:counter{t < size_k_w SHA2_256}):
Lemma
(ensures (ws SHA2_224 b t == ws SHA2_256 b t))
[ SMTPat (ws SHA2_256 b t) ]
=
reveal_opaque (`%ws) ws;
assert_norm (block_w SHA2_256 == block_w SHA2_224);
assert_norm (size_k_w SHA2_256 == size_k_w SHA2_224);
(*
* The code earlier was doing assert_norm (_sigma0 SHA2_256 == _sigma0 SHA2_224)
*
* This is a bit suboptimal, since assert_norm is a heavy hammer,
* it also ends up unfolding `==`, which means the equality is not
* reduced in F*, rather the query for proving equality of two
* lambda terms reaches Z3 -- once that happens we are at the mercy of
* hashconsing etc. to prove the equality
*
* Instead, if we do controlled normalization, we can prove the equality
* within F*
*)
let steps = [iota; primops; simplify; delta_only [
`%_sigma0; `%_sigma1; `%op0; `%word; `%word_t;
`%__proj__Mkops__item__e5; `%op224_256; `%__proj__Mkops__item__e3;
`%__proj__Mkops__item__e4;
`%Spec.SHA2.op_Hat_Dot; `%Spec.SHA2.op_Greater_Greater_Dot;
`%Spec.SHA2.op_Greater_Greater_Greater_Dot ]] in
assert (norm steps (_sigma0 SHA2_256) == norm steps (_sigma0 SHA2_224));
assert (norm steps (_sigma1 SHA2_256) == norm steps (_sigma1 SHA2_224));
norm_spec steps (_sigma0 SHA2_256);
norm_spec steps (_sigma0 SHA2_224);
norm_spec steps (_sigma1 SHA2_256);
norm_spec steps (_sigma1 SHA2_224);
// assert_norm (word_add_mod SHA2_256 == word_add_mod SHA2_224);
if t < block_word_length SHA2_256 then
()
else begin
ws_224_256 b (t - 16);
ws_224_256 b (t - 15);
ws_224_256 b (t - 7);
ws_224_256 b (t - 2)
end
in
let shuffle_core_224_256 (block:block_w SHA2_256) (hash:words_state SHA2_256) (t:counter{t < size_k_w SHA2_256}):
Lemma (ensures (shuffle_core SHA2_224 block hash t == shuffle_core SHA2_256 block hash t))
[ SMTPat (shuffle_core SHA2_256 block hash t) ]
=
reveal_opaque (`%shuffle_core) shuffle_core
in
let rec repeat_range_f (#a:Type) (min:nat) (max:nat{min <= max}) (f g:(a -> i:nat{i < max} -> Tot a)) (x: a):
Lemma
(requires (forall x (i: nat { i < max }). {:pattern f x i \/ g x i } f x i == g x i))
(ensures (Spec.Loops.repeat_range min max f x == Spec.Loops.repeat_range min max g x))
(decreases (max - min))
[ SMTPat (Spec.Loops.repeat_range min max f x); SMTPat (Spec.Loops.repeat_range min max g x) ]
=
if min = max then
()
else
repeat_range_f (min + 1) max f g (f x min)
in
let shuffle_224_256 (hash:words_state SHA2_256) (block:block_w SHA2_256):
Lemma (ensures (shuffle SHA2_224 hash block == shuffle SHA2_256 hash block))
[ SMTPat (shuffle SHA2_256 hash block) ]
=
shuffle_is_shuffle_pre SHA2_224 hash block;
shuffle_is_shuffle_pre SHA2_256 hash block;
reveal_opaque (`%shuffle) shuffle;
assert_norm (words_state SHA2_224 == words_state SHA2_256)
in
let rec seq_map2_f
(#a:Type) (#b:Type) (#c:Type)
(f g:(a -> b -> Tot c))
(s:S.seq a) (s':S.seq b{S.length s = S.length s'}):
Lemma
(requires (forall x y. {:pattern f x y \/ g x y} f x y == g x y))
(ensures (Spec.Loops.(seq_map2 f s s' == seq_map2 g s s')))
(decreases (S.length s))
[ SMTPat (Spec.Loops.seq_map2 f s s'); SMTPat (Spec.Loops.seq_map2 g s s') ]
=
if S.length s = 0 then
()
else
seq_map2_f f g (S.tail s) (S.tail s')
in
assert_norm (words_of_bytes SHA2_256 #(block_word_length SHA2_256) == words_of_bytes SHA2_224 #(block_word_length SHA2_224));
reveal_opaque (`%shuffle) shuffle;
reveal_opaque (`%update) update
#pop-options
#push-options "--fuel 1"
let update_multi_update (a: md_alg) (h: words_state a) (input: bytes_block a): Lemma
(ensures (Spec.Agile.Hash.update_multi a h () input) == (Spec.Agile.Hash.update a h input))
=
let h1 = Spec.Agile.Hash.update_multi a h () input in
assert(h1 == Lib.UpdateMulti.mk_update_multi (block_length a) (Spec.Agile.Hash.update a) h input);
if S.length input = 0 then
begin
assert(h1 == h)
end
else
begin
let block, rem = Lib.UpdateMulti.split_block (block_length a) input 1 in
let h2 = Spec.Agile.Hash.update a h block in
assert(rem `Seq.equal` Seq.empty);
assert(block `Seq.equal` input);
let h3 = Lib.UpdateMulti.mk_update_multi (block_length a) (Spec.Agile.Hash.update a) h2 rem in
assert(h1 == h3)
end
#pop-options
let rec update_multi_224_256 hash blocks =
let a = SHA2_256 in
let a' = SHA2_224 in
assert_norm (words_state a == words_state a');
if S.length blocks = 0 then
begin
assert(blocks `S.equal` S.empty);
Spec.Hash.Lemmas.update_multi_zero a hash;
Spec.Hash.Lemmas.update_multi_zero a' hash
end
else
begin
assert(block_length a = block_length a');
let block1, blocks_end = S.split blocks (block_length a) in
assert(S.length block1 = block_length a);
assert(S.length blocks_end % block_length a = 0);
assert(S.append block1 blocks_end `S.equal` blocks);
update_multi_associative a hash block1 blocks_end;
update_multi_associative a' hash block1 blocks_end;
update_multi_update a hash block1;
update_multi_update a' hash block1;
let hash1 = Spec.Agile.Hash.update a hash block1 in
let hash2 = Spec.Agile.Hash.update a' hash block1 in
update_224_256 hash block1;
assert(hash1 == hash2);
update_multi_224_256 hash1 blocks_end
end
#push-options "--z3rlimit 50"
let update_last_224_256 hash prevlen input =
let update_multi_224_256 (hash:words_state SHA2_256) (blocks:bytes_blocks SHA2_256):
Lemma
(ensures (Spec.Agile.Hash.update_multi SHA2_256 hash () blocks ==
Spec.Agile.Hash.update_multi SHA2_224 hash () blocks))
(decreases (Seq.length blocks))
[ SMTPat (Spec.Agile.Hash.update_multi SHA2_256 hash () blocks) ]
=
update_multi_224_256 hash blocks
in
()
#push-options "--max_fuel 1 --max_ifuel 1 --z3rlimit 200"
let update_384_512 hash block =
assert_norm (words_state SHA2_384 == words_state SHA2_512);
let rec ws_384_512 (b: block_w SHA2_512) (t:counter{t < size_k_w SHA2_512}):
Lemma
(ensures (ws SHA2_384 b t == ws SHA2_512 b t))
[ SMTPat (ws SHA2_512 b t) ]
=
reveal_opaque (`%ws) ws;
assert_norm (block_w SHA2_512 == block_w SHA2_384);
assert_norm (size_k_w SHA2_512 == size_k_w SHA2_384);
(*
* The code earlier was doing assert_norm (_sigma0 SHA2_512 == _sigma0 SHA2_384)
*
* This is a bit suboptimal, since assert_norm is a heavy hammer,
* it also ends up unfolding `==`, which means the equality is not
* reduced in F*, rather the query for proving equality of two
* lambda terms reaches Z3 -- once that happens we are at the mercy of
* hashconsing etc. to prove the equality
*
* Instead, if we do controlled normalization, we can prove the equality
* within F*
*)
let steps = [iota; primops; simplify; delta_only [
`%_sigma0; `%_sigma1; `%op0; `%word; `%word_t;
`%__proj__Mkops__item__e5; `%op384_512; `%__proj__Mkops__item__e3;
`%__proj__Mkops__item__e4;
`%Spec.SHA2.op_Hat_Dot; `%Spec.SHA2.op_Greater_Greater_Dot;
`%Spec.SHA2.op_Greater_Greater_Greater_Dot ]] in
assert (norm steps (_sigma0 SHA2_512) == norm steps (_sigma0 SHA2_384));
assert (norm steps (_sigma1 SHA2_512) == norm steps (_sigma1 SHA2_384));
norm_spec steps (_sigma0 SHA2_512);
norm_spec steps (_sigma0 SHA2_384);
norm_spec steps (_sigma1 SHA2_512);
norm_spec steps (_sigma1 SHA2_384);
// assert_norm (word_add_mod SHA2_512 == word_add_mod SHA2_384);
if t < block_word_length SHA2_512 then
()
else begin
ws_384_512 b (t - 16);
ws_384_512 b (t - 15);
ws_384_512 b (t - 7);
ws_384_512 b (t - 2)
end
in
let shuffle_core_384_512 (block:block_w SHA2_512) (hash:words_state SHA2_512) (t:counter{t < size_k_w SHA2_512}):
Lemma (ensures (shuffle_core SHA2_384 block hash t == shuffle_core SHA2_512 block hash t))
[ SMTPat (shuffle_core SHA2_512 block hash t) ]
=
reveal_opaque (`%shuffle_core) shuffle_core
in
let rec repeat_range_f (#a:Type) (min:nat) (max:nat{min <= max}) (f g:(a -> i:nat{i < max} -> Tot a)) (x: a):
Lemma
(requires (forall x (i: nat { i < max }). {:pattern f x i \/ g x i } f x i == g x i))
(ensures (Spec.Loops.repeat_range min max f x == Spec.Loops.repeat_range min max g x))
(decreases (max - min))
[ SMTPat (Spec.Loops.repeat_range min max f x); SMTPat (Spec.Loops.repeat_range min max g x) ]
=
if min = max then
()
else
repeat_range_f (min + 1) max f g (f x min)
in
let shuffle_384_512 (hash:words_state SHA2_512) (block:block_w SHA2_512):
Lemma (ensures (shuffle SHA2_384 hash block == shuffle SHA2_512 hash block))
[ SMTPat (shuffle SHA2_512 hash block) ]
=
shuffle_is_shuffle_pre SHA2_384 hash block;
shuffle_is_shuffle_pre SHA2_512 hash block;
reveal_opaque (`%shuffle) shuffle;
assert_norm (words_state SHA2_384 == words_state SHA2_512)
in
let rec seq_map2_f
(#a:Type) (#b:Type) (#c:Type)
(f g:(a -> b -> Tot c))
(s:S.seq a) (s':S.seq b{S.length s = S.length s'}):
Lemma
(requires (forall x y. {:pattern f x y \/ g x y} f x y == g x y))
(ensures (Spec.Loops.(seq_map2 f s s' == seq_map2 g s s')))
(decreases (S.length s))
[ SMTPat (Spec.Loops.seq_map2 f s s'); SMTPat (Spec.Loops.seq_map2 g s s') ]
=
if S.length s = 0 then
()
else
seq_map2_f f g (S.tail s) (S.tail s')
in
assert_norm (words_of_bytes SHA2_512 #(block_word_length SHA2_512) == words_of_bytes SHA2_384 #(block_word_length SHA2_384));
reveal_opaque (`%shuffle) shuffle;
reveal_opaque (`%update) update
#pop-options
let rec update_multi_384_512 hash blocks =
let a = SHA2_512 in
let a' = SHA2_384 in
assert_norm (words_state a == words_state a');
if S.length blocks = 0 then
begin
assert(blocks `S.equal` S.empty);
Spec.Hash.Lemmas.update_multi_zero a hash;
Spec.Hash.Lemmas.update_multi_zero a' hash
end
else
begin
assert(block_length a = block_length a');
let block1, blocks_end = S.split blocks (block_length a) in
assert(S.length block1 = block_length a);
assert(S.length blocks_end % block_length a = 0);
assert(S.append block1 blocks_end `S.equal` blocks);
update_multi_associative a hash block1 blocks_end;
update_multi_associative a' hash block1 blocks_end;
update_multi_update a hash block1;
update_multi_update a' hash block1;
let hash1 = Spec.Agile.Hash.update a hash block1 in
let hash2 = Spec.Agile.Hash.update a' hash block1 in
update_384_512 hash block1;
assert(hash1 == hash2);
update_multi_384_512 hash1 blocks_end
end | false | false | Spec.SHA2.Lemmas.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val update_last_384_512:
hash:words_state SHA2_512 ->
prevlen:Spec.Hash.Incremental.Definitions.prev_length_t SHA2_512 ->
input:bytes{ (Seq.length input + prevlen) `less_than_max_input_length` SHA2_512 /\
Seq.length input <= block_length SHA2_512 } ->
Lemma
(ensures Spec.Hash.Incremental.Definitions.update_last SHA2_512 hash prevlen input ==
Spec.Hash.Incremental.Definitions.update_last SHA2_384 hash prevlen input) | [] | Spec.SHA2.Lemmas.update_last_384_512 | {
"file_name": "specs/lemmas/Spec.SHA2.Lemmas.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
hash: Spec.Hash.Definitions.words_state Spec.Hash.Definitions.SHA2_512 ->
prevlen: Spec.Hash.Incremental.Definitions.prev_length_t Spec.Hash.Definitions.SHA2_512 ->
input:
Spec.Hash.Definitions.bytes
{ Spec.Hash.Definitions.less_than_max_input_length (FStar.Seq.Base.length input + prevlen)
Spec.Hash.Definitions.SHA2_512 /\
FStar.Seq.Base.length input <=
Spec.Hash.Definitions.block_length Spec.Hash.Definitions.SHA2_512 }
-> FStar.Pervasives.Lemma
(ensures
Spec.Hash.Incremental.Definitions.update_last Spec.Hash.Definitions.SHA2_512
hash
prevlen
input ==
Spec.Hash.Incremental.Definitions.update_last Spec.Hash.Definitions.SHA2_384
hash
prevlen
input) | {
"end_col": 4,
"end_line": 447,
"start_col": 44,
"start_line": 437
} |
FStar.Pervasives.Lemma | val update_multi_384_512: hash:words_state SHA2_512 -> blocks:bytes_blocks SHA2_512 ->
Lemma
(ensures (Spec.Agile.Hash.update_multi SHA2_512 hash () blocks ==
Spec.Agile.Hash.update_multi SHA2_384 hash () blocks))
(decreases (Seq.length blocks)) | [
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Seq",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Spec.SHA2.Constants",
"short_module": "C"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let rec update_multi_384_512 hash blocks =
let a = SHA2_512 in
let a' = SHA2_384 in
assert_norm (words_state a == words_state a');
if S.length blocks = 0 then
begin
assert(blocks `S.equal` S.empty);
Spec.Hash.Lemmas.update_multi_zero a hash;
Spec.Hash.Lemmas.update_multi_zero a' hash
end
else
begin
assert(block_length a = block_length a');
let block1, blocks_end = S.split blocks (block_length a) in
assert(S.length block1 = block_length a);
assert(S.length blocks_end % block_length a = 0);
assert(S.append block1 blocks_end `S.equal` blocks);
update_multi_associative a hash block1 blocks_end;
update_multi_associative a' hash block1 blocks_end;
update_multi_update a hash block1;
update_multi_update a' hash block1;
let hash1 = Spec.Agile.Hash.update a hash block1 in
let hash2 = Spec.Agile.Hash.update a' hash block1 in
update_384_512 hash block1;
assert(hash1 == hash2);
update_multi_384_512 hash1 blocks_end
end | val update_multi_384_512: hash:words_state SHA2_512 -> blocks:bytes_blocks SHA2_512 ->
Lemma
(ensures (Spec.Agile.Hash.update_multi SHA2_512 hash () blocks ==
Spec.Agile.Hash.update_multi SHA2_384 hash () blocks))
(decreases (Seq.length blocks))
let rec update_multi_384_512 hash blocks = | false | null | true | let a = SHA2_512 in
let a' = SHA2_384 in
assert_norm (words_state a == words_state a');
if S.length blocks = 0
then
(assert (blocks `S.equal` S.empty);
Spec.Hash.Lemmas.update_multi_zero a hash;
Spec.Hash.Lemmas.update_multi_zero a' hash)
else
(assert (block_length a = block_length a');
let block1, blocks_end = S.split blocks (block_length a) in
assert (S.length block1 = block_length a);
assert (S.length blocks_end % block_length a = 0);
assert ((S.append block1 blocks_end) `S.equal` blocks);
update_multi_associative a hash block1 blocks_end;
update_multi_associative a' hash block1 blocks_end;
update_multi_update a hash block1;
update_multi_update a' hash block1;
let hash1 = Spec.Agile.Hash.update a hash block1 in
let hash2 = Spec.Agile.Hash.update a' hash block1 in
update_384_512 hash block1;
assert (hash1 == hash2);
update_multi_384_512 hash1 blocks_end) | {
"checked_file": "Spec.SHA2.Lemmas.fst.checked",
"dependencies": [
"Spec.SHA2.Constants.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Lemmas.fsti.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fst.checked",
"prims.fst.checked",
"Lib.UpdateMulti.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.LoopCombinators.fsti.checked",
"Lib.IntTypes.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": true,
"source_file": "Spec.SHA2.Lemmas.fst"
} | [
"lemma",
""
] | [
"Spec.Hash.Definitions.words_state",
"Spec.Hash.Definitions.SHA2_512",
"Spec.Hash.Definitions.bytes_blocks",
"Prims.op_Equality",
"Prims.int",
"FStar.Seq.Base.length",
"Lib.IntTypes.uint8",
"Spec.Hash.Lemmas.update_multi_zero",
"Prims.unit",
"Prims._assert",
"FStar.Seq.Base.equal",
"FStar.Seq.Base.empty",
"Prims.bool",
"FStar.Seq.Base.seq",
"Spec.SHA2.Lemmas.update_multi_384_512",
"Prims.eq2",
"Lib.Sequence.seq",
"Spec.Hash.Definitions.word",
"Prims.l_or",
"Prims.nat",
"Spec.Hash.Definitions.state_word_length",
"Spec.SHA2.Lemmas.update_384_512",
"Spec.Agile.Hash.update",
"Spec.SHA2.Lemmas.update_multi_update",
"Spec.Hash.Lemmas.update_multi_associative",
"FStar.Seq.Base.append",
"Prims.b2t",
"Prims.op_Modulus",
"Spec.Hash.Definitions.block_length",
"Prims.op_GreaterThanOrEqual",
"Prims.op_disEquality",
"FStar.Pervasives.Native.tuple2",
"Lib.IntTypes.int_t",
"Lib.IntTypes.U8",
"Lib.IntTypes.SEC",
"FStar.Seq.Properties.split",
"Prims.nonzero",
"FStar.Pervasives.assert_norm",
"Spec.Hash.Definitions.hash_alg",
"Spec.Hash.Definitions.SHA2_384"
] | [] | module Spec.SHA2.Lemmas
open Lib.IntTypes
module C = Spec.SHA2.Constants
module S = FStar.Seq
open Spec.Hash.Definitions
open Spec.SHA2
open Spec.Hash.Lemmas
friend Spec.SHA2
friend Spec.Agile.Hash
#set-options "--z3rlimit 25 --fuel 0 --ifuel 0"
(* Scheduling function *)
(* Recursive Version *)
let rec ws_aux (a:sha2_alg) (b:block_w a) (t:counter{t < size_k_w a}): Tot (word a) =
if t < block_word_length a then b.[t]
else
let t16 = ws_aux a b (t - 16) in
let t15 = ws_aux a b (t - 15) in
let t7 = ws_aux a b (t - 7) in
let t2 = ws_aux a b (t - 2) in
let s1 = _sigma1 a t2 in
let s0 = _sigma0 a t15 in
(s1 +. t7 +. s0 +. t16)
[@"opaque_to_smt"]
let ws = ws_aux
(* Core shuffling function *)
let shuffle_core_ (a:sha2_alg) (block:block_w a) (hash:words_state a) (t:counter{t < size_k_w a}): Tot (words_state a) =
(**) assert(7 <= S.length hash);
let a0 = hash.[0] in
let b0 = hash.[1] in
let c0 = hash.[2] in
let d0 = hash.[3] in
let e0 = hash.[4] in
let f0 = hash.[5] in
let g0 = hash.[6] in
let h0 = hash.[7] in
(**) assert(S.length (k0 a) = size_k_w a);
let t1 = h0 +. (_Sigma1 a e0) +. (_Ch a e0 f0 g0) +. (k0 a).[t] +. (ws a block t) in
let t2 = (_Sigma0 a a0) +. (_Maj a a0 b0 c0) in
(**) assert(t < S.length (k0 a));
let l = [ t1 +. t2; a0; b0; c0; d0 +. t1; e0; f0; g0 ] in
assert_norm (List.Tot.length l = 8);
S.seq_of_list l
[@"opaque_to_smt"]
let shuffle_core = shuffle_core_
(* Full shuffling function *)
let shuffle_aux (a:sha2_alg) (hash:words_state a) (block:block_w a): Tot (words_state a) =
Spec.Loops.repeat_range 0 (size_k_w a) (shuffle_core a block) hash
#push-options "--max_fuel 1 --max_ifuel 0"
val shuffle_is_shuffle_pre: a:sha2_alg -> hash:words_state a -> block:block_w a ->
Lemma (shuffle a hash block == shuffle_aux a hash block)
let shuffle_is_shuffle_pre a hash block =
let rec repeati_is_repeat_range #a (n:nat)
(f:a -> (i:nat{i < n}) -> Tot a)
(f': (i:nat{i < n}) -> a -> Tot a)
(i:nat{i <= n})
(acc0:a)
: Lemma
(requires forall x i. f x i == f' i x)
(ensures Spec.Loops.repeat_range 0 i f acc0 == Lib.LoopCombinators.repeati i f' acc0)
= if i = 0 then (
Lib.LoopCombinators.eq_repeati0 n f' acc0
) else (
Spec.Loops.repeat_range_induction 0 i f acc0;
Lib.LoopCombinators.unfold_repeati n f' acc0 (i-1);
repeati_is_repeat_range n f f' (i-1) acc0
)
in
let rec ws_is_ws_pre (i:nat{i <= size_k_w a}) : Lemma
(ensures forall (j:nat{j < i}).
ws a block j ==
(Lib.LoopCombinators.repeati i
(ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0))).[j]
)
= if i = 0 then ()
else (
ws_is_ws_pre (i - 1);
Lib.LoopCombinators.unfold_repeati (size_k_w a) (ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0)) (i - 1);
let f = ws_pre_inner a block in
let acc0 = Seq.create (size_k_w a) (to_word a 0) in
assert (Lib.LoopCombinators.repeati i f acc0 ==
f (i - 1) (Lib.LoopCombinators.repeati (i-1) f acc0));
reveal_opaque (`%ws) ws
)
in
let ws = ws_pre a block in
let k = k0 a in
let shuffle_core_is_shuffle_core_pre
hash
(i:counter{i < size_k_w a})
: Lemma (shuffle_core a block hash i == shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] hash)
= ws_is_ws_pre (size_k_w a);
reveal_opaque (`%ws_pre) ws_pre;
reveal_opaque (`%shuffle_core) shuffle_core;
reveal_opaque (`%shuffle_core_pre) shuffle_core_pre
in
Classical.forall_intro_2 shuffle_core_is_shuffle_core_pre;
repeati_is_repeat_range (size_k_w a) (shuffle_core a block) (fun i h -> shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] h) (size_k_w a) hash;
assert (shuffle_pre a hash block == shuffle_aux a hash block);
reveal_opaque (`%shuffle) shuffle
#pop-options
(* Compression function *)
let update_aux (a:sha2_alg) (hash:words_state a) (block:bytes{S.length block = block_length a}): Tot (words_state a) =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle_aux a hash block_w in
Lib.Sequence.map2 ( +. ) (hash <: Lib.Sequence.lseq (word a) (state_word_length a)) hash_1
val update_is_update_pre: a:sha2_alg -> hash:words_state a -> block:bytes{S.length block = block_length a} ->
Lemma (update a hash block == update_aux a hash block)
let update_is_update_pre a hash block =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle a hash block_w in
shuffle_is_shuffle_pre a hash block_w;
let hash:Lib.Sequence.lseq (word a) (state_word_length a) = hash in
reveal_opaque (`%update) update;
let s1 = Lib.Sequence.map2 (+.) hash hash_1 in
let s2 = Spec.Loops.seq_map2 (+.) hash hash_1 in
assert (Seq.length s1 == Seq.length s2);
let aux (i:nat{i < Seq.length s1}) : Lemma (Seq.index s1 i == Seq.index s2 i)
=
// Need Lib.Sequence.index in the context for map2's postcondition to trigger
assert (Lib.Sequence.index s1 i == ( +. ) (Seq.index hash i) (Seq.index hash_1 i))
in Classical.forall_intro aux;
assert (s1 `Seq.equal` s2)
#push-options "--max_fuel 1 --max_ifuel 1 --z3rlimit 200"
let update_224_256 hash block =
assert_norm (words_state SHA2_224 == words_state SHA2_256);
let rec ws_224_256 (b: block_w SHA2_256) (t:counter{t < size_k_w SHA2_256}):
Lemma
(ensures (ws SHA2_224 b t == ws SHA2_256 b t))
[ SMTPat (ws SHA2_256 b t) ]
=
reveal_opaque (`%ws) ws;
assert_norm (block_w SHA2_256 == block_w SHA2_224);
assert_norm (size_k_w SHA2_256 == size_k_w SHA2_224);
(*
* The code earlier was doing assert_norm (_sigma0 SHA2_256 == _sigma0 SHA2_224)
*
* This is a bit suboptimal, since assert_norm is a heavy hammer,
* it also ends up unfolding `==`, which means the equality is not
* reduced in F*, rather the query for proving equality of two
* lambda terms reaches Z3 -- once that happens we are at the mercy of
* hashconsing etc. to prove the equality
*
* Instead, if we do controlled normalization, we can prove the equality
* within F*
*)
let steps = [iota; primops; simplify; delta_only [
`%_sigma0; `%_sigma1; `%op0; `%word; `%word_t;
`%__proj__Mkops__item__e5; `%op224_256; `%__proj__Mkops__item__e3;
`%__proj__Mkops__item__e4;
`%Spec.SHA2.op_Hat_Dot; `%Spec.SHA2.op_Greater_Greater_Dot;
`%Spec.SHA2.op_Greater_Greater_Greater_Dot ]] in
assert (norm steps (_sigma0 SHA2_256) == norm steps (_sigma0 SHA2_224));
assert (norm steps (_sigma1 SHA2_256) == norm steps (_sigma1 SHA2_224));
norm_spec steps (_sigma0 SHA2_256);
norm_spec steps (_sigma0 SHA2_224);
norm_spec steps (_sigma1 SHA2_256);
norm_spec steps (_sigma1 SHA2_224);
// assert_norm (word_add_mod SHA2_256 == word_add_mod SHA2_224);
if t < block_word_length SHA2_256 then
()
else begin
ws_224_256 b (t - 16);
ws_224_256 b (t - 15);
ws_224_256 b (t - 7);
ws_224_256 b (t - 2)
end
in
let shuffle_core_224_256 (block:block_w SHA2_256) (hash:words_state SHA2_256) (t:counter{t < size_k_w SHA2_256}):
Lemma (ensures (shuffle_core SHA2_224 block hash t == shuffle_core SHA2_256 block hash t))
[ SMTPat (shuffle_core SHA2_256 block hash t) ]
=
reveal_opaque (`%shuffle_core) shuffle_core
in
let rec repeat_range_f (#a:Type) (min:nat) (max:nat{min <= max}) (f g:(a -> i:nat{i < max} -> Tot a)) (x: a):
Lemma
(requires (forall x (i: nat { i < max }). {:pattern f x i \/ g x i } f x i == g x i))
(ensures (Spec.Loops.repeat_range min max f x == Spec.Loops.repeat_range min max g x))
(decreases (max - min))
[ SMTPat (Spec.Loops.repeat_range min max f x); SMTPat (Spec.Loops.repeat_range min max g x) ]
=
if min = max then
()
else
repeat_range_f (min + 1) max f g (f x min)
in
let shuffle_224_256 (hash:words_state SHA2_256) (block:block_w SHA2_256):
Lemma (ensures (shuffle SHA2_224 hash block == shuffle SHA2_256 hash block))
[ SMTPat (shuffle SHA2_256 hash block) ]
=
shuffle_is_shuffle_pre SHA2_224 hash block;
shuffle_is_shuffle_pre SHA2_256 hash block;
reveal_opaque (`%shuffle) shuffle;
assert_norm (words_state SHA2_224 == words_state SHA2_256)
in
let rec seq_map2_f
(#a:Type) (#b:Type) (#c:Type)
(f g:(a -> b -> Tot c))
(s:S.seq a) (s':S.seq b{S.length s = S.length s'}):
Lemma
(requires (forall x y. {:pattern f x y \/ g x y} f x y == g x y))
(ensures (Spec.Loops.(seq_map2 f s s' == seq_map2 g s s')))
(decreases (S.length s))
[ SMTPat (Spec.Loops.seq_map2 f s s'); SMTPat (Spec.Loops.seq_map2 g s s') ]
=
if S.length s = 0 then
()
else
seq_map2_f f g (S.tail s) (S.tail s')
in
assert_norm (words_of_bytes SHA2_256 #(block_word_length SHA2_256) == words_of_bytes SHA2_224 #(block_word_length SHA2_224));
reveal_opaque (`%shuffle) shuffle;
reveal_opaque (`%update) update
#pop-options
#push-options "--fuel 1"
let update_multi_update (a: md_alg) (h: words_state a) (input: bytes_block a): Lemma
(ensures (Spec.Agile.Hash.update_multi a h () input) == (Spec.Agile.Hash.update a h input))
=
let h1 = Spec.Agile.Hash.update_multi a h () input in
assert(h1 == Lib.UpdateMulti.mk_update_multi (block_length a) (Spec.Agile.Hash.update a) h input);
if S.length input = 0 then
begin
assert(h1 == h)
end
else
begin
let block, rem = Lib.UpdateMulti.split_block (block_length a) input 1 in
let h2 = Spec.Agile.Hash.update a h block in
assert(rem `Seq.equal` Seq.empty);
assert(block `Seq.equal` input);
let h3 = Lib.UpdateMulti.mk_update_multi (block_length a) (Spec.Agile.Hash.update a) h2 rem in
assert(h1 == h3)
end
#pop-options
let rec update_multi_224_256 hash blocks =
let a = SHA2_256 in
let a' = SHA2_224 in
assert_norm (words_state a == words_state a');
if S.length blocks = 0 then
begin
assert(blocks `S.equal` S.empty);
Spec.Hash.Lemmas.update_multi_zero a hash;
Spec.Hash.Lemmas.update_multi_zero a' hash
end
else
begin
assert(block_length a = block_length a');
let block1, blocks_end = S.split blocks (block_length a) in
assert(S.length block1 = block_length a);
assert(S.length blocks_end % block_length a = 0);
assert(S.append block1 blocks_end `S.equal` blocks);
update_multi_associative a hash block1 blocks_end;
update_multi_associative a' hash block1 blocks_end;
update_multi_update a hash block1;
update_multi_update a' hash block1;
let hash1 = Spec.Agile.Hash.update a hash block1 in
let hash2 = Spec.Agile.Hash.update a' hash block1 in
update_224_256 hash block1;
assert(hash1 == hash2);
update_multi_224_256 hash1 blocks_end
end
#push-options "--z3rlimit 50"
let update_last_224_256 hash prevlen input =
let update_multi_224_256 (hash:words_state SHA2_256) (blocks:bytes_blocks SHA2_256):
Lemma
(ensures (Spec.Agile.Hash.update_multi SHA2_256 hash () blocks ==
Spec.Agile.Hash.update_multi SHA2_224 hash () blocks))
(decreases (Seq.length blocks))
[ SMTPat (Spec.Agile.Hash.update_multi SHA2_256 hash () blocks) ]
=
update_multi_224_256 hash blocks
in
()
#push-options "--max_fuel 1 --max_ifuel 1 --z3rlimit 200"
let update_384_512 hash block =
assert_norm (words_state SHA2_384 == words_state SHA2_512);
let rec ws_384_512 (b: block_w SHA2_512) (t:counter{t < size_k_w SHA2_512}):
Lemma
(ensures (ws SHA2_384 b t == ws SHA2_512 b t))
[ SMTPat (ws SHA2_512 b t) ]
=
reveal_opaque (`%ws) ws;
assert_norm (block_w SHA2_512 == block_w SHA2_384);
assert_norm (size_k_w SHA2_512 == size_k_w SHA2_384);
(*
* The code earlier was doing assert_norm (_sigma0 SHA2_512 == _sigma0 SHA2_384)
*
* This is a bit suboptimal, since assert_norm is a heavy hammer,
* it also ends up unfolding `==`, which means the equality is not
* reduced in F*, rather the query for proving equality of two
* lambda terms reaches Z3 -- once that happens we are at the mercy of
* hashconsing etc. to prove the equality
*
* Instead, if we do controlled normalization, we can prove the equality
* within F*
*)
let steps = [iota; primops; simplify; delta_only [
`%_sigma0; `%_sigma1; `%op0; `%word; `%word_t;
`%__proj__Mkops__item__e5; `%op384_512; `%__proj__Mkops__item__e3;
`%__proj__Mkops__item__e4;
`%Spec.SHA2.op_Hat_Dot; `%Spec.SHA2.op_Greater_Greater_Dot;
`%Spec.SHA2.op_Greater_Greater_Greater_Dot ]] in
assert (norm steps (_sigma0 SHA2_512) == norm steps (_sigma0 SHA2_384));
assert (norm steps (_sigma1 SHA2_512) == norm steps (_sigma1 SHA2_384));
norm_spec steps (_sigma0 SHA2_512);
norm_spec steps (_sigma0 SHA2_384);
norm_spec steps (_sigma1 SHA2_512);
norm_spec steps (_sigma1 SHA2_384);
// assert_norm (word_add_mod SHA2_512 == word_add_mod SHA2_384);
if t < block_word_length SHA2_512 then
()
else begin
ws_384_512 b (t - 16);
ws_384_512 b (t - 15);
ws_384_512 b (t - 7);
ws_384_512 b (t - 2)
end
in
let shuffle_core_384_512 (block:block_w SHA2_512) (hash:words_state SHA2_512) (t:counter{t < size_k_w SHA2_512}):
Lemma (ensures (shuffle_core SHA2_384 block hash t == shuffle_core SHA2_512 block hash t))
[ SMTPat (shuffle_core SHA2_512 block hash t) ]
=
reveal_opaque (`%shuffle_core) shuffle_core
in
let rec repeat_range_f (#a:Type) (min:nat) (max:nat{min <= max}) (f g:(a -> i:nat{i < max} -> Tot a)) (x: a):
Lemma
(requires (forall x (i: nat { i < max }). {:pattern f x i \/ g x i } f x i == g x i))
(ensures (Spec.Loops.repeat_range min max f x == Spec.Loops.repeat_range min max g x))
(decreases (max - min))
[ SMTPat (Spec.Loops.repeat_range min max f x); SMTPat (Spec.Loops.repeat_range min max g x) ]
=
if min = max then
()
else
repeat_range_f (min + 1) max f g (f x min)
in
let shuffle_384_512 (hash:words_state SHA2_512) (block:block_w SHA2_512):
Lemma (ensures (shuffle SHA2_384 hash block == shuffle SHA2_512 hash block))
[ SMTPat (shuffle SHA2_512 hash block) ]
=
shuffle_is_shuffle_pre SHA2_384 hash block;
shuffle_is_shuffle_pre SHA2_512 hash block;
reveal_opaque (`%shuffle) shuffle;
assert_norm (words_state SHA2_384 == words_state SHA2_512)
in
let rec seq_map2_f
(#a:Type) (#b:Type) (#c:Type)
(f g:(a -> b -> Tot c))
(s:S.seq a) (s':S.seq b{S.length s = S.length s'}):
Lemma
(requires (forall x y. {:pattern f x y \/ g x y} f x y == g x y))
(ensures (Spec.Loops.(seq_map2 f s s' == seq_map2 g s s')))
(decreases (S.length s))
[ SMTPat (Spec.Loops.seq_map2 f s s'); SMTPat (Spec.Loops.seq_map2 g s s') ]
=
if S.length s = 0 then
()
else
seq_map2_f f g (S.tail s) (S.tail s')
in
assert_norm (words_of_bytes SHA2_512 #(block_word_length SHA2_512) == words_of_bytes SHA2_384 #(block_word_length SHA2_384));
reveal_opaque (`%shuffle) shuffle;
reveal_opaque (`%update) update
#pop-options | false | false | Spec.SHA2.Lemmas.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val update_multi_384_512: hash:words_state SHA2_512 -> blocks:bytes_blocks SHA2_512 ->
Lemma
(ensures (Spec.Agile.Hash.update_multi SHA2_512 hash () blocks ==
Spec.Agile.Hash.update_multi SHA2_384 hash () blocks))
(decreases (Seq.length blocks)) | [
"recursion"
] | Spec.SHA2.Lemmas.update_multi_384_512 | {
"file_name": "specs/lemmas/Spec.SHA2.Lemmas.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
hash: Spec.Hash.Definitions.words_state Spec.Hash.Definitions.SHA2_512 ->
blocks: Spec.Hash.Definitions.bytes_blocks Spec.Hash.Definitions.SHA2_512
-> FStar.Pervasives.Lemma
(ensures
Spec.Agile.Hash.update_multi Spec.Hash.Definitions.SHA2_512 hash () blocks ==
Spec.Agile.Hash.update_multi Spec.Hash.Definitions.SHA2_384 hash () blocks)
(decreases FStar.Seq.Base.length blocks) | {
"end_col": 7,
"end_line": 434,
"start_col": 42,
"start_line": 408
} |
FStar.Pervasives.Lemma | val shuffle_is_shuffle_pre: a:sha2_alg -> hash:words_state a -> block:block_w a ->
Lemma (shuffle a hash block == shuffle_aux a hash block) | [
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Seq",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Spec.SHA2.Constants",
"short_module": "C"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let shuffle_is_shuffle_pre a hash block =
let rec repeati_is_repeat_range #a (n:nat)
(f:a -> (i:nat{i < n}) -> Tot a)
(f': (i:nat{i < n}) -> a -> Tot a)
(i:nat{i <= n})
(acc0:a)
: Lemma
(requires forall x i. f x i == f' i x)
(ensures Spec.Loops.repeat_range 0 i f acc0 == Lib.LoopCombinators.repeati i f' acc0)
= if i = 0 then (
Lib.LoopCombinators.eq_repeati0 n f' acc0
) else (
Spec.Loops.repeat_range_induction 0 i f acc0;
Lib.LoopCombinators.unfold_repeati n f' acc0 (i-1);
repeati_is_repeat_range n f f' (i-1) acc0
)
in
let rec ws_is_ws_pre (i:nat{i <= size_k_w a}) : Lemma
(ensures forall (j:nat{j < i}).
ws a block j ==
(Lib.LoopCombinators.repeati i
(ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0))).[j]
)
= if i = 0 then ()
else (
ws_is_ws_pre (i - 1);
Lib.LoopCombinators.unfold_repeati (size_k_w a) (ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0)) (i - 1);
let f = ws_pre_inner a block in
let acc0 = Seq.create (size_k_w a) (to_word a 0) in
assert (Lib.LoopCombinators.repeati i f acc0 ==
f (i - 1) (Lib.LoopCombinators.repeati (i-1) f acc0));
reveal_opaque (`%ws) ws
)
in
let ws = ws_pre a block in
let k = k0 a in
let shuffle_core_is_shuffle_core_pre
hash
(i:counter{i < size_k_w a})
: Lemma (shuffle_core a block hash i == shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] hash)
= ws_is_ws_pre (size_k_w a);
reveal_opaque (`%ws_pre) ws_pre;
reveal_opaque (`%shuffle_core) shuffle_core;
reveal_opaque (`%shuffle_core_pre) shuffle_core_pre
in
Classical.forall_intro_2 shuffle_core_is_shuffle_core_pre;
repeati_is_repeat_range (size_k_w a) (shuffle_core a block) (fun i h -> shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] h) (size_k_w a) hash;
assert (shuffle_pre a hash block == shuffle_aux a hash block);
reveal_opaque (`%shuffle) shuffle | val shuffle_is_shuffle_pre: a:sha2_alg -> hash:words_state a -> block:block_w a ->
Lemma (shuffle a hash block == shuffle_aux a hash block)
let shuffle_is_shuffle_pre a hash block = | false | null | true | let rec repeati_is_repeat_range
#a
(n: nat)
(f: (a -> i: nat{i < n} -> Tot a))
(f': (i: nat{i < n} -> a -> Tot a))
(i: nat{i <= n})
(acc0: a)
: Lemma (requires forall x i. f x i == f' i x)
(ensures Spec.Loops.repeat_range 0 i f acc0 == Lib.LoopCombinators.repeati i f' acc0) =
if i = 0
then (Lib.LoopCombinators.eq_repeati0 n f' acc0)
else
(Spec.Loops.repeat_range_induction 0 i f acc0;
Lib.LoopCombinators.unfold_repeati n f' acc0 (i - 1);
repeati_is_repeat_range n f f' (i - 1) acc0)
in
let rec ws_is_ws_pre (i: nat{i <= size_k_w a})
: Lemma
(ensures
forall (j: nat{j < i}).
ws a block j ==
(Lib.LoopCombinators.repeati i
(ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0))).[ j ]) =
if i = 0
then ()
else
(ws_is_ws_pre (i - 1);
Lib.LoopCombinators.unfold_repeati (size_k_w a)
(ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0))
(i - 1);
let f = ws_pre_inner a block in
let acc0 = Seq.create (size_k_w a) (to_word a 0) in
assert (Lib.LoopCombinators.repeati i f acc0 ==
f (i - 1) (Lib.LoopCombinators.repeati (i - 1) f acc0));
reveal_opaque (`%ws) ws)
in
let ws = ws_pre a block in
let k = k0 a in
let shuffle_core_is_shuffle_core_pre hash (i: counter{i < size_k_w a})
: Lemma
(shuffle_core a block hash i == shuffle_core_pre a (k0 a).[ i ] (ws_pre a block).[ i ] hash) =
ws_is_ws_pre (size_k_w a);
reveal_opaque (`%ws_pre) ws_pre;
reveal_opaque (`%shuffle_core) shuffle_core;
reveal_opaque (`%shuffle_core_pre) shuffle_core_pre
in
Classical.forall_intro_2 shuffle_core_is_shuffle_core_pre;
repeati_is_repeat_range (size_k_w a)
(shuffle_core a block)
(fun i h -> shuffle_core_pre a (k0 a).[ i ] (ws_pre a block).[ i ] h)
(size_k_w a)
hash;
assert (shuffle_pre a hash block == shuffle_aux a hash block);
reveal_opaque (`%shuffle) shuffle | {
"checked_file": "Spec.SHA2.Lemmas.fst.checked",
"dependencies": [
"Spec.SHA2.Constants.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Lemmas.fsti.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fst.checked",
"prims.fst.checked",
"Lib.UpdateMulti.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.LoopCombinators.fsti.checked",
"Lib.IntTypes.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": true,
"source_file": "Spec.SHA2.Lemmas.fst"
} | [
"lemma"
] | [
"Spec.Hash.Definitions.sha2_alg",
"Spec.Hash.Definitions.words_state",
"Spec.SHA2.block_w",
"FStar.Pervasives.reveal_opaque",
"Spec.SHA2.shuffle",
"Prims.unit",
"Prims._assert",
"Prims.eq2",
"Spec.SHA2.shuffle_pre",
"Spec.SHA2.Lemmas.shuffle_aux",
"Spec.SHA2.size_k_w",
"Spec.SHA2.Lemmas.shuffle_core",
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThan",
"Spec.SHA2.shuffle_core_pre",
"Spec.SHA2.op_String_Access",
"Spec.Hash.Definitions.word",
"Spec.SHA2.k0",
"Spec.SHA2.ws_pre",
"FStar.Classical.forall_intro_2",
"Spec.SHA2.counter",
"Prims.l_True",
"Prims.squash",
"FStar.Seq.Base.index",
"Prims.Nil",
"FStar.Pervasives.pattern",
"Spec.SHA2.k_w",
"FStar.Seq.Base.seq",
"Prims.op_Equality",
"FStar.Seq.Base.length",
"Prims.op_LessThanOrEqual",
"Prims.l_Forall",
"Spec.SHA2.Lemmas.ws",
"Lib.LoopCombinators.repeati",
"Spec.SHA2.ws_pre_inner",
"FStar.Seq.Base.create",
"Spec.SHA2.to_word",
"Prims.int",
"Prims.bool",
"Prims.op_Subtraction",
"Lib.LoopCombinators.unfold_repeati",
"Prims.l_and",
"Spec.Loops.repeat_range",
"Lib.LoopCombinators.eq_repeati0",
"Spec.Loops.repeat_range_induction"
] | [] | module Spec.SHA2.Lemmas
open Lib.IntTypes
module C = Spec.SHA2.Constants
module S = FStar.Seq
open Spec.Hash.Definitions
open Spec.SHA2
open Spec.Hash.Lemmas
friend Spec.SHA2
friend Spec.Agile.Hash
#set-options "--z3rlimit 25 --fuel 0 --ifuel 0"
(* Scheduling function *)
(* Recursive Version *)
let rec ws_aux (a:sha2_alg) (b:block_w a) (t:counter{t < size_k_w a}): Tot (word a) =
if t < block_word_length a then b.[t]
else
let t16 = ws_aux a b (t - 16) in
let t15 = ws_aux a b (t - 15) in
let t7 = ws_aux a b (t - 7) in
let t2 = ws_aux a b (t - 2) in
let s1 = _sigma1 a t2 in
let s0 = _sigma0 a t15 in
(s1 +. t7 +. s0 +. t16)
[@"opaque_to_smt"]
let ws = ws_aux
(* Core shuffling function *)
let shuffle_core_ (a:sha2_alg) (block:block_w a) (hash:words_state a) (t:counter{t < size_k_w a}): Tot (words_state a) =
(**) assert(7 <= S.length hash);
let a0 = hash.[0] in
let b0 = hash.[1] in
let c0 = hash.[2] in
let d0 = hash.[3] in
let e0 = hash.[4] in
let f0 = hash.[5] in
let g0 = hash.[6] in
let h0 = hash.[7] in
(**) assert(S.length (k0 a) = size_k_w a);
let t1 = h0 +. (_Sigma1 a e0) +. (_Ch a e0 f0 g0) +. (k0 a).[t] +. (ws a block t) in
let t2 = (_Sigma0 a a0) +. (_Maj a a0 b0 c0) in
(**) assert(t < S.length (k0 a));
let l = [ t1 +. t2; a0; b0; c0; d0 +. t1; e0; f0; g0 ] in
assert_norm (List.Tot.length l = 8);
S.seq_of_list l
[@"opaque_to_smt"]
let shuffle_core = shuffle_core_
(* Full shuffling function *)
let shuffle_aux (a:sha2_alg) (hash:words_state a) (block:block_w a): Tot (words_state a) =
Spec.Loops.repeat_range 0 (size_k_w a) (shuffle_core a block) hash
#push-options "--max_fuel 1 --max_ifuel 0"
val shuffle_is_shuffle_pre: a:sha2_alg -> hash:words_state a -> block:block_w a -> | false | false | Spec.SHA2.Lemmas.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 25,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val shuffle_is_shuffle_pre: a:sha2_alg -> hash:words_state a -> block:block_w a ->
Lemma (shuffle a hash block == shuffle_aux a hash block) | [] | Spec.SHA2.Lemmas.shuffle_is_shuffle_pre | {
"file_name": "specs/lemmas/Spec.SHA2.Lemmas.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
a: Spec.Hash.Definitions.sha2_alg ->
hash: Spec.Hash.Definitions.words_state a ->
block: Spec.SHA2.block_w a
-> FStar.Pervasives.Lemma
(ensures Spec.SHA2.shuffle a hash block == Spec.SHA2.Lemmas.shuffle_aux a hash block) | {
"end_col": 35,
"end_line": 120,
"start_col": 41,
"start_line": 66
} |
FStar.Pervasives.Lemma | val update_384_512: st:words_state SHA2_512 ->
block:bytes{Seq.length block = block_length SHA2_512} ->
Lemma
(ensures (Spec.Agile.Hash.(update SHA2_512 st block == update SHA2_384 st block))) | [
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Seq",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Spec.SHA2.Constants",
"short_module": "C"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let update_384_512 hash block =
assert_norm (words_state SHA2_384 == words_state SHA2_512);
let rec ws_384_512 (b: block_w SHA2_512) (t:counter{t < size_k_w SHA2_512}):
Lemma
(ensures (ws SHA2_384 b t == ws SHA2_512 b t))
[ SMTPat (ws SHA2_512 b t) ]
=
reveal_opaque (`%ws) ws;
assert_norm (block_w SHA2_512 == block_w SHA2_384);
assert_norm (size_k_w SHA2_512 == size_k_w SHA2_384);
(*
* The code earlier was doing assert_norm (_sigma0 SHA2_512 == _sigma0 SHA2_384)
*
* This is a bit suboptimal, since assert_norm is a heavy hammer,
* it also ends up unfolding `==`, which means the equality is not
* reduced in F*, rather the query for proving equality of two
* lambda terms reaches Z3 -- once that happens we are at the mercy of
* hashconsing etc. to prove the equality
*
* Instead, if we do controlled normalization, we can prove the equality
* within F*
*)
let steps = [iota; primops; simplify; delta_only [
`%_sigma0; `%_sigma1; `%op0; `%word; `%word_t;
`%__proj__Mkops__item__e5; `%op384_512; `%__proj__Mkops__item__e3;
`%__proj__Mkops__item__e4;
`%Spec.SHA2.op_Hat_Dot; `%Spec.SHA2.op_Greater_Greater_Dot;
`%Spec.SHA2.op_Greater_Greater_Greater_Dot ]] in
assert (norm steps (_sigma0 SHA2_512) == norm steps (_sigma0 SHA2_384));
assert (norm steps (_sigma1 SHA2_512) == norm steps (_sigma1 SHA2_384));
norm_spec steps (_sigma0 SHA2_512);
norm_spec steps (_sigma0 SHA2_384);
norm_spec steps (_sigma1 SHA2_512);
norm_spec steps (_sigma1 SHA2_384);
// assert_norm (word_add_mod SHA2_512 == word_add_mod SHA2_384);
if t < block_word_length SHA2_512 then
()
else begin
ws_384_512 b (t - 16);
ws_384_512 b (t - 15);
ws_384_512 b (t - 7);
ws_384_512 b (t - 2)
end
in
let shuffle_core_384_512 (block:block_w SHA2_512) (hash:words_state SHA2_512) (t:counter{t < size_k_w SHA2_512}):
Lemma (ensures (shuffle_core SHA2_384 block hash t == shuffle_core SHA2_512 block hash t))
[ SMTPat (shuffle_core SHA2_512 block hash t) ]
=
reveal_opaque (`%shuffle_core) shuffle_core
in
let rec repeat_range_f (#a:Type) (min:nat) (max:nat{min <= max}) (f g:(a -> i:nat{i < max} -> Tot a)) (x: a):
Lemma
(requires (forall x (i: nat { i < max }). {:pattern f x i \/ g x i } f x i == g x i))
(ensures (Spec.Loops.repeat_range min max f x == Spec.Loops.repeat_range min max g x))
(decreases (max - min))
[ SMTPat (Spec.Loops.repeat_range min max f x); SMTPat (Spec.Loops.repeat_range min max g x) ]
=
if min = max then
()
else
repeat_range_f (min + 1) max f g (f x min)
in
let shuffle_384_512 (hash:words_state SHA2_512) (block:block_w SHA2_512):
Lemma (ensures (shuffle SHA2_384 hash block == shuffle SHA2_512 hash block))
[ SMTPat (shuffle SHA2_512 hash block) ]
=
shuffle_is_shuffle_pre SHA2_384 hash block;
shuffle_is_shuffle_pre SHA2_512 hash block;
reveal_opaque (`%shuffle) shuffle;
assert_norm (words_state SHA2_384 == words_state SHA2_512)
in
let rec seq_map2_f
(#a:Type) (#b:Type) (#c:Type)
(f g:(a -> b -> Tot c))
(s:S.seq a) (s':S.seq b{S.length s = S.length s'}):
Lemma
(requires (forall x y. {:pattern f x y \/ g x y} f x y == g x y))
(ensures (Spec.Loops.(seq_map2 f s s' == seq_map2 g s s')))
(decreases (S.length s))
[ SMTPat (Spec.Loops.seq_map2 f s s'); SMTPat (Spec.Loops.seq_map2 g s s') ]
=
if S.length s = 0 then
()
else
seq_map2_f f g (S.tail s) (S.tail s')
in
assert_norm (words_of_bytes SHA2_512 #(block_word_length SHA2_512) == words_of_bytes SHA2_384 #(block_word_length SHA2_384));
reveal_opaque (`%shuffle) shuffle;
reveal_opaque (`%update) update | val update_384_512: st:words_state SHA2_512 ->
block:bytes{Seq.length block = block_length SHA2_512} ->
Lemma
(ensures (Spec.Agile.Hash.(update SHA2_512 st block == update SHA2_384 st block)))
let update_384_512 hash block = | false | null | true | assert_norm (words_state SHA2_384 == words_state SHA2_512);
let rec ws_384_512 (b: block_w SHA2_512) (t: counter{t < size_k_w SHA2_512})
: Lemma (ensures (ws SHA2_384 b t == ws SHA2_512 b t)) [SMTPat (ws SHA2_512 b t)] =
reveal_opaque (`%ws) ws;
assert_norm (block_w SHA2_512 == block_w SHA2_384);
assert_norm (size_k_w SHA2_512 == size_k_w SHA2_384);
let steps =
[
iota;
primops;
simplify;
delta_only [
`%_sigma0; `%_sigma1; `%op0; `%word; `%word_t; `%__proj__Mkops__item__e5; `%op384_512;
`%__proj__Mkops__item__e3; `%__proj__Mkops__item__e4; `%Spec.SHA2.op_Hat_Dot;
`%Spec.SHA2.op_Greater_Greater_Dot; `%Spec.SHA2.op_Greater_Greater_Greater_Dot
]
]
in
assert (norm steps (_sigma0 SHA2_512) == norm steps (_sigma0 SHA2_384));
assert (norm steps (_sigma1 SHA2_512) == norm steps (_sigma1 SHA2_384));
norm_spec steps (_sigma0 SHA2_512);
norm_spec steps (_sigma0 SHA2_384);
norm_spec steps (_sigma1 SHA2_512);
norm_spec steps (_sigma1 SHA2_384);
if t < block_word_length SHA2_512
then ()
else
(ws_384_512 b (t - 16);
ws_384_512 b (t - 15);
ws_384_512 b (t - 7);
ws_384_512 b (t - 2))
in
let shuffle_core_384_512
(block: block_w SHA2_512)
(hash: words_state SHA2_512)
(t: counter{t < size_k_w SHA2_512})
: Lemma (ensures (shuffle_core SHA2_384 block hash t == shuffle_core SHA2_512 block hash t))
[SMTPat (shuffle_core SHA2_512 block hash t)] =
reveal_opaque (`%shuffle_core) shuffle_core
in
let rec repeat_range_f
(#a: Type)
(min: nat)
(max: nat{min <= max})
(f g: (a -> i: nat{i < max} -> Tot a))
(x: a)
: Lemma (requires (forall x (i: nat{i < max}). {:pattern f x i\/g x i} f x i == g x i))
(ensures (Spec.Loops.repeat_range min max f x == Spec.Loops.repeat_range min max g x))
(decreases (max - min))
[SMTPat (Spec.Loops.repeat_range min max f x); SMTPat (Spec.Loops.repeat_range min max g x)] =
if min = max then () else repeat_range_f (min + 1) max f g (f x min)
in
let shuffle_384_512 (hash: words_state SHA2_512) (block: block_w SHA2_512)
: Lemma (ensures (shuffle SHA2_384 hash block == shuffle SHA2_512 hash block))
[SMTPat (shuffle SHA2_512 hash block)] =
shuffle_is_shuffle_pre SHA2_384 hash block;
shuffle_is_shuffle_pre SHA2_512 hash block;
reveal_opaque (`%shuffle) shuffle;
assert_norm (words_state SHA2_384 == words_state SHA2_512)
in
let rec seq_map2_f
(#a #b #c: Type)
(f g: (a -> b -> Tot c))
(s: S.seq a)
(s': S.seq b {S.length s = S.length s'})
: Lemma (requires (forall x y. {:pattern f x y\/g x y} f x y == g x y))
(ensures (let open Spec.Loops in seq_map2 f s s' == seq_map2 g s s'))
(decreases (S.length s))
[SMTPat (Spec.Loops.seq_map2 f s s'); SMTPat (Spec.Loops.seq_map2 g s s')] =
if S.length s = 0 then () else seq_map2_f f g (S.tail s) (S.tail s')
in
assert_norm (words_of_bytes SHA2_512 #(block_word_length SHA2_512) ==
words_of_bytes SHA2_384 #(block_word_length SHA2_384));
reveal_opaque (`%shuffle) shuffle;
reveal_opaque (`%update) update | {
"checked_file": "Spec.SHA2.Lemmas.fst.checked",
"dependencies": [
"Spec.SHA2.Constants.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Lemmas.fsti.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fst.checked",
"prims.fst.checked",
"Lib.UpdateMulti.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.LoopCombinators.fsti.checked",
"Lib.IntTypes.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": true,
"source_file": "Spec.SHA2.Lemmas.fst"
} | [
"lemma"
] | [
"Spec.Hash.Definitions.words_state",
"Spec.Hash.Definitions.SHA2_512",
"Spec.Hash.Definitions.bytes",
"Prims.b2t",
"Prims.op_Equality",
"Prims.int",
"Prims.l_or",
"Prims.op_GreaterThanOrEqual",
"Prims.op_disEquality",
"FStar.Seq.Base.length",
"Lib.IntTypes.uint8",
"Spec.Hash.Definitions.block_length",
"FStar.Pervasives.reveal_opaque",
"Spec.Hash.Definitions.sha2_alg",
"Spec.Hash.Definitions.update_t",
"Spec.SHA2.update",
"Prims.unit",
"Spec.SHA2.block_w",
"Spec.SHA2.shuffle",
"FStar.Pervasives.assert_norm",
"Prims.eq2",
"Lib.Sequence.lseq",
"Lib.IntTypes.int_t",
"Lib.IntTypes.U8",
"Lib.IntTypes.SEC",
"Prims.op_Multiply",
"Spec.Hash.Definitions.word_length",
"Spec.Hash.Definitions.SHA2_384",
"Spec.Hash.Definitions.block_word_length",
"Spec.Hash.Definitions.word",
"Spec.Hash.Definitions.words_of_bytes",
"FStar.Seq.Base.seq",
"Prims.nat",
"Prims.l_Forall",
"Prims.squash",
"Prims.l_and",
"Prims.l_imp",
"Prims.op_LessThan",
"FStar.Seq.Base.index",
"Spec.Loops.seq_map2",
"Prims.Cons",
"FStar.Pervasives.pattern",
"FStar.Pervasives.smt_pat",
"Prims.Nil",
"Prims.bool",
"FStar.Seq.Properties.tail",
"Prims.l_True",
"Lib.Sequence.seq",
"Spec.Hash.Definitions.state_word_length",
"Spec.SHA2.Lemmas.shuffle_is_shuffle_pre",
"Prims.op_LessThanOrEqual",
"Prims.op_Subtraction",
"Spec.Loops.repeat_range",
"Prims.op_Addition",
"Spec.SHA2.counter",
"Spec.SHA2.size_k_w",
"Spec.SHA2.Lemmas.shuffle_core",
"Spec.SHA2.Lemmas.ws",
"FStar.Pervasives.norm_spec",
"Spec.SHA2._sigma1",
"Spec.SHA2._sigma0",
"Prims._assert",
"FStar.Pervasives.norm",
"Prims.list",
"FStar.Pervasives.norm_step",
"FStar.Pervasives.iota",
"FStar.Pervasives.primops",
"FStar.Pervasives.simplify",
"FStar.Pervasives.delta_only",
"Prims.string"
] | [] | module Spec.SHA2.Lemmas
open Lib.IntTypes
module C = Spec.SHA2.Constants
module S = FStar.Seq
open Spec.Hash.Definitions
open Spec.SHA2
open Spec.Hash.Lemmas
friend Spec.SHA2
friend Spec.Agile.Hash
#set-options "--z3rlimit 25 --fuel 0 --ifuel 0"
(* Scheduling function *)
(* Recursive Version *)
let rec ws_aux (a:sha2_alg) (b:block_w a) (t:counter{t < size_k_w a}): Tot (word a) =
if t < block_word_length a then b.[t]
else
let t16 = ws_aux a b (t - 16) in
let t15 = ws_aux a b (t - 15) in
let t7 = ws_aux a b (t - 7) in
let t2 = ws_aux a b (t - 2) in
let s1 = _sigma1 a t2 in
let s0 = _sigma0 a t15 in
(s1 +. t7 +. s0 +. t16)
[@"opaque_to_smt"]
let ws = ws_aux
(* Core shuffling function *)
let shuffle_core_ (a:sha2_alg) (block:block_w a) (hash:words_state a) (t:counter{t < size_k_w a}): Tot (words_state a) =
(**) assert(7 <= S.length hash);
let a0 = hash.[0] in
let b0 = hash.[1] in
let c0 = hash.[2] in
let d0 = hash.[3] in
let e0 = hash.[4] in
let f0 = hash.[5] in
let g0 = hash.[6] in
let h0 = hash.[7] in
(**) assert(S.length (k0 a) = size_k_w a);
let t1 = h0 +. (_Sigma1 a e0) +. (_Ch a e0 f0 g0) +. (k0 a).[t] +. (ws a block t) in
let t2 = (_Sigma0 a a0) +. (_Maj a a0 b0 c0) in
(**) assert(t < S.length (k0 a));
let l = [ t1 +. t2; a0; b0; c0; d0 +. t1; e0; f0; g0 ] in
assert_norm (List.Tot.length l = 8);
S.seq_of_list l
[@"opaque_to_smt"]
let shuffle_core = shuffle_core_
(* Full shuffling function *)
let shuffle_aux (a:sha2_alg) (hash:words_state a) (block:block_w a): Tot (words_state a) =
Spec.Loops.repeat_range 0 (size_k_w a) (shuffle_core a block) hash
#push-options "--max_fuel 1 --max_ifuel 0"
val shuffle_is_shuffle_pre: a:sha2_alg -> hash:words_state a -> block:block_w a ->
Lemma (shuffle a hash block == shuffle_aux a hash block)
let shuffle_is_shuffle_pre a hash block =
let rec repeati_is_repeat_range #a (n:nat)
(f:a -> (i:nat{i < n}) -> Tot a)
(f': (i:nat{i < n}) -> a -> Tot a)
(i:nat{i <= n})
(acc0:a)
: Lemma
(requires forall x i. f x i == f' i x)
(ensures Spec.Loops.repeat_range 0 i f acc0 == Lib.LoopCombinators.repeati i f' acc0)
= if i = 0 then (
Lib.LoopCombinators.eq_repeati0 n f' acc0
) else (
Spec.Loops.repeat_range_induction 0 i f acc0;
Lib.LoopCombinators.unfold_repeati n f' acc0 (i-1);
repeati_is_repeat_range n f f' (i-1) acc0
)
in
let rec ws_is_ws_pre (i:nat{i <= size_k_w a}) : Lemma
(ensures forall (j:nat{j < i}).
ws a block j ==
(Lib.LoopCombinators.repeati i
(ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0))).[j]
)
= if i = 0 then ()
else (
ws_is_ws_pre (i - 1);
Lib.LoopCombinators.unfold_repeati (size_k_w a) (ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0)) (i - 1);
let f = ws_pre_inner a block in
let acc0 = Seq.create (size_k_w a) (to_word a 0) in
assert (Lib.LoopCombinators.repeati i f acc0 ==
f (i - 1) (Lib.LoopCombinators.repeati (i-1) f acc0));
reveal_opaque (`%ws) ws
)
in
let ws = ws_pre a block in
let k = k0 a in
let shuffle_core_is_shuffle_core_pre
hash
(i:counter{i < size_k_w a})
: Lemma (shuffle_core a block hash i == shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] hash)
= ws_is_ws_pre (size_k_w a);
reveal_opaque (`%ws_pre) ws_pre;
reveal_opaque (`%shuffle_core) shuffle_core;
reveal_opaque (`%shuffle_core_pre) shuffle_core_pre
in
Classical.forall_intro_2 shuffle_core_is_shuffle_core_pre;
repeati_is_repeat_range (size_k_w a) (shuffle_core a block) (fun i h -> shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] h) (size_k_w a) hash;
assert (shuffle_pre a hash block == shuffle_aux a hash block);
reveal_opaque (`%shuffle) shuffle
#pop-options
(* Compression function *)
let update_aux (a:sha2_alg) (hash:words_state a) (block:bytes{S.length block = block_length a}): Tot (words_state a) =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle_aux a hash block_w in
Lib.Sequence.map2 ( +. ) (hash <: Lib.Sequence.lseq (word a) (state_word_length a)) hash_1
val update_is_update_pre: a:sha2_alg -> hash:words_state a -> block:bytes{S.length block = block_length a} ->
Lemma (update a hash block == update_aux a hash block)
let update_is_update_pre a hash block =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle a hash block_w in
shuffle_is_shuffle_pre a hash block_w;
let hash:Lib.Sequence.lseq (word a) (state_word_length a) = hash in
reveal_opaque (`%update) update;
let s1 = Lib.Sequence.map2 (+.) hash hash_1 in
let s2 = Spec.Loops.seq_map2 (+.) hash hash_1 in
assert (Seq.length s1 == Seq.length s2);
let aux (i:nat{i < Seq.length s1}) : Lemma (Seq.index s1 i == Seq.index s2 i)
=
// Need Lib.Sequence.index in the context for map2's postcondition to trigger
assert (Lib.Sequence.index s1 i == ( +. ) (Seq.index hash i) (Seq.index hash_1 i))
in Classical.forall_intro aux;
assert (s1 `Seq.equal` s2)
#push-options "--max_fuel 1 --max_ifuel 1 --z3rlimit 200"
let update_224_256 hash block =
assert_norm (words_state SHA2_224 == words_state SHA2_256);
let rec ws_224_256 (b: block_w SHA2_256) (t:counter{t < size_k_w SHA2_256}):
Lemma
(ensures (ws SHA2_224 b t == ws SHA2_256 b t))
[ SMTPat (ws SHA2_256 b t) ]
=
reveal_opaque (`%ws) ws;
assert_norm (block_w SHA2_256 == block_w SHA2_224);
assert_norm (size_k_w SHA2_256 == size_k_w SHA2_224);
(*
* The code earlier was doing assert_norm (_sigma0 SHA2_256 == _sigma0 SHA2_224)
*
* This is a bit suboptimal, since assert_norm is a heavy hammer,
* it also ends up unfolding `==`, which means the equality is not
* reduced in F*, rather the query for proving equality of two
* lambda terms reaches Z3 -- once that happens we are at the mercy of
* hashconsing etc. to prove the equality
*
* Instead, if we do controlled normalization, we can prove the equality
* within F*
*)
let steps = [iota; primops; simplify; delta_only [
`%_sigma0; `%_sigma1; `%op0; `%word; `%word_t;
`%__proj__Mkops__item__e5; `%op224_256; `%__proj__Mkops__item__e3;
`%__proj__Mkops__item__e4;
`%Spec.SHA2.op_Hat_Dot; `%Spec.SHA2.op_Greater_Greater_Dot;
`%Spec.SHA2.op_Greater_Greater_Greater_Dot ]] in
assert (norm steps (_sigma0 SHA2_256) == norm steps (_sigma0 SHA2_224));
assert (norm steps (_sigma1 SHA2_256) == norm steps (_sigma1 SHA2_224));
norm_spec steps (_sigma0 SHA2_256);
norm_spec steps (_sigma0 SHA2_224);
norm_spec steps (_sigma1 SHA2_256);
norm_spec steps (_sigma1 SHA2_224);
// assert_norm (word_add_mod SHA2_256 == word_add_mod SHA2_224);
if t < block_word_length SHA2_256 then
()
else begin
ws_224_256 b (t - 16);
ws_224_256 b (t - 15);
ws_224_256 b (t - 7);
ws_224_256 b (t - 2)
end
in
let shuffle_core_224_256 (block:block_w SHA2_256) (hash:words_state SHA2_256) (t:counter{t < size_k_w SHA2_256}):
Lemma (ensures (shuffle_core SHA2_224 block hash t == shuffle_core SHA2_256 block hash t))
[ SMTPat (shuffle_core SHA2_256 block hash t) ]
=
reveal_opaque (`%shuffle_core) shuffle_core
in
let rec repeat_range_f (#a:Type) (min:nat) (max:nat{min <= max}) (f g:(a -> i:nat{i < max} -> Tot a)) (x: a):
Lemma
(requires (forall x (i: nat { i < max }). {:pattern f x i \/ g x i } f x i == g x i))
(ensures (Spec.Loops.repeat_range min max f x == Spec.Loops.repeat_range min max g x))
(decreases (max - min))
[ SMTPat (Spec.Loops.repeat_range min max f x); SMTPat (Spec.Loops.repeat_range min max g x) ]
=
if min = max then
()
else
repeat_range_f (min + 1) max f g (f x min)
in
let shuffle_224_256 (hash:words_state SHA2_256) (block:block_w SHA2_256):
Lemma (ensures (shuffle SHA2_224 hash block == shuffle SHA2_256 hash block))
[ SMTPat (shuffle SHA2_256 hash block) ]
=
shuffle_is_shuffle_pre SHA2_224 hash block;
shuffle_is_shuffle_pre SHA2_256 hash block;
reveal_opaque (`%shuffle) shuffle;
assert_norm (words_state SHA2_224 == words_state SHA2_256)
in
let rec seq_map2_f
(#a:Type) (#b:Type) (#c:Type)
(f g:(a -> b -> Tot c))
(s:S.seq a) (s':S.seq b{S.length s = S.length s'}):
Lemma
(requires (forall x y. {:pattern f x y \/ g x y} f x y == g x y))
(ensures (Spec.Loops.(seq_map2 f s s' == seq_map2 g s s')))
(decreases (S.length s))
[ SMTPat (Spec.Loops.seq_map2 f s s'); SMTPat (Spec.Loops.seq_map2 g s s') ]
=
if S.length s = 0 then
()
else
seq_map2_f f g (S.tail s) (S.tail s')
in
assert_norm (words_of_bytes SHA2_256 #(block_word_length SHA2_256) == words_of_bytes SHA2_224 #(block_word_length SHA2_224));
reveal_opaque (`%shuffle) shuffle;
reveal_opaque (`%update) update
#pop-options
#push-options "--fuel 1"
let update_multi_update (a: md_alg) (h: words_state a) (input: bytes_block a): Lemma
(ensures (Spec.Agile.Hash.update_multi a h () input) == (Spec.Agile.Hash.update a h input))
=
let h1 = Spec.Agile.Hash.update_multi a h () input in
assert(h1 == Lib.UpdateMulti.mk_update_multi (block_length a) (Spec.Agile.Hash.update a) h input);
if S.length input = 0 then
begin
assert(h1 == h)
end
else
begin
let block, rem = Lib.UpdateMulti.split_block (block_length a) input 1 in
let h2 = Spec.Agile.Hash.update a h block in
assert(rem `Seq.equal` Seq.empty);
assert(block `Seq.equal` input);
let h3 = Lib.UpdateMulti.mk_update_multi (block_length a) (Spec.Agile.Hash.update a) h2 rem in
assert(h1 == h3)
end
#pop-options
let rec update_multi_224_256 hash blocks =
let a = SHA2_256 in
let a' = SHA2_224 in
assert_norm (words_state a == words_state a');
if S.length blocks = 0 then
begin
assert(blocks `S.equal` S.empty);
Spec.Hash.Lemmas.update_multi_zero a hash;
Spec.Hash.Lemmas.update_multi_zero a' hash
end
else
begin
assert(block_length a = block_length a');
let block1, blocks_end = S.split blocks (block_length a) in
assert(S.length block1 = block_length a);
assert(S.length blocks_end % block_length a = 0);
assert(S.append block1 blocks_end `S.equal` blocks);
update_multi_associative a hash block1 blocks_end;
update_multi_associative a' hash block1 blocks_end;
update_multi_update a hash block1;
update_multi_update a' hash block1;
let hash1 = Spec.Agile.Hash.update a hash block1 in
let hash2 = Spec.Agile.Hash.update a' hash block1 in
update_224_256 hash block1;
assert(hash1 == hash2);
update_multi_224_256 hash1 blocks_end
end
#push-options "--z3rlimit 50"
let update_last_224_256 hash prevlen input =
let update_multi_224_256 (hash:words_state SHA2_256) (blocks:bytes_blocks SHA2_256):
Lemma
(ensures (Spec.Agile.Hash.update_multi SHA2_256 hash () blocks ==
Spec.Agile.Hash.update_multi SHA2_224 hash () blocks))
(decreases (Seq.length blocks))
[ SMTPat (Spec.Agile.Hash.update_multi SHA2_256 hash () blocks) ]
=
update_multi_224_256 hash blocks
in
()
#push-options "--max_fuel 1 --max_ifuel 1 --z3rlimit 200" | false | false | Spec.SHA2.Lemmas.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 200,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val update_384_512: st:words_state SHA2_512 ->
block:bytes{Seq.length block = block_length SHA2_512} ->
Lemma
(ensures (Spec.Agile.Hash.(update SHA2_512 st block == update SHA2_384 st block))) | [] | Spec.SHA2.Lemmas.update_384_512 | {
"file_name": "specs/lemmas/Spec.SHA2.Lemmas.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
st: Spec.Hash.Definitions.words_state Spec.Hash.Definitions.SHA2_512 ->
block:
Spec.Hash.Definitions.bytes
{ FStar.Seq.Base.length block =
Spec.Hash.Definitions.block_length Spec.Hash.Definitions.SHA2_512 }
-> FStar.Pervasives.Lemma
(ensures
Spec.Agile.Hash.update Spec.Hash.Definitions.SHA2_512 st block ==
Spec.Agile.Hash.update Spec.Hash.Definitions.SHA2_384 st block) | {
"end_col": 33,
"end_line": 404,
"start_col": 2,
"start_line": 312
} |
FStar.Pervasives.Lemma | val update_224_256: st:words_state SHA2_256 ->
block:bytes{Seq.length block = block_length SHA2_256} ->
Lemma
(ensures (Spec.Agile.Hash.(update SHA2_256 st block == update SHA2_224 st block))) | [
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Seq",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Spec.SHA2.Constants",
"short_module": "C"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let update_224_256 hash block =
assert_norm (words_state SHA2_224 == words_state SHA2_256);
let rec ws_224_256 (b: block_w SHA2_256) (t:counter{t < size_k_w SHA2_256}):
Lemma
(ensures (ws SHA2_224 b t == ws SHA2_256 b t))
[ SMTPat (ws SHA2_256 b t) ]
=
reveal_opaque (`%ws) ws;
assert_norm (block_w SHA2_256 == block_w SHA2_224);
assert_norm (size_k_w SHA2_256 == size_k_w SHA2_224);
(*
* The code earlier was doing assert_norm (_sigma0 SHA2_256 == _sigma0 SHA2_224)
*
* This is a bit suboptimal, since assert_norm is a heavy hammer,
* it also ends up unfolding `==`, which means the equality is not
* reduced in F*, rather the query for proving equality of two
* lambda terms reaches Z3 -- once that happens we are at the mercy of
* hashconsing etc. to prove the equality
*
* Instead, if we do controlled normalization, we can prove the equality
* within F*
*)
let steps = [iota; primops; simplify; delta_only [
`%_sigma0; `%_sigma1; `%op0; `%word; `%word_t;
`%__proj__Mkops__item__e5; `%op224_256; `%__proj__Mkops__item__e3;
`%__proj__Mkops__item__e4;
`%Spec.SHA2.op_Hat_Dot; `%Spec.SHA2.op_Greater_Greater_Dot;
`%Spec.SHA2.op_Greater_Greater_Greater_Dot ]] in
assert (norm steps (_sigma0 SHA2_256) == norm steps (_sigma0 SHA2_224));
assert (norm steps (_sigma1 SHA2_256) == norm steps (_sigma1 SHA2_224));
norm_spec steps (_sigma0 SHA2_256);
norm_spec steps (_sigma0 SHA2_224);
norm_spec steps (_sigma1 SHA2_256);
norm_spec steps (_sigma1 SHA2_224);
// assert_norm (word_add_mod SHA2_256 == word_add_mod SHA2_224);
if t < block_word_length SHA2_256 then
()
else begin
ws_224_256 b (t - 16);
ws_224_256 b (t - 15);
ws_224_256 b (t - 7);
ws_224_256 b (t - 2)
end
in
let shuffle_core_224_256 (block:block_w SHA2_256) (hash:words_state SHA2_256) (t:counter{t < size_k_w SHA2_256}):
Lemma (ensures (shuffle_core SHA2_224 block hash t == shuffle_core SHA2_256 block hash t))
[ SMTPat (shuffle_core SHA2_256 block hash t) ]
=
reveal_opaque (`%shuffle_core) shuffle_core
in
let rec repeat_range_f (#a:Type) (min:nat) (max:nat{min <= max}) (f g:(a -> i:nat{i < max} -> Tot a)) (x: a):
Lemma
(requires (forall x (i: nat { i < max }). {:pattern f x i \/ g x i } f x i == g x i))
(ensures (Spec.Loops.repeat_range min max f x == Spec.Loops.repeat_range min max g x))
(decreases (max - min))
[ SMTPat (Spec.Loops.repeat_range min max f x); SMTPat (Spec.Loops.repeat_range min max g x) ]
=
if min = max then
()
else
repeat_range_f (min + 1) max f g (f x min)
in
let shuffle_224_256 (hash:words_state SHA2_256) (block:block_w SHA2_256):
Lemma (ensures (shuffle SHA2_224 hash block == shuffle SHA2_256 hash block))
[ SMTPat (shuffle SHA2_256 hash block) ]
=
shuffle_is_shuffle_pre SHA2_224 hash block;
shuffle_is_shuffle_pre SHA2_256 hash block;
reveal_opaque (`%shuffle) shuffle;
assert_norm (words_state SHA2_224 == words_state SHA2_256)
in
let rec seq_map2_f
(#a:Type) (#b:Type) (#c:Type)
(f g:(a -> b -> Tot c))
(s:S.seq a) (s':S.seq b{S.length s = S.length s'}):
Lemma
(requires (forall x y. {:pattern f x y \/ g x y} f x y == g x y))
(ensures (Spec.Loops.(seq_map2 f s s' == seq_map2 g s s')))
(decreases (S.length s))
[ SMTPat (Spec.Loops.seq_map2 f s s'); SMTPat (Spec.Loops.seq_map2 g s s') ]
=
if S.length s = 0 then
()
else
seq_map2_f f g (S.tail s) (S.tail s')
in
assert_norm (words_of_bytes SHA2_256 #(block_word_length SHA2_256) == words_of_bytes SHA2_224 #(block_word_length SHA2_224));
reveal_opaque (`%shuffle) shuffle;
reveal_opaque (`%update) update | val update_224_256: st:words_state SHA2_256 ->
block:bytes{Seq.length block = block_length SHA2_256} ->
Lemma
(ensures (Spec.Agile.Hash.(update SHA2_256 st block == update SHA2_224 st block)))
let update_224_256 hash block = | false | null | true | assert_norm (words_state SHA2_224 == words_state SHA2_256);
let rec ws_224_256 (b: block_w SHA2_256) (t: counter{t < size_k_w SHA2_256})
: Lemma (ensures (ws SHA2_224 b t == ws SHA2_256 b t)) [SMTPat (ws SHA2_256 b t)] =
reveal_opaque (`%ws) ws;
assert_norm (block_w SHA2_256 == block_w SHA2_224);
assert_norm (size_k_w SHA2_256 == size_k_w SHA2_224);
let steps =
[
iota;
primops;
simplify;
delta_only [
`%_sigma0; `%_sigma1; `%op0; `%word; `%word_t; `%__proj__Mkops__item__e5; `%op224_256;
`%__proj__Mkops__item__e3; `%__proj__Mkops__item__e4; `%Spec.SHA2.op_Hat_Dot;
`%Spec.SHA2.op_Greater_Greater_Dot; `%Spec.SHA2.op_Greater_Greater_Greater_Dot
]
]
in
assert (norm steps (_sigma0 SHA2_256) == norm steps (_sigma0 SHA2_224));
assert (norm steps (_sigma1 SHA2_256) == norm steps (_sigma1 SHA2_224));
norm_spec steps (_sigma0 SHA2_256);
norm_spec steps (_sigma0 SHA2_224);
norm_spec steps (_sigma1 SHA2_256);
norm_spec steps (_sigma1 SHA2_224);
if t < block_word_length SHA2_256
then ()
else
(ws_224_256 b (t - 16);
ws_224_256 b (t - 15);
ws_224_256 b (t - 7);
ws_224_256 b (t - 2))
in
let shuffle_core_224_256
(block: block_w SHA2_256)
(hash: words_state SHA2_256)
(t: counter{t < size_k_w SHA2_256})
: Lemma (ensures (shuffle_core SHA2_224 block hash t == shuffle_core SHA2_256 block hash t))
[SMTPat (shuffle_core SHA2_256 block hash t)] =
reveal_opaque (`%shuffle_core) shuffle_core
in
let rec repeat_range_f
(#a: Type)
(min: nat)
(max: nat{min <= max})
(f g: (a -> i: nat{i < max} -> Tot a))
(x: a)
: Lemma (requires (forall x (i: nat{i < max}). {:pattern f x i\/g x i} f x i == g x i))
(ensures (Spec.Loops.repeat_range min max f x == Spec.Loops.repeat_range min max g x))
(decreases (max - min))
[SMTPat (Spec.Loops.repeat_range min max f x); SMTPat (Spec.Loops.repeat_range min max g x)] =
if min = max then () else repeat_range_f (min + 1) max f g (f x min)
in
let shuffle_224_256 (hash: words_state SHA2_256) (block: block_w SHA2_256)
: Lemma (ensures (shuffle SHA2_224 hash block == shuffle SHA2_256 hash block))
[SMTPat (shuffle SHA2_256 hash block)] =
shuffle_is_shuffle_pre SHA2_224 hash block;
shuffle_is_shuffle_pre SHA2_256 hash block;
reveal_opaque (`%shuffle) shuffle;
assert_norm (words_state SHA2_224 == words_state SHA2_256)
in
let rec seq_map2_f
(#a #b #c: Type)
(f g: (a -> b -> Tot c))
(s: S.seq a)
(s': S.seq b {S.length s = S.length s'})
: Lemma (requires (forall x y. {:pattern f x y\/g x y} f x y == g x y))
(ensures (let open Spec.Loops in seq_map2 f s s' == seq_map2 g s s'))
(decreases (S.length s))
[SMTPat (Spec.Loops.seq_map2 f s s'); SMTPat (Spec.Loops.seq_map2 g s s')] =
if S.length s = 0 then () else seq_map2_f f g (S.tail s) (S.tail s')
in
assert_norm (words_of_bytes SHA2_256 #(block_word_length SHA2_256) ==
words_of_bytes SHA2_224 #(block_word_length SHA2_224));
reveal_opaque (`%shuffle) shuffle;
reveal_opaque (`%update) update | {
"checked_file": "Spec.SHA2.Lemmas.fst.checked",
"dependencies": [
"Spec.SHA2.Constants.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Lemmas.fsti.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fst.checked",
"prims.fst.checked",
"Lib.UpdateMulti.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.LoopCombinators.fsti.checked",
"Lib.IntTypes.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": true,
"source_file": "Spec.SHA2.Lemmas.fst"
} | [
"lemma"
] | [
"Spec.Hash.Definitions.words_state",
"Spec.Hash.Definitions.SHA2_256",
"Spec.Hash.Definitions.bytes",
"Prims.b2t",
"Prims.op_Equality",
"Prims.int",
"Prims.l_or",
"Prims.op_GreaterThanOrEqual",
"Prims.op_disEquality",
"FStar.Seq.Base.length",
"Lib.IntTypes.uint8",
"Spec.Hash.Definitions.block_length",
"FStar.Pervasives.reveal_opaque",
"Spec.Hash.Definitions.sha2_alg",
"Spec.Hash.Definitions.update_t",
"Spec.SHA2.update",
"Prims.unit",
"Spec.SHA2.block_w",
"Spec.SHA2.shuffle",
"FStar.Pervasives.assert_norm",
"Prims.eq2",
"Lib.Sequence.lseq",
"Lib.IntTypes.int_t",
"Lib.IntTypes.U8",
"Lib.IntTypes.SEC",
"Prims.op_Multiply",
"Spec.Hash.Definitions.word_length",
"Spec.Hash.Definitions.SHA2_224",
"Spec.Hash.Definitions.block_word_length",
"Spec.Hash.Definitions.word",
"Spec.Hash.Definitions.words_of_bytes",
"FStar.Seq.Base.seq",
"Prims.nat",
"Prims.l_Forall",
"Prims.squash",
"Prims.l_and",
"Prims.l_imp",
"Prims.op_LessThan",
"FStar.Seq.Base.index",
"Spec.Loops.seq_map2",
"Prims.Cons",
"FStar.Pervasives.pattern",
"FStar.Pervasives.smt_pat",
"Prims.Nil",
"Prims.bool",
"FStar.Seq.Properties.tail",
"Prims.l_True",
"Lib.Sequence.seq",
"Spec.Hash.Definitions.state_word_length",
"Spec.SHA2.Lemmas.shuffle_is_shuffle_pre",
"Prims.op_LessThanOrEqual",
"Prims.op_Subtraction",
"Spec.Loops.repeat_range",
"Prims.op_Addition",
"Spec.SHA2.counter",
"Spec.SHA2.size_k_w",
"Spec.SHA2.Lemmas.shuffle_core",
"Spec.SHA2.Lemmas.ws",
"FStar.Pervasives.norm_spec",
"Spec.SHA2._sigma1",
"Spec.SHA2._sigma0",
"Prims._assert",
"FStar.Pervasives.norm",
"Prims.list",
"FStar.Pervasives.norm_step",
"FStar.Pervasives.iota",
"FStar.Pervasives.primops",
"FStar.Pervasives.simplify",
"FStar.Pervasives.delta_only",
"Prims.string"
] | [] | module Spec.SHA2.Lemmas
open Lib.IntTypes
module C = Spec.SHA2.Constants
module S = FStar.Seq
open Spec.Hash.Definitions
open Spec.SHA2
open Spec.Hash.Lemmas
friend Spec.SHA2
friend Spec.Agile.Hash
#set-options "--z3rlimit 25 --fuel 0 --ifuel 0"
(* Scheduling function *)
(* Recursive Version *)
let rec ws_aux (a:sha2_alg) (b:block_w a) (t:counter{t < size_k_w a}): Tot (word a) =
if t < block_word_length a then b.[t]
else
let t16 = ws_aux a b (t - 16) in
let t15 = ws_aux a b (t - 15) in
let t7 = ws_aux a b (t - 7) in
let t2 = ws_aux a b (t - 2) in
let s1 = _sigma1 a t2 in
let s0 = _sigma0 a t15 in
(s1 +. t7 +. s0 +. t16)
[@"opaque_to_smt"]
let ws = ws_aux
(* Core shuffling function *)
let shuffle_core_ (a:sha2_alg) (block:block_w a) (hash:words_state a) (t:counter{t < size_k_w a}): Tot (words_state a) =
(**) assert(7 <= S.length hash);
let a0 = hash.[0] in
let b0 = hash.[1] in
let c0 = hash.[2] in
let d0 = hash.[3] in
let e0 = hash.[4] in
let f0 = hash.[5] in
let g0 = hash.[6] in
let h0 = hash.[7] in
(**) assert(S.length (k0 a) = size_k_w a);
let t1 = h0 +. (_Sigma1 a e0) +. (_Ch a e0 f0 g0) +. (k0 a).[t] +. (ws a block t) in
let t2 = (_Sigma0 a a0) +. (_Maj a a0 b0 c0) in
(**) assert(t < S.length (k0 a));
let l = [ t1 +. t2; a0; b0; c0; d0 +. t1; e0; f0; g0 ] in
assert_norm (List.Tot.length l = 8);
S.seq_of_list l
[@"opaque_to_smt"]
let shuffle_core = shuffle_core_
(* Full shuffling function *)
let shuffle_aux (a:sha2_alg) (hash:words_state a) (block:block_w a): Tot (words_state a) =
Spec.Loops.repeat_range 0 (size_k_w a) (shuffle_core a block) hash
#push-options "--max_fuel 1 --max_ifuel 0"
val shuffle_is_shuffle_pre: a:sha2_alg -> hash:words_state a -> block:block_w a ->
Lemma (shuffle a hash block == shuffle_aux a hash block)
let shuffle_is_shuffle_pre a hash block =
let rec repeati_is_repeat_range #a (n:nat)
(f:a -> (i:nat{i < n}) -> Tot a)
(f': (i:nat{i < n}) -> a -> Tot a)
(i:nat{i <= n})
(acc0:a)
: Lemma
(requires forall x i. f x i == f' i x)
(ensures Spec.Loops.repeat_range 0 i f acc0 == Lib.LoopCombinators.repeati i f' acc0)
= if i = 0 then (
Lib.LoopCombinators.eq_repeati0 n f' acc0
) else (
Spec.Loops.repeat_range_induction 0 i f acc0;
Lib.LoopCombinators.unfold_repeati n f' acc0 (i-1);
repeati_is_repeat_range n f f' (i-1) acc0
)
in
let rec ws_is_ws_pre (i:nat{i <= size_k_w a}) : Lemma
(ensures forall (j:nat{j < i}).
ws a block j ==
(Lib.LoopCombinators.repeati i
(ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0))).[j]
)
= if i = 0 then ()
else (
ws_is_ws_pre (i - 1);
Lib.LoopCombinators.unfold_repeati (size_k_w a) (ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0)) (i - 1);
let f = ws_pre_inner a block in
let acc0 = Seq.create (size_k_w a) (to_word a 0) in
assert (Lib.LoopCombinators.repeati i f acc0 ==
f (i - 1) (Lib.LoopCombinators.repeati (i-1) f acc0));
reveal_opaque (`%ws) ws
)
in
let ws = ws_pre a block in
let k = k0 a in
let shuffle_core_is_shuffle_core_pre
hash
(i:counter{i < size_k_w a})
: Lemma (shuffle_core a block hash i == shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] hash)
= ws_is_ws_pre (size_k_w a);
reveal_opaque (`%ws_pre) ws_pre;
reveal_opaque (`%shuffle_core) shuffle_core;
reveal_opaque (`%shuffle_core_pre) shuffle_core_pre
in
Classical.forall_intro_2 shuffle_core_is_shuffle_core_pre;
repeati_is_repeat_range (size_k_w a) (shuffle_core a block) (fun i h -> shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] h) (size_k_w a) hash;
assert (shuffle_pre a hash block == shuffle_aux a hash block);
reveal_opaque (`%shuffle) shuffle
#pop-options
(* Compression function *)
let update_aux (a:sha2_alg) (hash:words_state a) (block:bytes{S.length block = block_length a}): Tot (words_state a) =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle_aux a hash block_w in
Lib.Sequence.map2 ( +. ) (hash <: Lib.Sequence.lseq (word a) (state_word_length a)) hash_1
val update_is_update_pre: a:sha2_alg -> hash:words_state a -> block:bytes{S.length block = block_length a} ->
Lemma (update a hash block == update_aux a hash block)
let update_is_update_pre a hash block =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle a hash block_w in
shuffle_is_shuffle_pre a hash block_w;
let hash:Lib.Sequence.lseq (word a) (state_word_length a) = hash in
reveal_opaque (`%update) update;
let s1 = Lib.Sequence.map2 (+.) hash hash_1 in
let s2 = Spec.Loops.seq_map2 (+.) hash hash_1 in
assert (Seq.length s1 == Seq.length s2);
let aux (i:nat{i < Seq.length s1}) : Lemma (Seq.index s1 i == Seq.index s2 i)
=
// Need Lib.Sequence.index in the context for map2's postcondition to trigger
assert (Lib.Sequence.index s1 i == ( +. ) (Seq.index hash i) (Seq.index hash_1 i))
in Classical.forall_intro aux;
assert (s1 `Seq.equal` s2)
#push-options "--max_fuel 1 --max_ifuel 1 --z3rlimit 200" | false | false | Spec.SHA2.Lemmas.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 200,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val update_224_256: st:words_state SHA2_256 ->
block:bytes{Seq.length block = block_length SHA2_256} ->
Lemma
(ensures (Spec.Agile.Hash.(update SHA2_256 st block == update SHA2_224 st block))) | [] | Spec.SHA2.Lemmas.update_224_256 | {
"file_name": "specs/lemmas/Spec.SHA2.Lemmas.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
st: Spec.Hash.Definitions.words_state Spec.Hash.Definitions.SHA2_256 ->
block:
Spec.Hash.Definitions.bytes
{ FStar.Seq.Base.length block =
Spec.Hash.Definitions.block_length Spec.Hash.Definitions.SHA2_256 }
-> FStar.Pervasives.Lemma
(ensures
Spec.Agile.Hash.update Spec.Hash.Definitions.SHA2_256 st block ==
Spec.Agile.Hash.update Spec.Hash.Definitions.SHA2_224 st block) | {
"end_col": 33,
"end_line": 242,
"start_col": 2,
"start_line": 150
} |
FStar.Pervasives.Lemma | val update_last_224_256:
hash:words_state SHA2_256 ->
prevlen:Spec.Hash.Incremental.Definitions.prev_length_t SHA2_256 ->
input:bytes{ (Seq.length input + prevlen) `less_than_max_input_length` SHA2_256 /\
Seq.length input <= block_length SHA2_256 } ->
Lemma
(ensures Spec.Hash.Incremental.Definitions.update_last SHA2_256 hash prevlen input ==
Spec.Hash.Incremental.Definitions.update_last SHA2_224 hash prevlen input) | [
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Seq",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Spec.SHA2.Constants",
"short_module": "C"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let update_last_224_256 hash prevlen input =
let update_multi_224_256 (hash:words_state SHA2_256) (blocks:bytes_blocks SHA2_256):
Lemma
(ensures (Spec.Agile.Hash.update_multi SHA2_256 hash () blocks ==
Spec.Agile.Hash.update_multi SHA2_224 hash () blocks))
(decreases (Seq.length blocks))
[ SMTPat (Spec.Agile.Hash.update_multi SHA2_256 hash () blocks) ]
=
update_multi_224_256 hash blocks
in
() | val update_last_224_256:
hash:words_state SHA2_256 ->
prevlen:Spec.Hash.Incremental.Definitions.prev_length_t SHA2_256 ->
input:bytes{ (Seq.length input + prevlen) `less_than_max_input_length` SHA2_256 /\
Seq.length input <= block_length SHA2_256 } ->
Lemma
(ensures Spec.Hash.Incremental.Definitions.update_last SHA2_256 hash prevlen input ==
Spec.Hash.Incremental.Definitions.update_last SHA2_224 hash prevlen input)
let update_last_224_256 hash prevlen input = | false | null | true | let update_multi_224_256 (hash: words_state SHA2_256) (blocks: bytes_blocks SHA2_256)
: Lemma
(ensures
(Spec.Agile.Hash.update_multi SHA2_256 hash () blocks ==
Spec.Agile.Hash.update_multi SHA2_224 hash () blocks))
(decreases (Seq.length blocks))
[SMTPat (Spec.Agile.Hash.update_multi SHA2_256 hash () blocks)] =
update_multi_224_256 hash blocks
in
() | {
"checked_file": "Spec.SHA2.Lemmas.fst.checked",
"dependencies": [
"Spec.SHA2.Constants.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.SHA2.fst.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Lemmas.fsti.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fst.checked",
"prims.fst.checked",
"Lib.UpdateMulti.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.LoopCombinators.fsti.checked",
"Lib.IntTypes.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": true,
"source_file": "Spec.SHA2.Lemmas.fst"
} | [
"lemma"
] | [
"Spec.Hash.Definitions.words_state",
"Spec.Hash.Definitions.SHA2_256",
"Spec.Hash.Incremental.Definitions.prev_length_t",
"Spec.Hash.Definitions.bytes",
"Prims.l_and",
"Prims.b2t",
"Spec.Hash.Definitions.less_than_max_input_length",
"Prims.op_Addition",
"FStar.Seq.Base.length",
"Lib.IntTypes.uint8",
"Prims.op_LessThanOrEqual",
"Spec.Hash.Definitions.block_length",
"Spec.Hash.Definitions.bytes_blocks",
"Prims.unit",
"Lib.IntTypes.int_t",
"Lib.IntTypes.U8",
"Lib.IntTypes.SEC",
"Prims.l_True",
"Prims.squash",
"Prims.eq2",
"Lib.Sequence.seq",
"Spec.Hash.Definitions.word",
"Prims.l_or",
"Prims.nat",
"Spec.Hash.Definitions.state_word_length",
"Spec.Hash.Definitions.SHA2_224",
"Spec.Agile.Hash.update_multi",
"Prims.Cons",
"FStar.Pervasives.pattern",
"FStar.Pervasives.smt_pat",
"Prims.Nil",
"Spec.SHA2.Lemmas.update_multi_224_256"
] | [] | module Spec.SHA2.Lemmas
open Lib.IntTypes
module C = Spec.SHA2.Constants
module S = FStar.Seq
open Spec.Hash.Definitions
open Spec.SHA2
open Spec.Hash.Lemmas
friend Spec.SHA2
friend Spec.Agile.Hash
#set-options "--z3rlimit 25 --fuel 0 --ifuel 0"
(* Scheduling function *)
(* Recursive Version *)
let rec ws_aux (a:sha2_alg) (b:block_w a) (t:counter{t < size_k_w a}): Tot (word a) =
if t < block_word_length a then b.[t]
else
let t16 = ws_aux a b (t - 16) in
let t15 = ws_aux a b (t - 15) in
let t7 = ws_aux a b (t - 7) in
let t2 = ws_aux a b (t - 2) in
let s1 = _sigma1 a t2 in
let s0 = _sigma0 a t15 in
(s1 +. t7 +. s0 +. t16)
[@"opaque_to_smt"]
let ws = ws_aux
(* Core shuffling function *)
let shuffle_core_ (a:sha2_alg) (block:block_w a) (hash:words_state a) (t:counter{t < size_k_w a}): Tot (words_state a) =
(**) assert(7 <= S.length hash);
let a0 = hash.[0] in
let b0 = hash.[1] in
let c0 = hash.[2] in
let d0 = hash.[3] in
let e0 = hash.[4] in
let f0 = hash.[5] in
let g0 = hash.[6] in
let h0 = hash.[7] in
(**) assert(S.length (k0 a) = size_k_w a);
let t1 = h0 +. (_Sigma1 a e0) +. (_Ch a e0 f0 g0) +. (k0 a).[t] +. (ws a block t) in
let t2 = (_Sigma0 a a0) +. (_Maj a a0 b0 c0) in
(**) assert(t < S.length (k0 a));
let l = [ t1 +. t2; a0; b0; c0; d0 +. t1; e0; f0; g0 ] in
assert_norm (List.Tot.length l = 8);
S.seq_of_list l
[@"opaque_to_smt"]
let shuffle_core = shuffle_core_
(* Full shuffling function *)
let shuffle_aux (a:sha2_alg) (hash:words_state a) (block:block_w a): Tot (words_state a) =
Spec.Loops.repeat_range 0 (size_k_w a) (shuffle_core a block) hash
#push-options "--max_fuel 1 --max_ifuel 0"
val shuffle_is_shuffle_pre: a:sha2_alg -> hash:words_state a -> block:block_w a ->
Lemma (shuffle a hash block == shuffle_aux a hash block)
let shuffle_is_shuffle_pre a hash block =
let rec repeati_is_repeat_range #a (n:nat)
(f:a -> (i:nat{i < n}) -> Tot a)
(f': (i:nat{i < n}) -> a -> Tot a)
(i:nat{i <= n})
(acc0:a)
: Lemma
(requires forall x i. f x i == f' i x)
(ensures Spec.Loops.repeat_range 0 i f acc0 == Lib.LoopCombinators.repeati i f' acc0)
= if i = 0 then (
Lib.LoopCombinators.eq_repeati0 n f' acc0
) else (
Spec.Loops.repeat_range_induction 0 i f acc0;
Lib.LoopCombinators.unfold_repeati n f' acc0 (i-1);
repeati_is_repeat_range n f f' (i-1) acc0
)
in
let rec ws_is_ws_pre (i:nat{i <= size_k_w a}) : Lemma
(ensures forall (j:nat{j < i}).
ws a block j ==
(Lib.LoopCombinators.repeati i
(ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0))).[j]
)
= if i = 0 then ()
else (
ws_is_ws_pre (i - 1);
Lib.LoopCombinators.unfold_repeati (size_k_w a) (ws_pre_inner a block)
(Seq.create (size_k_w a) (to_word a 0)) (i - 1);
let f = ws_pre_inner a block in
let acc0 = Seq.create (size_k_w a) (to_word a 0) in
assert (Lib.LoopCombinators.repeati i f acc0 ==
f (i - 1) (Lib.LoopCombinators.repeati (i-1) f acc0));
reveal_opaque (`%ws) ws
)
in
let ws = ws_pre a block in
let k = k0 a in
let shuffle_core_is_shuffle_core_pre
hash
(i:counter{i < size_k_w a})
: Lemma (shuffle_core a block hash i == shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] hash)
= ws_is_ws_pre (size_k_w a);
reveal_opaque (`%ws_pre) ws_pre;
reveal_opaque (`%shuffle_core) shuffle_core;
reveal_opaque (`%shuffle_core_pre) shuffle_core_pre
in
Classical.forall_intro_2 shuffle_core_is_shuffle_core_pre;
repeati_is_repeat_range (size_k_w a) (shuffle_core a block) (fun i h -> shuffle_core_pre a (k0 a).[i] (ws_pre a block).[i] h) (size_k_w a) hash;
assert (shuffle_pre a hash block == shuffle_aux a hash block);
reveal_opaque (`%shuffle) shuffle
#pop-options
(* Compression function *)
let update_aux (a:sha2_alg) (hash:words_state a) (block:bytes{S.length block = block_length a}): Tot (words_state a) =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle_aux a hash block_w in
Lib.Sequence.map2 ( +. ) (hash <: Lib.Sequence.lseq (word a) (state_word_length a)) hash_1
val update_is_update_pre: a:sha2_alg -> hash:words_state a -> block:bytes{S.length block = block_length a} ->
Lemma (update a hash block == update_aux a hash block)
let update_is_update_pre a hash block =
let block_w = words_of_bytes a #(block_word_length a) block in
let hash_1 = shuffle a hash block_w in
shuffle_is_shuffle_pre a hash block_w;
let hash:Lib.Sequence.lseq (word a) (state_word_length a) = hash in
reveal_opaque (`%update) update;
let s1 = Lib.Sequence.map2 (+.) hash hash_1 in
let s2 = Spec.Loops.seq_map2 (+.) hash hash_1 in
assert (Seq.length s1 == Seq.length s2);
let aux (i:nat{i < Seq.length s1}) : Lemma (Seq.index s1 i == Seq.index s2 i)
=
// Need Lib.Sequence.index in the context for map2's postcondition to trigger
assert (Lib.Sequence.index s1 i == ( +. ) (Seq.index hash i) (Seq.index hash_1 i))
in Classical.forall_intro aux;
assert (s1 `Seq.equal` s2)
#push-options "--max_fuel 1 --max_ifuel 1 --z3rlimit 200"
let update_224_256 hash block =
assert_norm (words_state SHA2_224 == words_state SHA2_256);
let rec ws_224_256 (b: block_w SHA2_256) (t:counter{t < size_k_w SHA2_256}):
Lemma
(ensures (ws SHA2_224 b t == ws SHA2_256 b t))
[ SMTPat (ws SHA2_256 b t) ]
=
reveal_opaque (`%ws) ws;
assert_norm (block_w SHA2_256 == block_w SHA2_224);
assert_norm (size_k_w SHA2_256 == size_k_w SHA2_224);
(*
* The code earlier was doing assert_norm (_sigma0 SHA2_256 == _sigma0 SHA2_224)
*
* This is a bit suboptimal, since assert_norm is a heavy hammer,
* it also ends up unfolding `==`, which means the equality is not
* reduced in F*, rather the query for proving equality of two
* lambda terms reaches Z3 -- once that happens we are at the mercy of
* hashconsing etc. to prove the equality
*
* Instead, if we do controlled normalization, we can prove the equality
* within F*
*)
let steps = [iota; primops; simplify; delta_only [
`%_sigma0; `%_sigma1; `%op0; `%word; `%word_t;
`%__proj__Mkops__item__e5; `%op224_256; `%__proj__Mkops__item__e3;
`%__proj__Mkops__item__e4;
`%Spec.SHA2.op_Hat_Dot; `%Spec.SHA2.op_Greater_Greater_Dot;
`%Spec.SHA2.op_Greater_Greater_Greater_Dot ]] in
assert (norm steps (_sigma0 SHA2_256) == norm steps (_sigma0 SHA2_224));
assert (norm steps (_sigma1 SHA2_256) == norm steps (_sigma1 SHA2_224));
norm_spec steps (_sigma0 SHA2_256);
norm_spec steps (_sigma0 SHA2_224);
norm_spec steps (_sigma1 SHA2_256);
norm_spec steps (_sigma1 SHA2_224);
// assert_norm (word_add_mod SHA2_256 == word_add_mod SHA2_224);
if t < block_word_length SHA2_256 then
()
else begin
ws_224_256 b (t - 16);
ws_224_256 b (t - 15);
ws_224_256 b (t - 7);
ws_224_256 b (t - 2)
end
in
let shuffle_core_224_256 (block:block_w SHA2_256) (hash:words_state SHA2_256) (t:counter{t < size_k_w SHA2_256}):
Lemma (ensures (shuffle_core SHA2_224 block hash t == shuffle_core SHA2_256 block hash t))
[ SMTPat (shuffle_core SHA2_256 block hash t) ]
=
reveal_opaque (`%shuffle_core) shuffle_core
in
let rec repeat_range_f (#a:Type) (min:nat) (max:nat{min <= max}) (f g:(a -> i:nat{i < max} -> Tot a)) (x: a):
Lemma
(requires (forall x (i: nat { i < max }). {:pattern f x i \/ g x i } f x i == g x i))
(ensures (Spec.Loops.repeat_range min max f x == Spec.Loops.repeat_range min max g x))
(decreases (max - min))
[ SMTPat (Spec.Loops.repeat_range min max f x); SMTPat (Spec.Loops.repeat_range min max g x) ]
=
if min = max then
()
else
repeat_range_f (min + 1) max f g (f x min)
in
let shuffle_224_256 (hash:words_state SHA2_256) (block:block_w SHA2_256):
Lemma (ensures (shuffle SHA2_224 hash block == shuffle SHA2_256 hash block))
[ SMTPat (shuffle SHA2_256 hash block) ]
=
shuffle_is_shuffle_pre SHA2_224 hash block;
shuffle_is_shuffle_pre SHA2_256 hash block;
reveal_opaque (`%shuffle) shuffle;
assert_norm (words_state SHA2_224 == words_state SHA2_256)
in
let rec seq_map2_f
(#a:Type) (#b:Type) (#c:Type)
(f g:(a -> b -> Tot c))
(s:S.seq a) (s':S.seq b{S.length s = S.length s'}):
Lemma
(requires (forall x y. {:pattern f x y \/ g x y} f x y == g x y))
(ensures (Spec.Loops.(seq_map2 f s s' == seq_map2 g s s')))
(decreases (S.length s))
[ SMTPat (Spec.Loops.seq_map2 f s s'); SMTPat (Spec.Loops.seq_map2 g s s') ]
=
if S.length s = 0 then
()
else
seq_map2_f f g (S.tail s) (S.tail s')
in
assert_norm (words_of_bytes SHA2_256 #(block_word_length SHA2_256) == words_of_bytes SHA2_224 #(block_word_length SHA2_224));
reveal_opaque (`%shuffle) shuffle;
reveal_opaque (`%update) update
#pop-options
#push-options "--fuel 1"
let update_multi_update (a: md_alg) (h: words_state a) (input: bytes_block a): Lemma
(ensures (Spec.Agile.Hash.update_multi a h () input) == (Spec.Agile.Hash.update a h input))
=
let h1 = Spec.Agile.Hash.update_multi a h () input in
assert(h1 == Lib.UpdateMulti.mk_update_multi (block_length a) (Spec.Agile.Hash.update a) h input);
if S.length input = 0 then
begin
assert(h1 == h)
end
else
begin
let block, rem = Lib.UpdateMulti.split_block (block_length a) input 1 in
let h2 = Spec.Agile.Hash.update a h block in
assert(rem `Seq.equal` Seq.empty);
assert(block `Seq.equal` input);
let h3 = Lib.UpdateMulti.mk_update_multi (block_length a) (Spec.Agile.Hash.update a) h2 rem in
assert(h1 == h3)
end
#pop-options
let rec update_multi_224_256 hash blocks =
let a = SHA2_256 in
let a' = SHA2_224 in
assert_norm (words_state a == words_state a');
if S.length blocks = 0 then
begin
assert(blocks `S.equal` S.empty);
Spec.Hash.Lemmas.update_multi_zero a hash;
Spec.Hash.Lemmas.update_multi_zero a' hash
end
else
begin
assert(block_length a = block_length a');
let block1, blocks_end = S.split blocks (block_length a) in
assert(S.length block1 = block_length a);
assert(S.length blocks_end % block_length a = 0);
assert(S.append block1 blocks_end `S.equal` blocks);
update_multi_associative a hash block1 blocks_end;
update_multi_associative a' hash block1 blocks_end;
update_multi_update a hash block1;
update_multi_update a' hash block1;
let hash1 = Spec.Agile.Hash.update a hash block1 in
let hash2 = Spec.Agile.Hash.update a' hash block1 in
update_224_256 hash block1;
assert(hash1 == hash2);
update_multi_224_256 hash1 blocks_end
end | false | false | Spec.SHA2.Lemmas.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val update_last_224_256:
hash:words_state SHA2_256 ->
prevlen:Spec.Hash.Incremental.Definitions.prev_length_t SHA2_256 ->
input:bytes{ (Seq.length input + prevlen) `less_than_max_input_length` SHA2_256 /\
Seq.length input <= block_length SHA2_256 } ->
Lemma
(ensures Spec.Hash.Incremental.Definitions.update_last SHA2_256 hash prevlen input ==
Spec.Hash.Incremental.Definitions.update_last SHA2_224 hash prevlen input) | [] | Spec.SHA2.Lemmas.update_last_224_256 | {
"file_name": "specs/lemmas/Spec.SHA2.Lemmas.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
hash: Spec.Hash.Definitions.words_state Spec.Hash.Definitions.SHA2_256 ->
prevlen: Spec.Hash.Incremental.Definitions.prev_length_t Spec.Hash.Definitions.SHA2_256 ->
input:
Spec.Hash.Definitions.bytes
{ Spec.Hash.Definitions.less_than_max_input_length (FStar.Seq.Base.length input + prevlen)
Spec.Hash.Definitions.SHA2_256 /\
FStar.Seq.Base.length input <=
Spec.Hash.Definitions.block_length Spec.Hash.Definitions.SHA2_256 }
-> FStar.Pervasives.Lemma
(ensures
Spec.Hash.Incremental.Definitions.update_last Spec.Hash.Definitions.SHA2_256
hash
prevlen
input ==
Spec.Hash.Incremental.Definitions.update_last Spec.Hash.Definitions.SHA2_224
hash
prevlen
input) | {
"end_col": 4,
"end_line": 307,
"start_col": 44,
"start_line": 297
} |
Prims.Tot | val va_wp_Loop_rounds_3_7_11_body
(i: nat)
(msg: va_operand_vec_opr)
(in_b: buffer128)
(offset: nat)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (()))) | val va_wp_Loop_rounds_3_7_11_body
(i: nat)
(msg: va_operand_vec_opr)
(in_b: buffer128)
(offset: nat)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Loop_rounds_3_7_11_body
(i: nat)
(msg: va_operand_vec_opr)
(in_b: buffer128)
(offset: nat)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\
(l_and (l_and (0 <= i) (i < 15)) (i `op_Modulus` 4 == 3) /\ msg == i + 1 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 4 va_s0)
in_b
offset
1
(va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\
(forall (va_x_msg: va_value_vec_opr) (va_x_r4: nat64).
let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0) in
va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg ==
Vale.Def.Types_s.reverse_bytes_quad32 (Vale.PPC64LE.Decls.buffer128_read in_b
offset
(va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4 va_sM == va_get_reg 4 va_s0 + 16) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.PPC64LE.Decls.va_operand_vec_opr",
"Vale.PPC64LE.Memory.buffer128",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_vec_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.op_LessThanOrEqual",
"Prims.op_LessThan",
"Prims.eq2",
"Prims.int",
"Prims.op_Modulus",
"Prims.op_Addition",
"Vale.PPC64LE.Decls.validSrcAddrsOffset128",
"Vale.PPC64LE.Decls.va_get_mem_heaplet",
"Vale.PPC64LE.Decls.va_get_reg",
"Vale.PPC64LE.Decls.va_get_mem_layout",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.PPC64LE.Machine_s.pow2_64",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_vec_opr",
"Vale.PPC64LE.Memory.nat64",
"Prims.l_imp",
"Vale.Def.Types_s.quad32",
"Vale.PPC64LE.Decls.va_eval_vec_opr",
"Vale.Def.Types_s.reverse_bytes_quad32",
"Vale.PPC64LE.Decls.buffer128_read",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_reg",
"Vale.PPC64LE.Decls.va_upd_operand_vec_opr"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat) | false | true | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Loop_rounds_3_7_11_body
(i: nat)
(msg: va_operand_vec_opr)
(in_b: buffer128)
(offset: nat)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_3_7_11_body | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
i: Prims.nat ->
msg: Vale.PPC64LE.Decls.va_operand_vec_opr ->
in_b: Vale.PPC64LE.Memory.buffer128 ->
offset: Prims.nat ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 59,
"end_line": 56,
"start_col": 2,
"start_line": 49
} |
Prims.Tot | val va_wp_Loop_rounds_1_3 (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (()))) | val va_wp_Loop_rounds_1_3 (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Loop_rounds_1_3 (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
l_and (l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2))
((va_get_vec 0 va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\
(forall (va_x_v1: quad32) (va_x_v2: quad32) (va_x_v3: quad32).
let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1 va_s0)) in
va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2))
((va_get_vec 3 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.eq2",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words_s.__proj__Mkfour__item__hi2",
"Vale.Def.Types_s.nat32",
"Vale.PPC64LE.Decls.va_get_vec",
"Vale.SHA.PPC64LE.SHA_helpers.ws_opaque",
"Vale.Def.Words_s.__proj__Mkfour__item__lo1",
"Vale.Def.Words_s.__proj__Mkfour__item__lo0",
"Prims.l_Forall",
"Vale.PPC64LE.Memory.quad32",
"Prims.l_imp",
"Vale.Def.Words_s.__proj__Mkfour__item__hi3",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_vec"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : | false | true | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Loop_rounds_1_3 (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_1_3 | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 73,
"end_line": 844,
"start_col": 2,
"start_line": 836
} |
Prims.Tot | val va_wp_Loop_rounds_9_11 (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Loop_rounds_9_11 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 8 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 8 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32)
(va_x_v11:quad32) . let va_sM = va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 10 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) ==> va_k va_sM (()))) | val va_wp_Loop_rounds_9_11 (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Loop_rounds_9_11 (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
l_and (l_and ((va_get_vec 8 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 8 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10))
((va_get_vec 8 va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\
(forall (va_x_v9: quad32) (va_x_v10: quad32) (va_x_v11: quad32).
let va_sM = va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9 va_x_v9 va_s0)) in
va_get_ok va_sM /\
l_and (l_and ((va_get_vec 9 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 10 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10))
((va_get_vec 11 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.eq2",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words_s.__proj__Mkfour__item__hi2",
"Vale.Def.Types_s.nat32",
"Vale.PPC64LE.Decls.va_get_vec",
"Vale.SHA.PPC64LE.SHA_helpers.ws_opaque",
"Vale.Def.Words_s.__proj__Mkfour__item__lo1",
"Vale.Def.Words_s.__proj__Mkfour__item__lo0",
"Prims.l_Forall",
"Vale.PPC64LE.Memory.quad32",
"Prims.l_imp",
"Vale.Def.Words_s.__proj__Mkfour__item__hi3",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_vec"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block))
//--
//-- Loop_rounds_5_7
val va_code_Loop_rounds_5_7 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_5_7 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_5_7 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_5_7 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ va_state_eq va_sM
(va_update_vec 7 va_sM (va_update_vec 6 va_sM (va_update_vec 5 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 4 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 4 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ (forall (va_x_v5:quad32) (va_x_v6:quad32)
(va_x_v7:quad32) . let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 5 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 6 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_5_7 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_5_7 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7;
va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_5_7 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) =
(va_QProc (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_5_7 block) (va_wpProof_Loop_rounds_5_7 block))
//--
//-- Loop_rounds_9_11
val va_code_Loop_rounds_9_11 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_9_11 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_9_11 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_9_11 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 8 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 8 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 9 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 10 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ va_state_eq va_sM
(va_update_vec 11 va_sM (va_update_vec 10 va_sM (va_update_vec 9 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_9_11 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : | false | true | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Loop_rounds_9_11 (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_9_11 | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 74,
"end_line": 926,
"start_col": 2,
"start_line": 918
} |
Prims.Tot | val va_wp_Loop_rounds_5_7 (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 4 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 4 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ (forall (va_x_v5:quad32) (va_x_v6:quad32)
(va_x_v7:quad32) . let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 5 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 6 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==> va_k va_sM (()))) | val va_wp_Loop_rounds_5_7 (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Loop_rounds_5_7 (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
l_and (l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6))
((va_get_vec 4 va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\
(forall (va_x_v5: quad32) (va_x_v6: quad32) (va_x_v7: quad32).
let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5 va_s0)) in
va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6))
((va_get_vec 7 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.eq2",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words_s.__proj__Mkfour__item__hi2",
"Vale.Def.Types_s.nat32",
"Vale.PPC64LE.Decls.va_get_vec",
"Vale.SHA.PPC64LE.SHA_helpers.ws_opaque",
"Vale.Def.Words_s.__proj__Mkfour__item__lo1",
"Vale.Def.Words_s.__proj__Mkfour__item__lo0",
"Prims.l_Forall",
"Vale.PPC64LE.Memory.quad32",
"Prims.l_imp",
"Vale.Def.Words_s.__proj__Mkfour__item__hi3",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_vec"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block))
//--
//-- Loop_rounds_5_7
val va_code_Loop_rounds_5_7 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_5_7 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_5_7 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_5_7 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ va_state_eq va_sM
(va_update_vec 7 va_sM (va_update_vec 6 va_sM (va_update_vec 5 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : | false | true | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Loop_rounds_5_7 (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_5_7 | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 73,
"end_line": 885,
"start_col": 2,
"start_line": 877
} |
Prims.Tot | val va_wp_Loop_rounds_13_15 (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Loop_rounds_13_15 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 12 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 12 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ (forall (va_x_v13:quad32) (va_x_v14:quad32)
(va_x_v15:quad32) . let va_sM = va_upd_vec 15 va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13
va_x_v13 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 13 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 14 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) ==> va_k va_sM (()))) | val va_wp_Loop_rounds_13_15 (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Loop_rounds_13_15 (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
l_and (l_and ((va_get_vec 12 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 12 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14))
((va_get_vec 12 va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\
(forall (va_x_v13: quad32) (va_x_v14: quad32) (va_x_v15: quad32).
let va_sM = va_upd_vec 15 va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13 va_x_v13 va_s0)) in
va_get_ok va_sM /\
l_and (l_and ((va_get_vec 13 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 14 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14))
((va_get_vec 15 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.eq2",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words_s.__proj__Mkfour__item__hi2",
"Vale.Def.Types_s.nat32",
"Vale.PPC64LE.Decls.va_get_vec",
"Vale.SHA.PPC64LE.SHA_helpers.ws_opaque",
"Vale.Def.Words_s.__proj__Mkfour__item__lo1",
"Vale.Def.Words_s.__proj__Mkfour__item__lo0",
"Prims.l_Forall",
"Vale.PPC64LE.Memory.quad32",
"Prims.l_imp",
"Vale.Def.Words_s.__proj__Mkfour__item__hi3",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_vec"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block))
//--
//-- Loop_rounds_5_7
val va_code_Loop_rounds_5_7 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_5_7 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_5_7 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_5_7 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ va_state_eq va_sM
(va_update_vec 7 va_sM (va_update_vec 6 va_sM (va_update_vec 5 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 4 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 4 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ (forall (va_x_v5:quad32) (va_x_v6:quad32)
(va_x_v7:quad32) . let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 5 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 6 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_5_7 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_5_7 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7;
va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_5_7 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) =
(va_QProc (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_5_7 block) (va_wpProof_Loop_rounds_5_7 block))
//--
//-- Loop_rounds_9_11
val va_code_Loop_rounds_9_11 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_9_11 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_9_11 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_9_11 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 8 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 8 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 9 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 10 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ va_state_eq va_sM
(va_update_vec 11 va_sM (va_update_vec 10 va_sM (va_update_vec 9 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_9_11 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 8 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 8 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32)
(va_x_v11:quad32) . let va_sM = va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 10 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_9_11 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_9_11 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11;
va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_9_11 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ())) =
(va_QProc (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9])
(va_wp_Loop_rounds_9_11 block) (va_wpProof_Loop_rounds_9_11 block))
//--
//-- Loop_rounds_13_15
val va_code_Loop_rounds_13_15 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_13_15 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_13_15 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_13_15 ()) va_s0 /\ va_get_ok va_s0 /\
l_and (l_and ((va_get_vec 12 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 12 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 13 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 14 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ va_state_eq va_sM
(va_update_vec 15 va_sM (va_update_vec 14 va_sM (va_update_vec 13 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_13_15 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : | false | true | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Loop_rounds_13_15 (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_13_15 | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 74,
"end_line": 968,
"start_col": 2,
"start_line": 960
} |
Prims.Tot | val va_wp_Loop_rounds_60_63_a (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Loop_rounds_60_63_a (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 48) ((va_get_vec 6 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 54)) ((va_get_vec 7 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 55)) ((va_get_vec 8 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 56)) ((va_get_vec 11 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 59)) ((va_get_vec 12 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 60)) ((va_get_vec 13 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 45)) ((va_get_vec 14 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 46)) ((va_get_vec 15 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 47) /\ (forall (va_x_v13:quad32) (va_x_v14:quad32)
(va_x_v15:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26
(va_upd_vec 25 va_x_v25 (va_upd_vec 15 va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13 va_x_v13
va_s0)))) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 13 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61) ((va_get_vec 14 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) ==> va_k va_sM (()))) | val va_wp_Loop_rounds_60_63_a (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Loop_rounds_60_63_a (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 48)
((va_get_vec 6 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 54))
((va_get_vec 7 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 55))
((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 56
))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 59))
((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 60))
((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 45))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 46))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 47) /\
(forall (va_x_v13: quad32)
(va_x_v14: quad32)
(va_x_v15: quad32)
(va_x_v25: quad32)
(va_x_v26: quad32).
let va_sM =
va_upd_vec 26
va_x_v26
(va_upd_vec 25
va_x_v25
(va_upd_vec 15 va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13 va_x_v13 va_s0))))
in
va_get_ok va_sM /\
l_and (l_and ((va_get_vec 13 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61)
((va_get_vec 14 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62))
((va_get_vec 15 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.eq2",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words_s.__proj__Mkfour__item__hi3",
"Vale.Def.Types_s.nat32",
"Vale.PPC64LE.Decls.va_get_vec",
"Vale.SHA.PPC64LE.SHA_helpers.ws_opaque",
"Prims.l_Forall",
"Vale.PPC64LE.Memory.quad32",
"Prims.l_imp",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_vec"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block))
//--
//-- Loop_rounds_5_7
val va_code_Loop_rounds_5_7 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_5_7 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_5_7 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_5_7 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ va_state_eq va_sM
(va_update_vec 7 va_sM (va_update_vec 6 va_sM (va_update_vec 5 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 4 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 4 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ (forall (va_x_v5:quad32) (va_x_v6:quad32)
(va_x_v7:quad32) . let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 5 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 6 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_5_7 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_5_7 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7;
va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_5_7 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) =
(va_QProc (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_5_7 block) (va_wpProof_Loop_rounds_5_7 block))
//--
//-- Loop_rounds_9_11
val va_code_Loop_rounds_9_11 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_9_11 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_9_11 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_9_11 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 8 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 8 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 9 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 10 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ va_state_eq va_sM
(va_update_vec 11 va_sM (va_update_vec 10 va_sM (va_update_vec 9 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_9_11 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 8 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 8 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32)
(va_x_v11:quad32) . let va_sM = va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 10 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_9_11 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_9_11 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11;
va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_9_11 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ())) =
(va_QProc (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9])
(va_wp_Loop_rounds_9_11 block) (va_wpProof_Loop_rounds_9_11 block))
//--
//-- Loop_rounds_13_15
val va_code_Loop_rounds_13_15 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_13_15 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_13_15 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_13_15 ()) va_s0 /\ va_get_ok va_s0 /\
l_and (l_and ((va_get_vec 12 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 12 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 13 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 14 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ va_state_eq va_sM
(va_update_vec 15 va_sM (va_update_vec 14 va_sM (va_update_vec 13 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_13_15 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 12 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 12 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ (forall (va_x_v13:quad32) (va_x_v14:quad32)
(va_x_v15:quad32) . let va_sM = va_upd_vec 15 va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13
va_x_v13 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 13 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 14 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_13_15 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_13_15 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15;
va_Mod_vec 14; va_Mod_vec 13]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_13_15 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_13_15 ()))
=
(va_QProc (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13])
(va_wp_Loop_rounds_13_15 block) (va_wpProof_Loop_rounds_13_15 block))
//--
//-- Loop_rounds_16_59_a
val va_code_Loop_rounds_16_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i) ((va_get_vec 1 va_s0).hi3
== ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4 va_s0).hi3 == ws_opaque
block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 10
va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 5)))
((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec 13 va_s0).hi3 == ws_opaque
block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 1)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 2
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 4 va_sM (va_update_vec 3 va_sM (va_update_vec 2
va_sM (va_update_vec 1 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_a (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i)
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque
block (i - 14))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4
va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i -
11))) ((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 ==
ws_opaque block (i - 5))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec
13 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i -
1))) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32) (va_x_v3:quad32) (va_x_v4:quad32)
(va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25
va_x_v25 (va_upd_vec 4 va_x_v4 (va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1
va_x_v1 va_s0))))) in va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
ws_opaque block (i + 1)) ((va_get_vec 2 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3
va_sM).hi3 == ws_opaque block (i + 3))) ((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4))
==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_a : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_a i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 4; va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_a (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_a i)) =
(va_QProc (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 4;
va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) (va_wp_Loop_rounds_16_59_a i block)
(va_wpProof_Loop_rounds_16_59_a i block))
//--
//-- Loop_rounds_16_59_b
val va_code_Loop_rounds_16_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 20) (i == 36)) (i == 52) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 4)) ((va_get_vec 1
va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 1)))
((va_get_vec 4 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 5 va_s0).hi3 == ws_opaque block
(i - 15))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14))) ((va_get_vec 7 va_s0).hi3 ==
ws_opaque block (i - 13))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec
9 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 14 va_s0).hi3 == ws_opaque block (i -
6))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 6
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 7 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 8 va_sM (va_update_vec 7 va_sM (va_update_vec 6
va_sM (va_update_vec 5 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_b (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 20) (i == 36)) (i == 52) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 4))
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 3 va_s0).hi3 == ws_opaque
block (i - 1))) ((va_get_vec 4 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 5 va_s0).hi3 ==
ws_opaque block (i - 15))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14))) ((va_get_vec
7 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i -
12))) ((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 14 va_s0).hi3 ==
ws_opaque block (i - 6))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5))) /\ (forall
(va_x_v5:quad32) (va_x_v6:quad32) (va_x_v7:quad32) (va_x_v8:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 8
va_x_v8 (va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5 va_s0))))) in
va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1))
((va_get_vec 6 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 7 va_sM).hi3 == ws_opaque
block (i + 3))) ((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_b : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_b i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_b i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 8; va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_b (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_b i)) =
(va_QProc (va_code_Loop_rounds_16_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 8;
va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5]) (va_wp_Loop_rounds_16_59_b i block)
(va_wpProof_Loop_rounds_16_59_b i block))
//--
//-- Loop_rounds_16_59_c
val va_code_Loop_rounds_16_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 24) (i == 40)) (i == 56) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 6)) ((va_get_vec 3
va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 4 va_s0).hi3 == ws_opaque block (i - 4)))
((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 7 va_s0).hi3 == ws_opaque
block (i - 1))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 9 va_s0).hi3 ==
ws_opaque block (i - 15))) ((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 12 va_s0).hi3 ==
ws_opaque block (i - 12))) ((va_get_vec 13 va_s0).hi3 == ws_opaque block (i - 11)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 9 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 10
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 11 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 12 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 12 va_sM (va_update_vec 11 va_sM (va_update_vec 10
va_sM (va_update_vec 9 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_c (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 24) (i == 40)) (i == 56) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 6))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 4 va_s0).hi3 == ws_opaque
block (i - 4))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 7
va_s0).hi3 == ws_opaque block (i - 1))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block i))
((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 10 va_s0).hi3 == ws_opaque
block (i - 14))) ((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 12
va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec 13 va_s0).hi3 == ws_opaque block (i -
11))) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32) (va_x_v11:quad32) (va_x_v12:quad32)
(va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25
va_x_v25 (va_upd_vec 12 va_x_v12 (va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0))))) in va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
ws_opaque block (i + 1)) ((va_get_vec 10 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec
11 va_sM).hi3 == ws_opaque block (i + 3))) ((va_get_vec 12 va_sM).hi3 == ws_opaque block (i +
4)) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_c : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_c i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_c i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 12; va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k
((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_c (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_c i)) =
(va_QProc (va_code_Loop_rounds_16_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 12;
va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9]) (va_wp_Loop_rounds_16_59_c i block)
(va_wpProof_Loop_rounds_16_59_c i block))
//--
//-- Loop_rounds_16_59_d
val va_code_Loop_rounds_16_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (i == 28) (i == 44) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 12)) ((va_get_vec 1 va_s0).hi3 ==
ws_opaque block (i - 11))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec
7 va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i -
4))) ((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 11 va_s0).hi3 ==
ws_opaque block (i - 1))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 13
va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 14 va_s0).hi3 == ws_opaque block (i -
14))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 13)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 0 va_sM).hi3 == ws_opaque block (i + 4)) ((va_get_vec 13
va_sM).hi3 == ws_opaque block (i + 1))) ((va_get_vec 14 va_sM).hi3 == ws_opaque block (i + 2)))
((va_get_vec 15 va_sM).hi3 == ws_opaque block (i + 3)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 15 va_sM (va_update_vec 14 va_sM (va_update_vec 13
va_sM (va_update_vec 0 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_d (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (i == 28) (i == 44) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 12)) ((va_get_vec 1
va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 6)))
((va_get_vec 7 va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 8 va_s0).hi3 == ws_opaque
block (i - 4))) ((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 11
va_s0).hi3 == ws_opaque block (i - 1))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block i))
((va_get_vec 13 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 14 va_s0).hi3 ==
ws_opaque block (i - 14))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 13))) /\ (forall
(va_x_v0:quad32) (va_x_v13:quad32) (va_x_v14:quad32) (va_x_v15:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 15
va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13 va_x_v13 (va_upd_vec 0 va_x_v0 va_s0))))) in
va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 0 va_sM).hi3 == ws_opaque block (i + 4))
((va_get_vec 13 va_sM).hi3 == ws_opaque block (i + 1))) ((va_get_vec 14 va_sM).hi3 == ws_opaque
block (i + 2))) ((va_get_vec 15 va_sM).hi3 == ws_opaque block (i + 3)) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_d : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_d i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_d i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13; va_Mod_vec 0]) va_s0 va_k
((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_d (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_d i)) =
(va_QProc (va_code_Loop_rounds_16_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 15;
va_Mod_vec 14; va_Mod_vec 13; va_Mod_vec 0]) (va_wp_Loop_rounds_16_59_d i block)
(va_wpProof_Loop_rounds_16_59_d i block))
//--
//-- Loop_rounds_60_63_a
val va_code_Loop_rounds_60_63_a : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_a : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_a : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_a ()) va_s0 /\ va_get_ok va_s0 /\
l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 48) ((va_get_vec 6 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 54)) ((va_get_vec 7 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 55)) ((va_get_vec 8 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 56)) ((va_get_vec 11 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 59)) ((va_get_vec 12 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 60)) ((va_get_vec 13 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 45)) ((va_get_vec 14 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 46)) ((va_get_vec 15 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 47)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 13 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61)
((va_get_vec 14 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 15 va_sM (va_update_vec 14 va_sM
(va_update_vec 13 va_sM (va_update_ok va_sM va_s0))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_a (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : | false | true | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Loop_rounds_60_63_a (block: block_w) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_60_63_a | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 74,
"end_line": 1247,
"start_col": 2,
"start_line": 1232
} |
Prims.Tot | val va_quick_Loop_rounds_3_7_11_body
(i: nat)
(msg: va_operand_vec_opr)
(in_b: buffer128)
(offset: nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset)) | val va_quick_Loop_rounds_3_7_11_body
(i: nat)
(msg: va_operand_vec_opr)
(in_b: buffer128)
(offset: nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg))
let va_quick_Loop_rounds_3_7_11_body
(i: nat)
(msg: va_operand_vec_opr)
(in_b: buffer128)
(offset: nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) = | false | null | false | (va_QProc (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset)
(va_wpProof_Loop_rounds_3_7_11_body i msg in_b offset)) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.PPC64LE.Decls.va_operand_vec_opr",
"Vale.PPC64LE.Memory.buffer128",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_3_7_11_body",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_reg",
"Vale.PPC64LE.QuickCode.va_mod_vec_opr",
"Prims.Nil",
"Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_3_7_11_body",
"Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_3_7_11_body",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat) | false | false | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Loop_rounds_3_7_11_body
(i: nat)
(msg: va_operand_vec_opr)
(in_b: buffer128)
(offset: nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) | [] | Vale.SHA.PPC64LE.Rounds.Core.va_quick_Loop_rounds_3_7_11_body | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
i: Prims.nat ->
msg: Vale.PPC64LE.Decls.va_operand_vec_opr ->
in_b: Vale.PPC64LE.Memory.buffer128 ->
offset: Prims.nat
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_3_7_11_body i msg) | {
"end_col": 17,
"end_line": 69,
"start_col": 2,
"start_line": 67
} |
Prims.Tot | val va_quick_Loop_rounds_16_63_body
(i: nat)
(msg0 msg1 msg2 msg3: va_operand_vec_opr)
(block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)) | val va_quick_Loop_rounds_16_63_body
(i: nat)
(msg0 msg1 msg2 msg3: va_operand_vec_opr)
(block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3))
let va_quick_Loop_rounds_16_63_body
(i: nat)
(msg0 msg1 msg2 msg3: va_operand_vec_opr)
(block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) = | false | null | false | (va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)
([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0])
(va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.PPC64LE.Decls.va_operand_vec_opr",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_16_63_body",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_vec",
"Vale.PPC64LE.QuickCode.va_mod_vec_opr",
"Prims.Nil",
"Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_16_63_body",
"Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_16_63_body",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit | false | false | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Loop_rounds_16_63_body
(i: nat)
(msg0 msg1 msg2 msg3: va_operand_vec_opr)
(block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) | [] | Vale.SHA.PPC64LE.Rounds.Core.va_quick_Loop_rounds_16_63_body | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
i: Prims.nat ->
msg0: Vale.PPC64LE.Decls.va_operand_vec_opr ->
msg1: Vale.PPC64LE.Decls.va_operand_vec_opr ->
msg2: Vale.PPC64LE.Decls.va_operand_vec_opr ->
msg3: Vale.PPC64LE.Decls.va_operand_vec_opr ->
block: Vale.SHA.PPC64LE.SHA_helpers.block_w
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) | {
"end_col": 68,
"end_line": 129,
"start_col": 2,
"start_line": 127
} |
Prims.Tot | val va_quick_Loop_rounds_0_59_c (i: nat) (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_0_59_c i)) | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig)) | val va_quick_Loop_rounds_0_59_c (i: nat) (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_0_59_c i))
let va_quick_Loop_rounds_0_59_c (i: nat) (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_0_59_c i)) = | false | null | false | (va_QProc (va_code_Loop_rounds_0_59_c i)
([
va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21;
va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6
])
(va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig)) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.PPC64LE.Memory.buffer128",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.SHA.PPC64LE.SHA_helpers.hash256",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_0_59_c",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_vec",
"Vale.PPC64LE.QuickCode.va_Mod_reg",
"Prims.Nil",
"Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_0_59_c",
"Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_0_59_c",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) : | false | false | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Loop_rounds_0_59_c (i: nat) (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_0_59_c i)) | [] | Vale.SHA.PPC64LE.Rounds.Core.va_quick_Loop_rounds_0_59_c | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
i: Prims.nat ->
k_b: Vale.PPC64LE.Memory.buffer128 ->
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
hash_orig: Vale.SHA.PPC64LE.SHA_helpers.hash256
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_0_59_c i) | {
"end_col": 58,
"end_line": 564,
"start_col": 2,
"start_line": 561
} |
Prims.Tot | val va_quick_Loop_rounds_0_59_a (i: nat) (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_0_59_a i)) | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig)) | val va_quick_Loop_rounds_0_59_a (i: nat) (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_0_59_a i))
let va_quick_Loop_rounds_0_59_a (i: nat) (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_0_59_a i)) = | false | null | false | (va_QProc (va_code_Loop_rounds_0_59_a i)
([
va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21;
va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6
])
(va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig)) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.PPC64LE.Memory.buffer128",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.SHA.PPC64LE.SHA_helpers.hash256",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_0_59_a",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_vec",
"Vale.PPC64LE.QuickCode.va_Mod_reg",
"Prims.Nil",
"Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_0_59_a",
"Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_0_59_a",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) : | false | false | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Loop_rounds_0_59_a (i: nat) (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_0_59_a i)) | [] | Vale.SHA.PPC64LE.Rounds.Core.va_quick_Loop_rounds_0_59_a | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
i: Prims.nat ->
k_b: Vale.PPC64LE.Memory.buffer128 ->
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
hash_orig: Vale.SHA.PPC64LE.SHA_helpers.hash256
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_0_59_a i) | {
"end_col": 58,
"end_line": 274,
"start_col": 2,
"start_line": 271
} |
Prims.Tot | val va_wp_Loop_rounds_16_63_body
(i: nat)
(msg0 msg1 msg2 msg3: va_operand_vec_opr)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (()))) | val va_wp_Loop_rounds_16_63_body
(i: nat)
(msg0 msg1 msg2 msg3: va_operand_vec_opr)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Loop_rounds_16_63_body
(i: nat)
(msg0 msg1 msg2 msg3: va_operand_vec_opr)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\
(l_and (16 <= i) (i < 64) /\
(let j = i `op_Modulus` 16 in
msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus` 16 /\
msg3 == (j + 14) `op_Modulus` 16 /\
(va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block (i - 16) /\
(va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\
(va_eval_vec_opr va_s0 msg2).hi3 == ws_opaque block (i - 7) /\
(va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque block (i - 2))) /\
(forall (va_x_msg0: va_value_vec_opr) (va_x_v25: quad32) (va_x_v26: quad32).
let va_sM =
va_upd_vec 26
va_x_v26
(va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0 va_x_msg0 va_s0))
in
va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in
let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in
(va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1)
(ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.PPC64LE.Decls.va_operand_vec_opr",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_vec_opr",
"Vale.PPC64LE.Decls.va_is_src_vec_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.op_LessThanOrEqual",
"Prims.op_LessThan",
"Prims.eq2",
"Prims.int",
"Prims.op_Modulus",
"Prims.op_Addition",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words_s.__proj__Mkfour__item__hi3",
"Vale.Def.Types_s.nat32",
"Vale.PPC64LE.Decls.va_eval_vec_opr",
"Vale.SHA.PPC64LE.SHA_helpers.ws_opaque",
"Prims.op_Subtraction",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_vec_opr",
"Vale.PPC64LE.Memory.quad32",
"Prims.l_imp",
"Vale.Arch.Types.add_wrap32",
"Vale.SHA2.Wrapper.sigma256_0_1",
"Vale.SHA2.Wrapper.sigma256_0_0",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_vec",
"Vale.PPC64LE.Decls.va_upd_operand_vec_opr"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state) | false | true | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Loop_rounds_16_63_body
(i: nat)
(msg0 msg1 msg2 msg3: va_operand_vec_opr)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_16_63_body | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
i: Prims.nat ->
msg0: Vale.PPC64LE.Decls.va_operand_vec_opr ->
msg1: Vale.PPC64LE.Decls.va_operand_vec_opr ->
msg2: Vale.PPC64LE.Decls.va_operand_vec_opr ->
msg3: Vale.PPC64LE.Decls.va_operand_vec_opr ->
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 92,
"end_line": 112,
"start_col": 2,
"start_line": 101
} |
Prims.Tot | val va_quick_Loop_rounds_0_59_d (i: nat) (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_0_59_d i)) | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig)) | val va_quick_Loop_rounds_0_59_d (i: nat) (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_0_59_d i))
let va_quick_Loop_rounds_0_59_d (i: nat) (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_0_59_d i)) = | false | null | false | (va_QProc (va_code_Loop_rounds_0_59_d i)
([
va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21;
va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6
])
(va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig)) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.PPC64LE.Memory.buffer128",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.SHA.PPC64LE.SHA_helpers.hash256",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_0_59_d",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_vec",
"Vale.PPC64LE.QuickCode.va_Mod_reg",
"Prims.Nil",
"Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_0_59_d",
"Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_0_59_d",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) : | false | false | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Loop_rounds_0_59_d (i: nat) (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_0_59_d i)) | [] | Vale.SHA.PPC64LE.Rounds.Core.va_quick_Loop_rounds_0_59_d | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
i: Prims.nat ->
k_b: Vale.PPC64LE.Memory.buffer128 ->
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
hash_orig: Vale.SHA.PPC64LE.SHA_helpers.hash256
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_0_59_d i) | {
"end_col": 58,
"end_line": 709,
"start_col": 2,
"start_line": 706
} |
Prims.Tot | val va_quick_Loop_rounds_0_59_b (i: nat) (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_0_59_b i)) | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig)) | val va_quick_Loop_rounds_0_59_b (i: nat) (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_0_59_b i))
let va_quick_Loop_rounds_0_59_b (i: nat) (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_0_59_b i)) = | false | null | false | (va_QProc (va_code_Loop_rounds_0_59_b i)
([
va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21;
va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6
])
(va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig)) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.PPC64LE.Memory.buffer128",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.SHA.PPC64LE.SHA_helpers.hash256",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_0_59_b",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_vec",
"Vale.PPC64LE.QuickCode.va_Mod_reg",
"Prims.Nil",
"Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_0_59_b",
"Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_0_59_b",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) : | false | false | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Loop_rounds_0_59_b (i: nat) (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_0_59_b i)) | [] | Vale.SHA.PPC64LE.Rounds.Core.va_quick_Loop_rounds_0_59_b | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
i: Prims.nat ->
k_b: Vale.PPC64LE.Memory.buffer128 ->
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
hash_orig: Vale.SHA.PPC64LE.SHA_helpers.hash256
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_0_59_b i) | {
"end_col": 58,
"end_line": 419,
"start_col": 2,
"start_line": 416
} |
Prims.Tot | val va_quick_Loop_rounds_9_11 (block: block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ())) | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Loop_rounds_9_11 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ())) =
(va_QProc (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9])
(va_wp_Loop_rounds_9_11 block) (va_wpProof_Loop_rounds_9_11 block)) | val va_quick_Loop_rounds_9_11 (block: block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ()))
let va_quick_Loop_rounds_9_11 (block: block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ())) = | false | null | false | (va_QProc (va_code_Loop_rounds_9_11 ())
([va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9])
(va_wp_Loop_rounds_9_11 block)
(va_wpProof_Loop_rounds_9_11 block)) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_9_11",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_vec",
"Prims.Nil",
"Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_9_11",
"Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_9_11",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block))
//--
//-- Loop_rounds_5_7
val va_code_Loop_rounds_5_7 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_5_7 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_5_7 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_5_7 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ va_state_eq va_sM
(va_update_vec 7 va_sM (va_update_vec 6 va_sM (va_update_vec 5 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 4 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 4 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ (forall (va_x_v5:quad32) (va_x_v6:quad32)
(va_x_v7:quad32) . let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 5 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 6 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_5_7 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_5_7 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7;
va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_5_7 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) =
(va_QProc (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_5_7 block) (va_wpProof_Loop_rounds_5_7 block))
//--
//-- Loop_rounds_9_11
val va_code_Loop_rounds_9_11 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_9_11 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_9_11 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_9_11 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 8 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 8 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 9 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 10 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ va_state_eq va_sM
(va_update_vec 11 va_sM (va_update_vec 10 va_sM (va_update_vec 9 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_9_11 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 8 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 8 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32)
(va_x_v11:quad32) . let va_sM = va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 10 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_9_11 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_9_11 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11;
va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr] | false | false | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Loop_rounds_9_11 (block: block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ())) | [] | Vale.SHA.PPC64LE.Rounds.Core.va_quick_Loop_rounds_9_11 | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | block: Vale.SHA.PPC64LE.SHA_helpers.block_w
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_9_11 ()) | {
"end_col": 71,
"end_line": 937,
"start_col": 2,
"start_line": 936
} |
Prims.Tot | val va_quick_Loop_rounds_60_63_b (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_60_63_b ())) | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig)) | val va_quick_Loop_rounds_60_63_b (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_60_63_b ()))
let va_quick_Loop_rounds_60_63_b (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_60_63_b ())) = | false | null | false | (va_QProc (va_code_Loop_rounds_60_63_b ())
([
va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21;
va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6
])
(va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig)) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Memory.buffer128",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.SHA.PPC64LE.SHA_helpers.hash256",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_60_63_b",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_vec",
"Vale.PPC64LE.QuickCode.va_Mod_reg",
"Prims.Nil",
"Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_60_63_b",
"Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_60_63_b",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) : | false | false | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Loop_rounds_60_63_b (k_b: buffer128) (block: block_w) (hash_orig: hash256)
: (va_quickCode unit (va_code_Loop_rounds_60_63_b ())) | [] | Vale.SHA.PPC64LE.Rounds.Core.va_quick_Loop_rounds_60_63_b | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
k_b: Vale.PPC64LE.Memory.buffer128 ->
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
hash_orig: Vale.SHA.PPC64LE.SHA_helpers.hash256
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_60_63_b ()) | {
"end_col": 57,
"end_line": 813,
"start_col": 2,
"start_line": 810
} |
Prims.Tot | val va_quick_Loop_rounds_1_3 (block: block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block)) | val va_quick_Loop_rounds_1_3 (block: block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ()))
let va_quick_Loop_rounds_1_3 (block: block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) = | false | null | false | (va_QProc (va_code_Loop_rounds_1_3 ())
([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block)
(va_wpProof_Loop_rounds_1_3 block)) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_1_3",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_vec",
"Prims.Nil",
"Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_1_3",
"Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_1_3",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr] | false | false | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Loop_rounds_1_3 (block: block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) | [] | Vale.SHA.PPC64LE.Rounds.Core.va_quick_Loop_rounds_1_3 | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | block: Vale.SHA.PPC64LE.SHA_helpers.block_w
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_1_3 ()) | {
"end_col": 69,
"end_line": 854,
"start_col": 2,
"start_line": 853
} |
Prims.Tot | val va_quick_Loop_rounds_5_7 (block: block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Loop_rounds_5_7 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) =
(va_QProc (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_5_7 block) (va_wpProof_Loop_rounds_5_7 block)) | val va_quick_Loop_rounds_5_7 (block: block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ()))
let va_quick_Loop_rounds_5_7 (block: block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) = | false | null | false | (va_QProc (va_code_Loop_rounds_5_7 ())
([va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_5_7 block)
(va_wpProof_Loop_rounds_5_7 block)) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_5_7",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_vec",
"Prims.Nil",
"Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_5_7",
"Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_5_7",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block))
//--
//-- Loop_rounds_5_7
val va_code_Loop_rounds_5_7 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_5_7 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_5_7 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_5_7 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ va_state_eq va_sM
(va_update_vec 7 va_sM (va_update_vec 6 va_sM (va_update_vec 5 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 4 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 4 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ (forall (va_x_v5:quad32) (va_x_v6:quad32)
(va_x_v7:quad32) . let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 5 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 6 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_5_7 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_5_7 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7;
va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr] | false | false | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Loop_rounds_5_7 (block: block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) | [] | Vale.SHA.PPC64LE.Rounds.Core.va_quick_Loop_rounds_5_7 | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | block: Vale.SHA.PPC64LE.SHA_helpers.block_w
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_5_7 ()) | {
"end_col": 69,
"end_line": 895,
"start_col": 2,
"start_line": 894
} |
Prims.Tot | val va_quick_Loop_rounds_13_15 (block: block_w) : (va_quickCode unit (va_code_Loop_rounds_13_15 ())) | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Loop_rounds_13_15 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_13_15 ()))
=
(va_QProc (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13])
(va_wp_Loop_rounds_13_15 block) (va_wpProof_Loop_rounds_13_15 block)) | val va_quick_Loop_rounds_13_15 (block: block_w) : (va_quickCode unit (va_code_Loop_rounds_13_15 ()))
let va_quick_Loop_rounds_13_15 (block: block_w) : (va_quickCode unit (va_code_Loop_rounds_13_15 ())) = | false | null | false | (va_QProc (va_code_Loop_rounds_13_15 ())
([va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13])
(va_wp_Loop_rounds_13_15 block)
(va_wpProof_Loop_rounds_13_15 block)) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_13_15",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_vec",
"Prims.Nil",
"Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_13_15",
"Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_13_15",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block))
//--
//-- Loop_rounds_5_7
val va_code_Loop_rounds_5_7 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_5_7 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_5_7 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_5_7 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ va_state_eq va_sM
(va_update_vec 7 va_sM (va_update_vec 6 va_sM (va_update_vec 5 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 4 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 4 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ (forall (va_x_v5:quad32) (va_x_v6:quad32)
(va_x_v7:quad32) . let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 5 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 6 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_5_7 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_5_7 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7;
va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_5_7 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) =
(va_QProc (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_5_7 block) (va_wpProof_Loop_rounds_5_7 block))
//--
//-- Loop_rounds_9_11
val va_code_Loop_rounds_9_11 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_9_11 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_9_11 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_9_11 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 8 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 8 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 9 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 10 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ va_state_eq va_sM
(va_update_vec 11 va_sM (va_update_vec 10 va_sM (va_update_vec 9 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_9_11 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 8 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 8 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32)
(va_x_v11:quad32) . let va_sM = va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 10 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_9_11 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_9_11 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11;
va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_9_11 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ())) =
(va_QProc (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9])
(va_wp_Loop_rounds_9_11 block) (va_wpProof_Loop_rounds_9_11 block))
//--
//-- Loop_rounds_13_15
val va_code_Loop_rounds_13_15 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_13_15 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_13_15 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_13_15 ()) va_s0 /\ va_get_ok va_s0 /\
l_and (l_and ((va_get_vec 12 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 12 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 13 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 14 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ va_state_eq va_sM
(va_update_vec 15 va_sM (va_update_vec 14 va_sM (va_update_vec 13 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_13_15 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 12 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 12 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ (forall (va_x_v13:quad32) (va_x_v14:quad32)
(va_x_v15:quad32) . let va_sM = va_upd_vec 15 va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13
va_x_v13 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 13 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 14 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_13_15 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_13_15 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15;
va_Mod_vec 14; va_Mod_vec 13]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_13_15 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_13_15 ())) | false | false | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Loop_rounds_13_15 (block: block_w) : (va_quickCode unit (va_code_Loop_rounds_13_15 ())) | [] | Vale.SHA.PPC64LE.Rounds.Core.va_quick_Loop_rounds_13_15 | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | block: Vale.SHA.PPC64LE.SHA_helpers.block_w
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_13_15 ()) | {
"end_col": 73,
"end_line": 980,
"start_col": 2,
"start_line": 979
} |
Prims.Tot | val va_wp_Loop_rounds_16_59_a
(i: nat)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Loop_rounds_16_59_a (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i)
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque
block (i - 14))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4
va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i -
11))) ((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 ==
ws_opaque block (i - 5))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec
13 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i -
1))) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32) (va_x_v3:quad32) (va_x_v4:quad32)
(va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25
va_x_v25 (va_upd_vec 4 va_x_v4 (va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1
va_x_v1 va_s0))))) in va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
ws_opaque block (i + 1)) ((va_get_vec 2 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3
va_sM).hi3 == ws_opaque block (i + 3))) ((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4))
==> va_k va_sM (()))) | val va_wp_Loop_rounds_16_59_a
(i: nat)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Loop_rounds_16_59_a
(i: nat)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(l_or (l_or (i == 16) (i == 32)) (i == 48) /\
l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 ==
ws_opaque block i)
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 15)))
((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13)))
((va_get_vec 4 va_s0).hi3 == ws_opaque block (i - 12)))
((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 11)))
((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 6)))
((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 5)))
((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4)))
((va_get_vec 13 va_s0).hi3 == ws_opaque block (i - 3)))
((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 1))) /\
(forall (va_x_v1: quad32)
(va_x_v2: quad32)
(va_x_v3: quad32)
(va_x_v4: quad32)
(va_x_v25: quad32)
(va_x_v26: quad32).
let va_sM =
va_upd_vec 26
va_x_v26
(va_upd_vec 25
va_x_v25
(va_upd_vec 4
va_x_v4
(va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1 va_s0)))))
in
va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 == ws_opaque block (i + 1))
((va_get_vec 2 va_sM).hi3 == ws_opaque block (i + 2)))
((va_get_vec 3 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4)) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_or",
"Prims.eq2",
"Prims.int",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words_s.__proj__Mkfour__item__hi3",
"Vale.Def.Types_s.nat32",
"Vale.PPC64LE.Decls.va_get_vec",
"Vale.SHA.PPC64LE.SHA_helpers.ws_opaque",
"Prims.op_Subtraction",
"Prims.l_Forall",
"Vale.PPC64LE.Memory.quad32",
"Prims.l_imp",
"Prims.op_Addition",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_vec"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block))
//--
//-- Loop_rounds_5_7
val va_code_Loop_rounds_5_7 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_5_7 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_5_7 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_5_7 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ va_state_eq va_sM
(va_update_vec 7 va_sM (va_update_vec 6 va_sM (va_update_vec 5 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 4 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 4 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ (forall (va_x_v5:quad32) (va_x_v6:quad32)
(va_x_v7:quad32) . let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 5 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 6 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_5_7 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_5_7 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7;
va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_5_7 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) =
(va_QProc (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_5_7 block) (va_wpProof_Loop_rounds_5_7 block))
//--
//-- Loop_rounds_9_11
val va_code_Loop_rounds_9_11 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_9_11 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_9_11 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_9_11 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 8 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 8 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 9 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 10 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ va_state_eq va_sM
(va_update_vec 11 va_sM (va_update_vec 10 va_sM (va_update_vec 9 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_9_11 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 8 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 8 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32)
(va_x_v11:quad32) . let va_sM = va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 10 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_9_11 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_9_11 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11;
va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_9_11 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ())) =
(va_QProc (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9])
(va_wp_Loop_rounds_9_11 block) (va_wpProof_Loop_rounds_9_11 block))
//--
//-- Loop_rounds_13_15
val va_code_Loop_rounds_13_15 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_13_15 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_13_15 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_13_15 ()) va_s0 /\ va_get_ok va_s0 /\
l_and (l_and ((va_get_vec 12 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 12 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 13 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 14 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ va_state_eq va_sM
(va_update_vec 15 va_sM (va_update_vec 14 va_sM (va_update_vec 13 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_13_15 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 12 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 12 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ (forall (va_x_v13:quad32) (va_x_v14:quad32)
(va_x_v15:quad32) . let va_sM = va_upd_vec 15 va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13
va_x_v13 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 13 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 14 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_13_15 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_13_15 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15;
va_Mod_vec 14; va_Mod_vec 13]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_13_15 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_13_15 ()))
=
(va_QProc (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13])
(va_wp_Loop_rounds_13_15 block) (va_wpProof_Loop_rounds_13_15 block))
//--
//-- Loop_rounds_16_59_a
val va_code_Loop_rounds_16_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i) ((va_get_vec 1 va_s0).hi3
== ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4 va_s0).hi3 == ws_opaque
block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 10
va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 5)))
((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec 13 va_s0).hi3 == ws_opaque
block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 1)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 2
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 4 va_sM (va_update_vec 3 va_sM (va_update_vec 2
va_sM (va_update_vec 1 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_a (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> | false | true | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Loop_rounds_16_59_a
(i: nat)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_16_59_a | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
i: Prims.nat ->
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 25,
"end_line": 1022,
"start_col": 2,
"start_line": 1008
} |
Prims.Tot | val va_quick_Loop_rounds_16_59_a (i: nat) (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_59_a i)) | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Loop_rounds_16_59_a (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_a i)) =
(va_QProc (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 4;
va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) (va_wp_Loop_rounds_16_59_a i block)
(va_wpProof_Loop_rounds_16_59_a i block)) | val va_quick_Loop_rounds_16_59_a (i: nat) (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_59_a i))
let va_quick_Loop_rounds_16_59_a (i: nat) (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_59_a i)) = | false | null | false | (va_QProc (va_code_Loop_rounds_16_59_a i)
([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 4; va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_16_59_a i block)
(va_wpProof_Loop_rounds_16_59_a i block)) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_16_59_a",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_vec",
"Prims.Nil",
"Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_16_59_a",
"Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_16_59_a",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block))
//--
//-- Loop_rounds_5_7
val va_code_Loop_rounds_5_7 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_5_7 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_5_7 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_5_7 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ va_state_eq va_sM
(va_update_vec 7 va_sM (va_update_vec 6 va_sM (va_update_vec 5 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 4 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 4 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ (forall (va_x_v5:quad32) (va_x_v6:quad32)
(va_x_v7:quad32) . let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 5 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 6 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_5_7 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_5_7 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7;
va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_5_7 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) =
(va_QProc (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_5_7 block) (va_wpProof_Loop_rounds_5_7 block))
//--
//-- Loop_rounds_9_11
val va_code_Loop_rounds_9_11 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_9_11 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_9_11 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_9_11 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 8 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 8 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 9 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 10 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ va_state_eq va_sM
(va_update_vec 11 va_sM (va_update_vec 10 va_sM (va_update_vec 9 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_9_11 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 8 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 8 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32)
(va_x_v11:quad32) . let va_sM = va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 10 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_9_11 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_9_11 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11;
va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_9_11 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ())) =
(va_QProc (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9])
(va_wp_Loop_rounds_9_11 block) (va_wpProof_Loop_rounds_9_11 block))
//--
//-- Loop_rounds_13_15
val va_code_Loop_rounds_13_15 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_13_15 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_13_15 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_13_15 ()) va_s0 /\ va_get_ok va_s0 /\
l_and (l_and ((va_get_vec 12 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 12 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 13 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 14 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ va_state_eq va_sM
(va_update_vec 15 va_sM (va_update_vec 14 va_sM (va_update_vec 13 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_13_15 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 12 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 12 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ (forall (va_x_v13:quad32) (va_x_v14:quad32)
(va_x_v15:quad32) . let va_sM = va_upd_vec 15 va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13
va_x_v13 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 13 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 14 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_13_15 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_13_15 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15;
va_Mod_vec 14; va_Mod_vec 13]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_13_15 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_13_15 ()))
=
(va_QProc (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13])
(va_wp_Loop_rounds_13_15 block) (va_wpProof_Loop_rounds_13_15 block))
//--
//-- Loop_rounds_16_59_a
val va_code_Loop_rounds_16_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i) ((va_get_vec 1 va_s0).hi3
== ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4 va_s0).hi3 == ws_opaque
block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 10
va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 5)))
((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec 13 va_s0).hi3 == ws_opaque
block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 1)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 2
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 4 va_sM (va_update_vec 3 va_sM (va_update_vec 2
va_sM (va_update_vec 1 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_a (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i)
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque
block (i - 14))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4
va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i -
11))) ((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 ==
ws_opaque block (i - 5))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec
13 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i -
1))) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32) (va_x_v3:quad32) (va_x_v4:quad32)
(va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25
va_x_v25 (va_upd_vec 4 va_x_v4 (va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1
va_x_v1 va_s0))))) in va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
ws_opaque block (i + 1)) ((va_get_vec 2 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3
va_sM).hi3 == ws_opaque block (i + 3))) ((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4))
==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_a : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_a i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 4; va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_a (i:nat) (block:block_w) : (va_quickCode unit | false | false | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Loop_rounds_16_59_a (i: nat) (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_59_a i)) | [] | Vale.SHA.PPC64LE.Rounds.Core.va_quick_Loop_rounds_16_59_a | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | i: Prims.nat -> block: Vale.SHA.PPC64LE.SHA_helpers.block_w
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_16_59_a i) | {
"end_col": 45,
"end_line": 1036,
"start_col": 2,
"start_line": 1034
} |
Prims.Tot | val va_quick_Loop_rounds_16_59_b (i: nat) (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_59_b i)) | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Loop_rounds_16_59_b (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_b i)) =
(va_QProc (va_code_Loop_rounds_16_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 8;
va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5]) (va_wp_Loop_rounds_16_59_b i block)
(va_wpProof_Loop_rounds_16_59_b i block)) | val va_quick_Loop_rounds_16_59_b (i: nat) (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_59_b i))
let va_quick_Loop_rounds_16_59_b (i: nat) (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_59_b i)) = | false | null | false | (va_QProc (va_code_Loop_rounds_16_59_b i)
([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 8; va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_16_59_b i block)
(va_wpProof_Loop_rounds_16_59_b i block)) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_16_59_b",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_vec",
"Prims.Nil",
"Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_16_59_b",
"Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_16_59_b",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block))
//--
//-- Loop_rounds_5_7
val va_code_Loop_rounds_5_7 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_5_7 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_5_7 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_5_7 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ va_state_eq va_sM
(va_update_vec 7 va_sM (va_update_vec 6 va_sM (va_update_vec 5 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 4 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 4 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ (forall (va_x_v5:quad32) (va_x_v6:quad32)
(va_x_v7:quad32) . let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 5 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 6 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_5_7 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_5_7 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7;
va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_5_7 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) =
(va_QProc (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_5_7 block) (va_wpProof_Loop_rounds_5_7 block))
//--
//-- Loop_rounds_9_11
val va_code_Loop_rounds_9_11 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_9_11 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_9_11 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_9_11 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 8 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 8 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 9 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 10 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ va_state_eq va_sM
(va_update_vec 11 va_sM (va_update_vec 10 va_sM (va_update_vec 9 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_9_11 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 8 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 8 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32)
(va_x_v11:quad32) . let va_sM = va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 10 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_9_11 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_9_11 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11;
va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_9_11 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ())) =
(va_QProc (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9])
(va_wp_Loop_rounds_9_11 block) (va_wpProof_Loop_rounds_9_11 block))
//--
//-- Loop_rounds_13_15
val va_code_Loop_rounds_13_15 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_13_15 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_13_15 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_13_15 ()) va_s0 /\ va_get_ok va_s0 /\
l_and (l_and ((va_get_vec 12 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 12 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 13 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 14 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ va_state_eq va_sM
(va_update_vec 15 va_sM (va_update_vec 14 va_sM (va_update_vec 13 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_13_15 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 12 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 12 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ (forall (va_x_v13:quad32) (va_x_v14:quad32)
(va_x_v15:quad32) . let va_sM = va_upd_vec 15 va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13
va_x_v13 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 13 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 14 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_13_15 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_13_15 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15;
va_Mod_vec 14; va_Mod_vec 13]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_13_15 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_13_15 ()))
=
(va_QProc (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13])
(va_wp_Loop_rounds_13_15 block) (va_wpProof_Loop_rounds_13_15 block))
//--
//-- Loop_rounds_16_59_a
val va_code_Loop_rounds_16_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i) ((va_get_vec 1 va_s0).hi3
== ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4 va_s0).hi3 == ws_opaque
block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 10
va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 5)))
((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec 13 va_s0).hi3 == ws_opaque
block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 1)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 2
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 4 va_sM (va_update_vec 3 va_sM (va_update_vec 2
va_sM (va_update_vec 1 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_a (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i)
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque
block (i - 14))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4
va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i -
11))) ((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 ==
ws_opaque block (i - 5))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec
13 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i -
1))) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32) (va_x_v3:quad32) (va_x_v4:quad32)
(va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25
va_x_v25 (va_upd_vec 4 va_x_v4 (va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1
va_x_v1 va_s0))))) in va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
ws_opaque block (i + 1)) ((va_get_vec 2 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3
va_sM).hi3 == ws_opaque block (i + 3))) ((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4))
==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_a : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_a i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 4; va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_a (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_a i)) =
(va_QProc (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 4;
va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) (va_wp_Loop_rounds_16_59_a i block)
(va_wpProof_Loop_rounds_16_59_a i block))
//--
//-- Loop_rounds_16_59_b
val va_code_Loop_rounds_16_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 20) (i == 36)) (i == 52) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 4)) ((va_get_vec 1
va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 1)))
((va_get_vec 4 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 5 va_s0).hi3 == ws_opaque block
(i - 15))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14))) ((va_get_vec 7 va_s0).hi3 ==
ws_opaque block (i - 13))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec
9 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 14 va_s0).hi3 == ws_opaque block (i -
6))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 6
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 7 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 8 va_sM (va_update_vec 7 va_sM (va_update_vec 6
va_sM (va_update_vec 5 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_b (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 20) (i == 36)) (i == 52) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 4))
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 3 va_s0).hi3 == ws_opaque
block (i - 1))) ((va_get_vec 4 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 5 va_s0).hi3 ==
ws_opaque block (i - 15))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14))) ((va_get_vec
7 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i -
12))) ((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 14 va_s0).hi3 ==
ws_opaque block (i - 6))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5))) /\ (forall
(va_x_v5:quad32) (va_x_v6:quad32) (va_x_v7:quad32) (va_x_v8:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 8
va_x_v8 (va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5 va_s0))))) in
va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1))
((va_get_vec 6 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 7 va_sM).hi3 == ws_opaque
block (i + 3))) ((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_b : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_b i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_b i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 8; va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_b (i:nat) (block:block_w) : (va_quickCode unit | false | false | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Loop_rounds_16_59_b (i: nat) (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_59_b i)) | [] | Vale.SHA.PPC64LE.Rounds.Core.va_quick_Loop_rounds_16_59_b | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | i: Prims.nat -> block: Vale.SHA.PPC64LE.SHA_helpers.block_w
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_16_59_b i) | {
"end_col": 45,
"end_line": 1091,
"start_col": 2,
"start_line": 1089
} |
Prims.Tot | val va_quick_Loop_rounds_16_59_c (i: nat) (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_59_c i)) | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Loop_rounds_16_59_c (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_c i)) =
(va_QProc (va_code_Loop_rounds_16_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 12;
va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9]) (va_wp_Loop_rounds_16_59_c i block)
(va_wpProof_Loop_rounds_16_59_c i block)) | val va_quick_Loop_rounds_16_59_c (i: nat) (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_59_c i))
let va_quick_Loop_rounds_16_59_c (i: nat) (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_59_c i)) = | false | null | false | (va_QProc (va_code_Loop_rounds_16_59_c i)
([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 12; va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9])
(va_wp_Loop_rounds_16_59_c i block)
(va_wpProof_Loop_rounds_16_59_c i block)) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_16_59_c",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_vec",
"Prims.Nil",
"Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_16_59_c",
"Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_16_59_c",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block))
//--
//-- Loop_rounds_5_7
val va_code_Loop_rounds_5_7 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_5_7 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_5_7 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_5_7 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ va_state_eq va_sM
(va_update_vec 7 va_sM (va_update_vec 6 va_sM (va_update_vec 5 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 4 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 4 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ (forall (va_x_v5:quad32) (va_x_v6:quad32)
(va_x_v7:quad32) . let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 5 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 6 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_5_7 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_5_7 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7;
va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_5_7 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) =
(va_QProc (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_5_7 block) (va_wpProof_Loop_rounds_5_7 block))
//--
//-- Loop_rounds_9_11
val va_code_Loop_rounds_9_11 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_9_11 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_9_11 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_9_11 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 8 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 8 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 9 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 10 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ va_state_eq va_sM
(va_update_vec 11 va_sM (va_update_vec 10 va_sM (va_update_vec 9 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_9_11 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 8 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 8 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32)
(va_x_v11:quad32) . let va_sM = va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 10 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_9_11 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_9_11 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11;
va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_9_11 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ())) =
(va_QProc (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9])
(va_wp_Loop_rounds_9_11 block) (va_wpProof_Loop_rounds_9_11 block))
//--
//-- Loop_rounds_13_15
val va_code_Loop_rounds_13_15 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_13_15 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_13_15 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_13_15 ()) va_s0 /\ va_get_ok va_s0 /\
l_and (l_and ((va_get_vec 12 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 12 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 13 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 14 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ va_state_eq va_sM
(va_update_vec 15 va_sM (va_update_vec 14 va_sM (va_update_vec 13 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_13_15 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 12 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 12 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ (forall (va_x_v13:quad32) (va_x_v14:quad32)
(va_x_v15:quad32) . let va_sM = va_upd_vec 15 va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13
va_x_v13 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 13 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 14 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_13_15 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_13_15 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15;
va_Mod_vec 14; va_Mod_vec 13]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_13_15 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_13_15 ()))
=
(va_QProc (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13])
(va_wp_Loop_rounds_13_15 block) (va_wpProof_Loop_rounds_13_15 block))
//--
//-- Loop_rounds_16_59_a
val va_code_Loop_rounds_16_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i) ((va_get_vec 1 va_s0).hi3
== ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4 va_s0).hi3 == ws_opaque
block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 10
va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 5)))
((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec 13 va_s0).hi3 == ws_opaque
block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 1)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 2
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 4 va_sM (va_update_vec 3 va_sM (va_update_vec 2
va_sM (va_update_vec 1 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_a (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i)
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque
block (i - 14))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4
va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i -
11))) ((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 ==
ws_opaque block (i - 5))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec
13 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i -
1))) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32) (va_x_v3:quad32) (va_x_v4:quad32)
(va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25
va_x_v25 (va_upd_vec 4 va_x_v4 (va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1
va_x_v1 va_s0))))) in va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
ws_opaque block (i + 1)) ((va_get_vec 2 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3
va_sM).hi3 == ws_opaque block (i + 3))) ((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4))
==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_a : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_a i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 4; va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_a (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_a i)) =
(va_QProc (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 4;
va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) (va_wp_Loop_rounds_16_59_a i block)
(va_wpProof_Loop_rounds_16_59_a i block))
//--
//-- Loop_rounds_16_59_b
val va_code_Loop_rounds_16_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 20) (i == 36)) (i == 52) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 4)) ((va_get_vec 1
va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 1)))
((va_get_vec 4 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 5 va_s0).hi3 == ws_opaque block
(i - 15))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14))) ((va_get_vec 7 va_s0).hi3 ==
ws_opaque block (i - 13))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec
9 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 14 va_s0).hi3 == ws_opaque block (i -
6))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 6
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 7 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 8 va_sM (va_update_vec 7 va_sM (va_update_vec 6
va_sM (va_update_vec 5 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_b (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 20) (i == 36)) (i == 52) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 4))
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 3 va_s0).hi3 == ws_opaque
block (i - 1))) ((va_get_vec 4 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 5 va_s0).hi3 ==
ws_opaque block (i - 15))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14))) ((va_get_vec
7 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i -
12))) ((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 14 va_s0).hi3 ==
ws_opaque block (i - 6))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5))) /\ (forall
(va_x_v5:quad32) (va_x_v6:quad32) (va_x_v7:quad32) (va_x_v8:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 8
va_x_v8 (va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5 va_s0))))) in
va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1))
((va_get_vec 6 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 7 va_sM).hi3 == ws_opaque
block (i + 3))) ((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_b : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_b i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_b i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 8; va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_b (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_b i)) =
(va_QProc (va_code_Loop_rounds_16_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 8;
va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5]) (va_wp_Loop_rounds_16_59_b i block)
(va_wpProof_Loop_rounds_16_59_b i block))
//--
//-- Loop_rounds_16_59_c
val va_code_Loop_rounds_16_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 24) (i == 40)) (i == 56) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 6)) ((va_get_vec 3
va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 4 va_s0).hi3 == ws_opaque block (i - 4)))
((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 7 va_s0).hi3 == ws_opaque
block (i - 1))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 9 va_s0).hi3 ==
ws_opaque block (i - 15))) ((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 12 va_s0).hi3 ==
ws_opaque block (i - 12))) ((va_get_vec 13 va_s0).hi3 == ws_opaque block (i - 11)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 9 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 10
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 11 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 12 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 12 va_sM (va_update_vec 11 va_sM (va_update_vec 10
va_sM (va_update_vec 9 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_c (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 24) (i == 40)) (i == 56) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 6))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 4 va_s0).hi3 == ws_opaque
block (i - 4))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 7
va_s0).hi3 == ws_opaque block (i - 1))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block i))
((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 10 va_s0).hi3 == ws_opaque
block (i - 14))) ((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 12
va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec 13 va_s0).hi3 == ws_opaque block (i -
11))) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32) (va_x_v11:quad32) (va_x_v12:quad32)
(va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25
va_x_v25 (va_upd_vec 12 va_x_v12 (va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0))))) in va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
ws_opaque block (i + 1)) ((va_get_vec 10 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec
11 va_sM).hi3 == ws_opaque block (i + 3))) ((va_get_vec 12 va_sM).hi3 == ws_opaque block (i +
4)) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_c : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_c i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_c i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 12; va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k
((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_c (i:nat) (block:block_w) : (va_quickCode unit | false | false | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Loop_rounds_16_59_c (i: nat) (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_59_c i)) | [] | Vale.SHA.PPC64LE.Rounds.Core.va_quick_Loop_rounds_16_59_c | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | i: Prims.nat -> block: Vale.SHA.PPC64LE.SHA_helpers.block_w
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_16_59_c i) | {
"end_col": 45,
"end_line": 1147,
"start_col": 2,
"start_line": 1145
} |
Prims.Tot | val va_quick_Loop_rounds_60_63_a (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_60_63_a ())) | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Loop_rounds_60_63_a (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_60_63_a
())) =
(va_QProc (va_code_Loop_rounds_60_63_a ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 15;
va_Mod_vec 14; va_Mod_vec 13]) (va_wp_Loop_rounds_60_63_a block)
(va_wpProof_Loop_rounds_60_63_a block)) | val va_quick_Loop_rounds_60_63_a (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_60_63_a ()))
let va_quick_Loop_rounds_60_63_a (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_60_63_a ())) = | false | null | false | (va_QProc (va_code_Loop_rounds_60_63_a ())
([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13])
(va_wp_Loop_rounds_60_63_a block)
(va_wpProof_Loop_rounds_60_63_a block)) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_60_63_a",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_vec",
"Prims.Nil",
"Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_60_63_a",
"Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_60_63_a",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block))
//--
//-- Loop_rounds_5_7
val va_code_Loop_rounds_5_7 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_5_7 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_5_7 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_5_7 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ va_state_eq va_sM
(va_update_vec 7 va_sM (va_update_vec 6 va_sM (va_update_vec 5 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 4 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 4 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ (forall (va_x_v5:quad32) (va_x_v6:quad32)
(va_x_v7:quad32) . let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 5 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 6 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_5_7 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_5_7 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7;
va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_5_7 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) =
(va_QProc (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_5_7 block) (va_wpProof_Loop_rounds_5_7 block))
//--
//-- Loop_rounds_9_11
val va_code_Loop_rounds_9_11 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_9_11 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_9_11 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_9_11 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 8 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 8 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 9 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 10 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ va_state_eq va_sM
(va_update_vec 11 va_sM (va_update_vec 10 va_sM (va_update_vec 9 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_9_11 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 8 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 8 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32)
(va_x_v11:quad32) . let va_sM = va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 10 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_9_11 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_9_11 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11;
va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_9_11 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ())) =
(va_QProc (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9])
(va_wp_Loop_rounds_9_11 block) (va_wpProof_Loop_rounds_9_11 block))
//--
//-- Loop_rounds_13_15
val va_code_Loop_rounds_13_15 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_13_15 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_13_15 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_13_15 ()) va_s0 /\ va_get_ok va_s0 /\
l_and (l_and ((va_get_vec 12 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 12 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 13 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 14 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ va_state_eq va_sM
(va_update_vec 15 va_sM (va_update_vec 14 va_sM (va_update_vec 13 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_13_15 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 12 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 12 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ (forall (va_x_v13:quad32) (va_x_v14:quad32)
(va_x_v15:quad32) . let va_sM = va_upd_vec 15 va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13
va_x_v13 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 13 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 14 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_13_15 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_13_15 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15;
va_Mod_vec 14; va_Mod_vec 13]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_13_15 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_13_15 ()))
=
(va_QProc (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13])
(va_wp_Loop_rounds_13_15 block) (va_wpProof_Loop_rounds_13_15 block))
//--
//-- Loop_rounds_16_59_a
val va_code_Loop_rounds_16_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i) ((va_get_vec 1 va_s0).hi3
== ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4 va_s0).hi3 == ws_opaque
block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 10
va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 5)))
((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec 13 va_s0).hi3 == ws_opaque
block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 1)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 2
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 4 va_sM (va_update_vec 3 va_sM (va_update_vec 2
va_sM (va_update_vec 1 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_a (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i)
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque
block (i - 14))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4
va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i -
11))) ((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 ==
ws_opaque block (i - 5))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec
13 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i -
1))) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32) (va_x_v3:quad32) (va_x_v4:quad32)
(va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25
va_x_v25 (va_upd_vec 4 va_x_v4 (va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1
va_x_v1 va_s0))))) in va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
ws_opaque block (i + 1)) ((va_get_vec 2 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3
va_sM).hi3 == ws_opaque block (i + 3))) ((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4))
==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_a : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_a i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 4; va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_a (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_a i)) =
(va_QProc (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 4;
va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) (va_wp_Loop_rounds_16_59_a i block)
(va_wpProof_Loop_rounds_16_59_a i block))
//--
//-- Loop_rounds_16_59_b
val va_code_Loop_rounds_16_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 20) (i == 36)) (i == 52) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 4)) ((va_get_vec 1
va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 1)))
((va_get_vec 4 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 5 va_s0).hi3 == ws_opaque block
(i - 15))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14))) ((va_get_vec 7 va_s0).hi3 ==
ws_opaque block (i - 13))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec
9 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 14 va_s0).hi3 == ws_opaque block (i -
6))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 6
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 7 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 8 va_sM (va_update_vec 7 va_sM (va_update_vec 6
va_sM (va_update_vec 5 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_b (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 20) (i == 36)) (i == 52) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 4))
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 3 va_s0).hi3 == ws_opaque
block (i - 1))) ((va_get_vec 4 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 5 va_s0).hi3 ==
ws_opaque block (i - 15))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14))) ((va_get_vec
7 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i -
12))) ((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 14 va_s0).hi3 ==
ws_opaque block (i - 6))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5))) /\ (forall
(va_x_v5:quad32) (va_x_v6:quad32) (va_x_v7:quad32) (va_x_v8:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 8
va_x_v8 (va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5 va_s0))))) in
va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1))
((va_get_vec 6 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 7 va_sM).hi3 == ws_opaque
block (i + 3))) ((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_b : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_b i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_b i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 8; va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_b (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_b i)) =
(va_QProc (va_code_Loop_rounds_16_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 8;
va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5]) (va_wp_Loop_rounds_16_59_b i block)
(va_wpProof_Loop_rounds_16_59_b i block))
//--
//-- Loop_rounds_16_59_c
val va_code_Loop_rounds_16_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 24) (i == 40)) (i == 56) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 6)) ((va_get_vec 3
va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 4 va_s0).hi3 == ws_opaque block (i - 4)))
((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 7 va_s0).hi3 == ws_opaque
block (i - 1))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 9 va_s0).hi3 ==
ws_opaque block (i - 15))) ((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 12 va_s0).hi3 ==
ws_opaque block (i - 12))) ((va_get_vec 13 va_s0).hi3 == ws_opaque block (i - 11)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 9 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 10
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 11 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 12 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 12 va_sM (va_update_vec 11 va_sM (va_update_vec 10
va_sM (va_update_vec 9 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_c (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 24) (i == 40)) (i == 56) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 6))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 4 va_s0).hi3 == ws_opaque
block (i - 4))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 7
va_s0).hi3 == ws_opaque block (i - 1))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block i))
((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 10 va_s0).hi3 == ws_opaque
block (i - 14))) ((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 12
va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec 13 va_s0).hi3 == ws_opaque block (i -
11))) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32) (va_x_v11:quad32) (va_x_v12:quad32)
(va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25
va_x_v25 (va_upd_vec 12 va_x_v12 (va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0))))) in va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
ws_opaque block (i + 1)) ((va_get_vec 10 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec
11 va_sM).hi3 == ws_opaque block (i + 3))) ((va_get_vec 12 va_sM).hi3 == ws_opaque block (i +
4)) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_c : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_c i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_c i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 12; va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k
((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_c (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_c i)) =
(va_QProc (va_code_Loop_rounds_16_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 12;
va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9]) (va_wp_Loop_rounds_16_59_c i block)
(va_wpProof_Loop_rounds_16_59_c i block))
//--
//-- Loop_rounds_16_59_d
val va_code_Loop_rounds_16_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (i == 28) (i == 44) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 12)) ((va_get_vec 1 va_s0).hi3 ==
ws_opaque block (i - 11))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec
7 va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i -
4))) ((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 11 va_s0).hi3 ==
ws_opaque block (i - 1))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 13
va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 14 va_s0).hi3 == ws_opaque block (i -
14))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 13)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 0 va_sM).hi3 == ws_opaque block (i + 4)) ((va_get_vec 13
va_sM).hi3 == ws_opaque block (i + 1))) ((va_get_vec 14 va_sM).hi3 == ws_opaque block (i + 2)))
((va_get_vec 15 va_sM).hi3 == ws_opaque block (i + 3)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 15 va_sM (va_update_vec 14 va_sM (va_update_vec 13
va_sM (va_update_vec 0 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_d (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (i == 28) (i == 44) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 12)) ((va_get_vec 1
va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 6)))
((va_get_vec 7 va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 8 va_s0).hi3 == ws_opaque
block (i - 4))) ((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 11
va_s0).hi3 == ws_opaque block (i - 1))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block i))
((va_get_vec 13 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 14 va_s0).hi3 ==
ws_opaque block (i - 14))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 13))) /\ (forall
(va_x_v0:quad32) (va_x_v13:quad32) (va_x_v14:quad32) (va_x_v15:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 15
va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13 va_x_v13 (va_upd_vec 0 va_x_v0 va_s0))))) in
va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 0 va_sM).hi3 == ws_opaque block (i + 4))
((va_get_vec 13 va_sM).hi3 == ws_opaque block (i + 1))) ((va_get_vec 14 va_sM).hi3 == ws_opaque
block (i + 2))) ((va_get_vec 15 va_sM).hi3 == ws_opaque block (i + 3)) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_d : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_d i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_d i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13; va_Mod_vec 0]) va_s0 va_k
((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_d (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_d i)) =
(va_QProc (va_code_Loop_rounds_16_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 15;
va_Mod_vec 14; va_Mod_vec 13; va_Mod_vec 0]) (va_wp_Loop_rounds_16_59_d i block)
(va_wpProof_Loop_rounds_16_59_d i block))
//--
//-- Loop_rounds_60_63_a
val va_code_Loop_rounds_60_63_a : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_a : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_a : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_a ()) va_s0 /\ va_get_ok va_s0 /\
l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 48) ((va_get_vec 6 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 54)) ((va_get_vec 7 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 55)) ((va_get_vec 8 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 56)) ((va_get_vec 11 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 59)) ((va_get_vec 12 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 60)) ((va_get_vec 13 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 45)) ((va_get_vec 14 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 46)) ((va_get_vec 15 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 47)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 13 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61)
((va_get_vec 14 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 15 va_sM (va_update_vec 14 va_sM
(va_update_vec 13 va_sM (va_update_ok va_sM va_s0))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_a (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 48) ((va_get_vec 6 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 54)) ((va_get_vec 7 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 55)) ((va_get_vec 8 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 56)) ((va_get_vec 11 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 59)) ((va_get_vec 12 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 60)) ((va_get_vec 13 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 45)) ((va_get_vec 14 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 46)) ((va_get_vec 15 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 47) /\ (forall (va_x_v13:quad32) (va_x_v14:quad32)
(va_x_v15:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26
(va_upd_vec 25 va_x_v25 (va_upd_vec 15 va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13 va_x_v13
va_s0)))) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 13 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61) ((va_get_vec 14 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_a : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_a block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_a ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_a (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_60_63_a | false | false | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Loop_rounds_60_63_a (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_60_63_a ())) | [] | Vale.SHA.PPC64LE.Rounds.Core.va_quick_Loop_rounds_60_63_a | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | block: Vale.SHA.PPC64LE.SHA_helpers.block_w
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_60_63_a ()) | {
"end_col": 43,
"end_line": 1261,
"start_col": 2,
"start_line": 1259
} |
Prims.Tot | val va_wp_Loop_rounds_16_59_d
(i: nat)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Loop_rounds_16_59_d (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (i == 28) (i == 44) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 12)) ((va_get_vec 1
va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 6)))
((va_get_vec 7 va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 8 va_s0).hi3 == ws_opaque
block (i - 4))) ((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 11
va_s0).hi3 == ws_opaque block (i - 1))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block i))
((va_get_vec 13 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 14 va_s0).hi3 ==
ws_opaque block (i - 14))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 13))) /\ (forall
(va_x_v0:quad32) (va_x_v13:quad32) (va_x_v14:quad32) (va_x_v15:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 15
va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13 va_x_v13 (va_upd_vec 0 va_x_v0 va_s0))))) in
va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 0 va_sM).hi3 == ws_opaque block (i + 4))
((va_get_vec 13 va_sM).hi3 == ws_opaque block (i + 1))) ((va_get_vec 14 va_sM).hi3 == ws_opaque
block (i + 2))) ((va_get_vec 15 va_sM).hi3 == ws_opaque block (i + 3)) ==> va_k va_sM (()))) | val va_wp_Loop_rounds_16_59_d
(i: nat)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Loop_rounds_16_59_d
(i: nat)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(l_or (i == 28) (i == 44) /\
l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 ==
ws_opaque block (i - 12))
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 11)))
((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 6)))
((va_get_vec 7 va_s0).hi3 == ws_opaque block (i - 5)))
((va_get_vec 8 va_s0).hi3 == ws_opaque block (i - 4)))
((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 3)))
((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 1)))
((va_get_vec 12 va_s0).hi3 == ws_opaque block i))
((va_get_vec 13 va_s0).hi3 == ws_opaque block (i - 15)))
((va_get_vec 14 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 13))) /\
(forall (va_x_v0: quad32)
(va_x_v13: quad32)
(va_x_v14: quad32)
(va_x_v15: quad32)
(va_x_v25: quad32)
(va_x_v26: quad32).
let va_sM =
va_upd_vec 26
va_x_v26
(va_upd_vec 25
va_x_v25
(va_upd_vec 15
va_x_v15
(va_upd_vec 14 va_x_v14 (va_upd_vec 13 va_x_v13 (va_upd_vec 0 va_x_v0 va_s0)))))
in
va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 0 va_sM).hi3 == ws_opaque block (i + 4))
((va_get_vec 13 va_sM).hi3 == ws_opaque block (i + 1)))
((va_get_vec 14 va_sM).hi3 == ws_opaque block (i + 2)))
((va_get_vec 15 va_sM).hi3 == ws_opaque block (i + 3)) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_or",
"Prims.eq2",
"Prims.int",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words_s.__proj__Mkfour__item__hi3",
"Vale.Def.Types_s.nat32",
"Vale.PPC64LE.Decls.va_get_vec",
"Vale.SHA.PPC64LE.SHA_helpers.ws_opaque",
"Prims.op_Subtraction",
"Prims.l_Forall",
"Vale.PPC64LE.Memory.quad32",
"Prims.l_imp",
"Prims.op_Addition",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_vec"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block))
//--
//-- Loop_rounds_5_7
val va_code_Loop_rounds_5_7 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_5_7 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_5_7 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_5_7 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ va_state_eq va_sM
(va_update_vec 7 va_sM (va_update_vec 6 va_sM (va_update_vec 5 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 4 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 4 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ (forall (va_x_v5:quad32) (va_x_v6:quad32)
(va_x_v7:quad32) . let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 5 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 6 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_5_7 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_5_7 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7;
va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_5_7 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) =
(va_QProc (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_5_7 block) (va_wpProof_Loop_rounds_5_7 block))
//--
//-- Loop_rounds_9_11
val va_code_Loop_rounds_9_11 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_9_11 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_9_11 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_9_11 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 8 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 8 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 9 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 10 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ va_state_eq va_sM
(va_update_vec 11 va_sM (va_update_vec 10 va_sM (va_update_vec 9 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_9_11 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 8 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 8 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32)
(va_x_v11:quad32) . let va_sM = va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 10 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_9_11 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_9_11 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11;
va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_9_11 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ())) =
(va_QProc (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9])
(va_wp_Loop_rounds_9_11 block) (va_wpProof_Loop_rounds_9_11 block))
//--
//-- Loop_rounds_13_15
val va_code_Loop_rounds_13_15 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_13_15 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_13_15 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_13_15 ()) va_s0 /\ va_get_ok va_s0 /\
l_and (l_and ((va_get_vec 12 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 12 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 13 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 14 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ va_state_eq va_sM
(va_update_vec 15 va_sM (va_update_vec 14 va_sM (va_update_vec 13 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_13_15 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 12 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 12 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ (forall (va_x_v13:quad32) (va_x_v14:quad32)
(va_x_v15:quad32) . let va_sM = va_upd_vec 15 va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13
va_x_v13 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 13 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 14 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_13_15 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_13_15 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15;
va_Mod_vec 14; va_Mod_vec 13]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_13_15 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_13_15 ()))
=
(va_QProc (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13])
(va_wp_Loop_rounds_13_15 block) (va_wpProof_Loop_rounds_13_15 block))
//--
//-- Loop_rounds_16_59_a
val va_code_Loop_rounds_16_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i) ((va_get_vec 1 va_s0).hi3
== ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4 va_s0).hi3 == ws_opaque
block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 10
va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 5)))
((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec 13 va_s0).hi3 == ws_opaque
block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 1)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 2
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 4 va_sM (va_update_vec 3 va_sM (va_update_vec 2
va_sM (va_update_vec 1 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_a (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i)
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque
block (i - 14))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4
va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i -
11))) ((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 ==
ws_opaque block (i - 5))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec
13 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i -
1))) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32) (va_x_v3:quad32) (va_x_v4:quad32)
(va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25
va_x_v25 (va_upd_vec 4 va_x_v4 (va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1
va_x_v1 va_s0))))) in va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
ws_opaque block (i + 1)) ((va_get_vec 2 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3
va_sM).hi3 == ws_opaque block (i + 3))) ((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4))
==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_a : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_a i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 4; va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_a (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_a i)) =
(va_QProc (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 4;
va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) (va_wp_Loop_rounds_16_59_a i block)
(va_wpProof_Loop_rounds_16_59_a i block))
//--
//-- Loop_rounds_16_59_b
val va_code_Loop_rounds_16_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 20) (i == 36)) (i == 52) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 4)) ((va_get_vec 1
va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 1)))
((va_get_vec 4 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 5 va_s0).hi3 == ws_opaque block
(i - 15))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14))) ((va_get_vec 7 va_s0).hi3 ==
ws_opaque block (i - 13))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec
9 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 14 va_s0).hi3 == ws_opaque block (i -
6))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 6
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 7 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 8 va_sM (va_update_vec 7 va_sM (va_update_vec 6
va_sM (va_update_vec 5 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_b (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 20) (i == 36)) (i == 52) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 4))
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 3 va_s0).hi3 == ws_opaque
block (i - 1))) ((va_get_vec 4 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 5 va_s0).hi3 ==
ws_opaque block (i - 15))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14))) ((va_get_vec
7 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i -
12))) ((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 14 va_s0).hi3 ==
ws_opaque block (i - 6))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5))) /\ (forall
(va_x_v5:quad32) (va_x_v6:quad32) (va_x_v7:quad32) (va_x_v8:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 8
va_x_v8 (va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5 va_s0))))) in
va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1))
((va_get_vec 6 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 7 va_sM).hi3 == ws_opaque
block (i + 3))) ((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_b : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_b i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_b i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 8; va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_b (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_b i)) =
(va_QProc (va_code_Loop_rounds_16_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 8;
va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5]) (va_wp_Loop_rounds_16_59_b i block)
(va_wpProof_Loop_rounds_16_59_b i block))
//--
//-- Loop_rounds_16_59_c
val va_code_Loop_rounds_16_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 24) (i == 40)) (i == 56) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 6)) ((va_get_vec 3
va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 4 va_s0).hi3 == ws_opaque block (i - 4)))
((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 7 va_s0).hi3 == ws_opaque
block (i - 1))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 9 va_s0).hi3 ==
ws_opaque block (i - 15))) ((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 12 va_s0).hi3 ==
ws_opaque block (i - 12))) ((va_get_vec 13 va_s0).hi3 == ws_opaque block (i - 11)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 9 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 10
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 11 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 12 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 12 va_sM (va_update_vec 11 va_sM (va_update_vec 10
va_sM (va_update_vec 9 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_c (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 24) (i == 40)) (i == 56) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 6))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 4 va_s0).hi3 == ws_opaque
block (i - 4))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 7
va_s0).hi3 == ws_opaque block (i - 1))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block i))
((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 10 va_s0).hi3 == ws_opaque
block (i - 14))) ((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 12
va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec 13 va_s0).hi3 == ws_opaque block (i -
11))) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32) (va_x_v11:quad32) (va_x_v12:quad32)
(va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25
va_x_v25 (va_upd_vec 12 va_x_v12 (va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0))))) in va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
ws_opaque block (i + 1)) ((va_get_vec 10 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec
11 va_sM).hi3 == ws_opaque block (i + 3))) ((va_get_vec 12 va_sM).hi3 == ws_opaque block (i +
4)) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_c : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_c i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_c i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 12; va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k
((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_c (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_c i)) =
(va_QProc (va_code_Loop_rounds_16_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 12;
va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9]) (va_wp_Loop_rounds_16_59_c i block)
(va_wpProof_Loop_rounds_16_59_c i block))
//--
//-- Loop_rounds_16_59_d
val va_code_Loop_rounds_16_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (i == 28) (i == 44) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 12)) ((va_get_vec 1 va_s0).hi3 ==
ws_opaque block (i - 11))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec
7 va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i -
4))) ((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 11 va_s0).hi3 ==
ws_opaque block (i - 1))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 13
va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 14 va_s0).hi3 == ws_opaque block (i -
14))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 13)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 0 va_sM).hi3 == ws_opaque block (i + 4)) ((va_get_vec 13
va_sM).hi3 == ws_opaque block (i + 1))) ((va_get_vec 14 va_sM).hi3 == ws_opaque block (i + 2)))
((va_get_vec 15 va_sM).hi3 == ws_opaque block (i + 3)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 15 va_sM (va_update_vec 14 va_sM (va_update_vec 13
va_sM (va_update_vec 0 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_d (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> | false | true | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Loop_rounds_16_59_d
(i: nat)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_16_59_d | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
i: Prims.nat ->
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 96,
"end_line": 1188,
"start_col": 2,
"start_line": 1175
} |
Prims.Tot | val va_wp_Loop_rounds_16_59_b
(i: nat)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Loop_rounds_16_59_b (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 20) (i == 36)) (i == 52) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 4))
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 3 va_s0).hi3 == ws_opaque
block (i - 1))) ((va_get_vec 4 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 5 va_s0).hi3 ==
ws_opaque block (i - 15))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14))) ((va_get_vec
7 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i -
12))) ((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 14 va_s0).hi3 ==
ws_opaque block (i - 6))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5))) /\ (forall
(va_x_v5:quad32) (va_x_v6:quad32) (va_x_v7:quad32) (va_x_v8:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 8
va_x_v8 (va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5 va_s0))))) in
va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1))
((va_get_vec 6 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 7 va_sM).hi3 == ws_opaque
block (i + 3))) ((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) ==> va_k va_sM (()))) | val va_wp_Loop_rounds_16_59_b
(i: nat)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Loop_rounds_16_59_b
(i: nat)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(l_or (l_or (i == 20) (i == 36)) (i == 52) /\
l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 ==
ws_opaque block (i - 4))
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 3)))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 1)))
((va_get_vec 4 va_s0).hi3 == ws_opaque block i))
((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 15)))
((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 7 va_s0).hi3 == ws_opaque block (i - 13)))
((va_get_vec 8 va_s0).hi3 == ws_opaque block (i - 12)))
((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 11)))
((va_get_vec 14 va_s0).hi3 == ws_opaque block (i - 6)))
((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5))) /\
(forall (va_x_v5: quad32)
(va_x_v6: quad32)
(va_x_v7: quad32)
(va_x_v8: quad32)
(va_x_v25: quad32)
(va_x_v26: quad32).
let va_sM =
va_upd_vec 26
va_x_v26
(va_upd_vec 25
va_x_v25
(va_upd_vec 8
va_x_v8
(va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5 va_s0)))))
in
va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1))
((va_get_vec 6 va_sM).hi3 == ws_opaque block (i + 2)))
((va_get_vec 7 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_or",
"Prims.eq2",
"Prims.int",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words_s.__proj__Mkfour__item__hi3",
"Vale.Def.Types_s.nat32",
"Vale.PPC64LE.Decls.va_get_vec",
"Vale.SHA.PPC64LE.SHA_helpers.ws_opaque",
"Prims.op_Subtraction",
"Prims.l_Forall",
"Vale.PPC64LE.Memory.quad32",
"Prims.l_imp",
"Prims.op_Addition",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_vec"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block))
//--
//-- Loop_rounds_5_7
val va_code_Loop_rounds_5_7 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_5_7 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_5_7 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_5_7 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ va_state_eq va_sM
(va_update_vec 7 va_sM (va_update_vec 6 va_sM (va_update_vec 5 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 4 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 4 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ (forall (va_x_v5:quad32) (va_x_v6:quad32)
(va_x_v7:quad32) . let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 5 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 6 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_5_7 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_5_7 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7;
va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_5_7 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) =
(va_QProc (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_5_7 block) (va_wpProof_Loop_rounds_5_7 block))
//--
//-- Loop_rounds_9_11
val va_code_Loop_rounds_9_11 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_9_11 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_9_11 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_9_11 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 8 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 8 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 9 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 10 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ va_state_eq va_sM
(va_update_vec 11 va_sM (va_update_vec 10 va_sM (va_update_vec 9 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_9_11 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 8 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 8 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32)
(va_x_v11:quad32) . let va_sM = va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 10 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_9_11 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_9_11 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11;
va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_9_11 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ())) =
(va_QProc (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9])
(va_wp_Loop_rounds_9_11 block) (va_wpProof_Loop_rounds_9_11 block))
//--
//-- Loop_rounds_13_15
val va_code_Loop_rounds_13_15 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_13_15 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_13_15 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_13_15 ()) va_s0 /\ va_get_ok va_s0 /\
l_and (l_and ((va_get_vec 12 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 12 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 13 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 14 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ va_state_eq va_sM
(va_update_vec 15 va_sM (va_update_vec 14 va_sM (va_update_vec 13 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_13_15 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 12 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 12 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ (forall (va_x_v13:quad32) (va_x_v14:quad32)
(va_x_v15:quad32) . let va_sM = va_upd_vec 15 va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13
va_x_v13 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 13 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 14 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_13_15 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_13_15 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15;
va_Mod_vec 14; va_Mod_vec 13]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_13_15 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_13_15 ()))
=
(va_QProc (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13])
(va_wp_Loop_rounds_13_15 block) (va_wpProof_Loop_rounds_13_15 block))
//--
//-- Loop_rounds_16_59_a
val va_code_Loop_rounds_16_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i) ((va_get_vec 1 va_s0).hi3
== ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4 va_s0).hi3 == ws_opaque
block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 10
va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 5)))
((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec 13 va_s0).hi3 == ws_opaque
block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 1)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 2
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 4 va_sM (va_update_vec 3 va_sM (va_update_vec 2
va_sM (va_update_vec 1 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_a (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i)
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque
block (i - 14))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4
va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i -
11))) ((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 ==
ws_opaque block (i - 5))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec
13 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i -
1))) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32) (va_x_v3:quad32) (va_x_v4:quad32)
(va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25
va_x_v25 (va_upd_vec 4 va_x_v4 (va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1
va_x_v1 va_s0))))) in va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
ws_opaque block (i + 1)) ((va_get_vec 2 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3
va_sM).hi3 == ws_opaque block (i + 3))) ((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4))
==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_a : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_a i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 4; va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_a (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_a i)) =
(va_QProc (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 4;
va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) (va_wp_Loop_rounds_16_59_a i block)
(va_wpProof_Loop_rounds_16_59_a i block))
//--
//-- Loop_rounds_16_59_b
val va_code_Loop_rounds_16_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 20) (i == 36)) (i == 52) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 4)) ((va_get_vec 1
va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 1)))
((va_get_vec 4 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 5 va_s0).hi3 == ws_opaque block
(i - 15))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14))) ((va_get_vec 7 va_s0).hi3 ==
ws_opaque block (i - 13))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec
9 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 14 va_s0).hi3 == ws_opaque block (i -
6))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 6
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 7 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 8 va_sM (va_update_vec 7 va_sM (va_update_vec 6
va_sM (va_update_vec 5 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_b (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> | false | true | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Loop_rounds_16_59_b
(i: nat)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_16_59_b | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
i: Prims.nat ->
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 95,
"end_line": 1077,
"start_col": 2,
"start_line": 1064
} |
Prims.Tot | val va_quick_Loop_rounds_16_59_d (i: nat) (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_59_d i)) | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Loop_rounds_16_59_d (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_d i)) =
(va_QProc (va_code_Loop_rounds_16_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 15;
va_Mod_vec 14; va_Mod_vec 13; va_Mod_vec 0]) (va_wp_Loop_rounds_16_59_d i block)
(va_wpProof_Loop_rounds_16_59_d i block)) | val va_quick_Loop_rounds_16_59_d (i: nat) (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_59_d i))
let va_quick_Loop_rounds_16_59_d (i: nat) (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_59_d i)) = | false | null | false | (va_QProc (va_code_Loop_rounds_16_59_d i)
([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13; va_Mod_vec 0])
(va_wp_Loop_rounds_16_59_d i block)
(va_wpProof_Loop_rounds_16_59_d i block)) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_16_59_d",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_vec",
"Prims.Nil",
"Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_16_59_d",
"Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_16_59_d",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block))
//--
//-- Loop_rounds_5_7
val va_code_Loop_rounds_5_7 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_5_7 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_5_7 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_5_7 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ va_state_eq va_sM
(va_update_vec 7 va_sM (va_update_vec 6 va_sM (va_update_vec 5 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 4 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 4 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ (forall (va_x_v5:quad32) (va_x_v6:quad32)
(va_x_v7:quad32) . let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 5 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 6 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_5_7 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_5_7 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7;
va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_5_7 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) =
(va_QProc (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_5_7 block) (va_wpProof_Loop_rounds_5_7 block))
//--
//-- Loop_rounds_9_11
val va_code_Loop_rounds_9_11 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_9_11 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_9_11 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_9_11 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 8 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 8 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 9 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 10 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ va_state_eq va_sM
(va_update_vec 11 va_sM (va_update_vec 10 va_sM (va_update_vec 9 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_9_11 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 8 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 8 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32)
(va_x_v11:quad32) . let va_sM = va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 10 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_9_11 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_9_11 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11;
va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_9_11 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ())) =
(va_QProc (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9])
(va_wp_Loop_rounds_9_11 block) (va_wpProof_Loop_rounds_9_11 block))
//--
//-- Loop_rounds_13_15
val va_code_Loop_rounds_13_15 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_13_15 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_13_15 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_13_15 ()) va_s0 /\ va_get_ok va_s0 /\
l_and (l_and ((va_get_vec 12 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 12 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 13 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 14 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ va_state_eq va_sM
(va_update_vec 15 va_sM (va_update_vec 14 va_sM (va_update_vec 13 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_13_15 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 12 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 12 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ (forall (va_x_v13:quad32) (va_x_v14:quad32)
(va_x_v15:quad32) . let va_sM = va_upd_vec 15 va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13
va_x_v13 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 13 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 14 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_13_15 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_13_15 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15;
va_Mod_vec 14; va_Mod_vec 13]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_13_15 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_13_15 ()))
=
(va_QProc (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13])
(va_wp_Loop_rounds_13_15 block) (va_wpProof_Loop_rounds_13_15 block))
//--
//-- Loop_rounds_16_59_a
val va_code_Loop_rounds_16_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i) ((va_get_vec 1 va_s0).hi3
== ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4 va_s0).hi3 == ws_opaque
block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 10
va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 5)))
((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec 13 va_s0).hi3 == ws_opaque
block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 1)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 2
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 4 va_sM (va_update_vec 3 va_sM (va_update_vec 2
va_sM (va_update_vec 1 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_a (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i)
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque
block (i - 14))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4
va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i -
11))) ((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 ==
ws_opaque block (i - 5))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec
13 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i -
1))) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32) (va_x_v3:quad32) (va_x_v4:quad32)
(va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25
va_x_v25 (va_upd_vec 4 va_x_v4 (va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1
va_x_v1 va_s0))))) in va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
ws_opaque block (i + 1)) ((va_get_vec 2 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3
va_sM).hi3 == ws_opaque block (i + 3))) ((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4))
==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_a : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_a i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 4; va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_a (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_a i)) =
(va_QProc (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 4;
va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) (va_wp_Loop_rounds_16_59_a i block)
(va_wpProof_Loop_rounds_16_59_a i block))
//--
//-- Loop_rounds_16_59_b
val va_code_Loop_rounds_16_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 20) (i == 36)) (i == 52) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 4)) ((va_get_vec 1
va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 1)))
((va_get_vec 4 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 5 va_s0).hi3 == ws_opaque block
(i - 15))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14))) ((va_get_vec 7 va_s0).hi3 ==
ws_opaque block (i - 13))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec
9 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 14 va_s0).hi3 == ws_opaque block (i -
6))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 6
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 7 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 8 va_sM (va_update_vec 7 va_sM (va_update_vec 6
va_sM (va_update_vec 5 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_b (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 20) (i == 36)) (i == 52) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 4))
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 3 va_s0).hi3 == ws_opaque
block (i - 1))) ((va_get_vec 4 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 5 va_s0).hi3 ==
ws_opaque block (i - 15))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14))) ((va_get_vec
7 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i -
12))) ((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 14 va_s0).hi3 ==
ws_opaque block (i - 6))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5))) /\ (forall
(va_x_v5:quad32) (va_x_v6:quad32) (va_x_v7:quad32) (va_x_v8:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 8
va_x_v8 (va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5 va_s0))))) in
va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1))
((va_get_vec 6 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 7 va_sM).hi3 == ws_opaque
block (i + 3))) ((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_b : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_b i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_b i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 8; va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_b (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_b i)) =
(va_QProc (va_code_Loop_rounds_16_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 8;
va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5]) (va_wp_Loop_rounds_16_59_b i block)
(va_wpProof_Loop_rounds_16_59_b i block))
//--
//-- Loop_rounds_16_59_c
val va_code_Loop_rounds_16_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 24) (i == 40)) (i == 56) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 6)) ((va_get_vec 3
va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 4 va_s0).hi3 == ws_opaque block (i - 4)))
((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 7 va_s0).hi3 == ws_opaque
block (i - 1))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 9 va_s0).hi3 ==
ws_opaque block (i - 15))) ((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 12 va_s0).hi3 ==
ws_opaque block (i - 12))) ((va_get_vec 13 va_s0).hi3 == ws_opaque block (i - 11)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 9 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 10
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 11 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 12 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 12 va_sM (va_update_vec 11 va_sM (va_update_vec 10
va_sM (va_update_vec 9 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_c (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 24) (i == 40)) (i == 56) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 6))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 4 va_s0).hi3 == ws_opaque
block (i - 4))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 7
va_s0).hi3 == ws_opaque block (i - 1))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block i))
((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 10 va_s0).hi3 == ws_opaque
block (i - 14))) ((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 12
va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec 13 va_s0).hi3 == ws_opaque block (i -
11))) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32) (va_x_v11:quad32) (va_x_v12:quad32)
(va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25
va_x_v25 (va_upd_vec 12 va_x_v12 (va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0))))) in va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
ws_opaque block (i + 1)) ((va_get_vec 10 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec
11 va_sM).hi3 == ws_opaque block (i + 3))) ((va_get_vec 12 va_sM).hi3 == ws_opaque block (i +
4)) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_c : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_c i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_c i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 12; va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k
((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_c (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_c i)) =
(va_QProc (va_code_Loop_rounds_16_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 12;
va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9]) (va_wp_Loop_rounds_16_59_c i block)
(va_wpProof_Loop_rounds_16_59_c i block))
//--
//-- Loop_rounds_16_59_d
val va_code_Loop_rounds_16_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (i == 28) (i == 44) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 12)) ((va_get_vec 1 va_s0).hi3 ==
ws_opaque block (i - 11))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec
7 va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i -
4))) ((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 11 va_s0).hi3 ==
ws_opaque block (i - 1))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 13
va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 14 va_s0).hi3 == ws_opaque block (i -
14))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 13)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 0 va_sM).hi3 == ws_opaque block (i + 4)) ((va_get_vec 13
va_sM).hi3 == ws_opaque block (i + 1))) ((va_get_vec 14 va_sM).hi3 == ws_opaque block (i + 2)))
((va_get_vec 15 va_sM).hi3 == ws_opaque block (i + 3)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 15 va_sM (va_update_vec 14 va_sM (va_update_vec 13
va_sM (va_update_vec 0 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_d (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (i == 28) (i == 44) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 12)) ((va_get_vec 1
va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 6)))
((va_get_vec 7 va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 8 va_s0).hi3 == ws_opaque
block (i - 4))) ((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 11
va_s0).hi3 == ws_opaque block (i - 1))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block i))
((va_get_vec 13 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 14 va_s0).hi3 ==
ws_opaque block (i - 14))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 13))) /\ (forall
(va_x_v0:quad32) (va_x_v13:quad32) (va_x_v14:quad32) (va_x_v15:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 15
va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13 va_x_v13 (va_upd_vec 0 va_x_v0 va_s0))))) in
va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 0 va_sM).hi3 == ws_opaque block (i + 4))
((va_get_vec 13 va_sM).hi3 == ws_opaque block (i + 1))) ((va_get_vec 14 va_sM).hi3 == ws_opaque
block (i + 2))) ((va_get_vec 15 va_sM).hi3 == ws_opaque block (i + 3)) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_d : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_d i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_d i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13; va_Mod_vec 0]) va_s0 va_k
((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_d (i:nat) (block:block_w) : (va_quickCode unit | false | false | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Loop_rounds_16_59_d (i: nat) (block: block_w)
: (va_quickCode unit (va_code_Loop_rounds_16_59_d i)) | [] | Vale.SHA.PPC64LE.Rounds.Core.va_quick_Loop_rounds_16_59_d | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | i: Prims.nat -> block: Vale.SHA.PPC64LE.SHA_helpers.block_w
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_16_59_d i) | {
"end_col": 45,
"end_line": 1202,
"start_col": 2,
"start_line": 1200
} |
Prims.Tot | val va_wp_Loop_rounds_60_63_b
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (()))) | val va_wp_Loop_rounds_60_63_b
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Loop_rounds_60_63_b
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0)
k_b
16
(va_get_mem_layout va_s0)
Secret /\
(let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\
(let hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in
l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
hash
0))
((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
hash
1)))
((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
2)))
((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
3)))
((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
4)))
((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
5)))
((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
6)))
((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
hash
7))
(Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 60)
((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\
l_and (l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61)
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62))
((va_get_vec 24 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\
(forall (va_x_r6: nat64) (va_x_v16: quad32) (va_x_v17: quad32) (va_x_v18: quad32)
(va_x_v19: quad32) (va_x_v20: quad32) (va_x_v21: quad32) (va_x_v22: quad32) (va_x_v23: quad32)
(va_x_v24: quad32) (va_x_v25: quad32) (va_x_v26: quad32).
let va_sM =
va_upd_vec 26
va_x_v26
(va_upd_vec 25
va_x_v25
(va_upd_vec 24
va_x_v24
(va_upd_vec 23
va_x_v23
(va_upd_vec 22
va_x_v22
(va_upd_vec 21
va_x_v21
(va_upd_vec 20
va_x_v20
(va_upd_vec 19
va_x_v19
(va_upd_vec 18
va_x_v18
(va_upd_vec 17
va_x_v17
(va_upd_vec 16 va_x_v16 (va_upd_reg 6 va_x_r6 va_s0)))
))))))))
in
va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM)
(va_get_vec 17 va_sM)
(va_get_vec 18 va_sM)
(va_get_vec 19 va_sM)
(va_get_vec 20 va_sM)
(va_get_vec 21 va_sM)
(va_get_vec 22 va_sM)
(va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==>
va_k va_sM (()))) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Memory.buffer128",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.SHA.PPC64LE.SHA_helpers.hash256",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Vale.PPC64LE.Decls.validSrcAddrs128",
"Vale.PPC64LE.Decls.va_get_mem_heaplet",
"Vale.PPC64LE.Decls.va_get_reg",
"Vale.PPC64LE.Decls.va_get_mem_layout",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.SHA.PPC64LE.SHA_helpers.k_reqs",
"Prims.eq2",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words_s.__proj__Mkfour__item__hi3",
"Vale.Def.Types_s.nat32",
"Vale.PPC64LE.Decls.va_get_vec",
"Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32",
"FStar.Seq.Base.index",
"Vale.SHA.PPC64LE.SHA_helpers.word",
"Vale.Arch.Types.add_wrap32",
"Vale.SHA.PPC64LE.SHA_helpers.k_index",
"Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale",
"Vale.SHA.PPC64LE.SHA_helpers.ws_opaque",
"Vale.Def.Words_s.__proj__Mkfour__item__hi2",
"Vale.Def.Words_s.__proj__Mkfour__item__lo1",
"FStar.Seq.Base.seq",
"Vale.Def.Types_s.quad32",
"Vale.PPC64LE.Decls.buffer128_as_seq",
"Prims.l_Forall",
"Vale.PPC64LE.Memory.nat64",
"Vale.PPC64LE.Memory.quad32",
"Prims.l_imp",
"Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32",
"Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_vec",
"Vale.PPC64LE.Decls.va_upd_reg"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state) | false | true | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Loop_rounds_60_63_b
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_60_63_b | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
k_b: Vale.PPC64LE.Memory.buffer128 ->
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
hash_orig: Vale.SHA.PPC64LE.SHA_helpers.hash256 ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 91,
"end_line": 797,
"start_col": 2,
"start_line": 760
} |
Prims.Tot | val va_wp_Loop_rounds_0_59_c
(i: nat)
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(()))) | val va_wp_Loop_rounds_0_59_c
(i: nat)
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Loop_rounds_0_59_c
(i: nat)
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0)
k_b
(i `op_Division` 4 + 1)
1
(va_get_mem_layout va_s0)
Secret /\
(let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\
(let hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in
l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
hash
0))
((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
hash
1)))
((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
2)))
((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
3)))
((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
4)))
((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
5)))
((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
6)))
((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
hash
7))
(Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block i)
((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\
l_and (l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2)))
((va_get_vec 24 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\
(forall (va_x_r6: nat64) (va_x_v16: quad32) (va_x_v17: quad32) (va_x_v18: quad32)
(va_x_v19: quad32) (va_x_v20: quad32) (va_x_v21: quad32) (va_x_v22: quad32) (va_x_v23: quad32)
(va_x_v24: quad32) (va_x_v25: quad32) (va_x_v26: quad32).
let va_sM =
va_upd_vec 26
va_x_v26
(va_upd_vec 25
va_x_v25
(va_upd_vec 24
va_x_v24
(va_upd_vec 23
va_x_v23
(va_upd_vec 22
va_x_v22
(va_upd_vec 21
va_x_v21
(va_upd_vec 20
va_x_v20
(va_upd_vec 19
va_x_v19
(va_upd_vec 18
va_x_v18
(va_upd_vec 17
va_x_v17
(va_upd_vec 16 va_x_v16 (va_upd_reg 6 va_x_r6 va_s0)))
))))))))
in
va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\
(let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_sM) k_b in
(let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in
l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
0))
((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
1)))
((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
2)))
((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
3)))
((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
4)))
((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
5)))
((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
6)))
((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
7))
(Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 4)))) /\
l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 5)
)
((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.PPC64LE.Memory.buffer128",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.SHA.PPC64LE.SHA_helpers.hash256",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_or",
"Prims.eq2",
"Prims.int",
"Prims.op_LessThan",
"Prims.op_Addition",
"Vale.PPC64LE.Decls.va_get_reg",
"Vale.PPC64LE.Machine_s.pow2_64",
"Vale.PPC64LE.Decls.validSrcAddrsOffset128",
"Vale.PPC64LE.Decls.va_get_mem_heaplet",
"Prims.op_Division",
"Vale.PPC64LE.Decls.va_get_mem_layout",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.SHA.PPC64LE.SHA_helpers.k_reqs",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words_s.__proj__Mkfour__item__hi3",
"Vale.Def.Types_s.nat32",
"Vale.PPC64LE.Decls.va_get_vec",
"Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32",
"FStar.Seq.Base.index",
"Vale.SHA.PPC64LE.SHA_helpers.word",
"Vale.Arch.Types.add_wrap32",
"Vale.SHA.PPC64LE.SHA_helpers.k_index",
"Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale",
"Vale.SHA.PPC64LE.SHA_helpers.ws_opaque",
"Vale.Def.Words_s.__proj__Mkfour__item__hi2",
"Vale.Def.Words_s.__proj__Mkfour__item__lo1",
"FStar.Seq.Base.seq",
"Vale.Def.Types_s.quad32",
"Vale.PPC64LE.Decls.buffer128_as_seq",
"Prims.l_Forall",
"Vale.PPC64LE.Memory.nat64",
"Vale.PPC64LE.Memory.quad32",
"Prims.l_imp",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_vec",
"Vale.PPC64LE.Decls.va_upd_reg"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) | false | true | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Loop_rounds_0_59_c
(i: nat)
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_0_59_c | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
i: Prims.nat ->
k_b: Vale.PPC64LE.Memory.buffer128 ->
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
hash_orig: Vale.SHA.PPC64LE.SHA_helpers.hash256 ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 10,
"end_line": 548,
"start_col": 2,
"start_line": 491
} |
Prims.Tot | val va_wp_Loop_rounds_0_59_a
(i: nat)
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(()))) | val va_wp_Loop_rounds_0_59_a
(i: nat)
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Loop_rounds_0_59_a
(i: nat)
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0)
k_b
(i `op_Division` 4 + 1)
1
(va_get_mem_layout va_s0)
Secret /\
(let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\
(let hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in
l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
hash
0))
((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
hash
1)))
((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
2)))
((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
3)))
((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
4)))
((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
5)))
((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
6)))
((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
hash
7))
(Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block i)
((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\
l_and (l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2)))
((va_get_vec 24 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\
(forall (va_x_r6: nat64) (va_x_v16: quad32) (va_x_v17: quad32) (va_x_v18: quad32)
(va_x_v19: quad32) (va_x_v20: quad32) (va_x_v21: quad32) (va_x_v22: quad32) (va_x_v23: quad32)
(va_x_v24: quad32) (va_x_v25: quad32) (va_x_v26: quad32).
let va_sM =
va_upd_vec 26
va_x_v26
(va_upd_vec 25
va_x_v25
(va_upd_vec 24
va_x_v24
(va_upd_vec 23
va_x_v23
(va_upd_vec 22
va_x_v22
(va_upd_vec 21
va_x_v21
(va_upd_vec 20
va_x_v20
(va_upd_vec 19
va_x_v19
(va_upd_vec 18
va_x_v18
(va_upd_vec 17
va_x_v17
(va_upd_vec 16 va_x_v16 (va_upd_reg 6 va_x_r6 va_s0)))
))))))))
in
va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\
(let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_sM) k_b in
(let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in
l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
0))
((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
1)))
((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
2)))
((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
3)))
((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
4)))
((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
5)))
((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
6)))
((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
7))
(Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 4)))) /\
l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 5)
)
((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.PPC64LE.Memory.buffer128",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.SHA.PPC64LE.SHA_helpers.hash256",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_or",
"Prims.eq2",
"Prims.int",
"Prims.op_LessThan",
"Prims.op_Addition",
"Vale.PPC64LE.Decls.va_get_reg",
"Vale.PPC64LE.Machine_s.pow2_64",
"Vale.PPC64LE.Decls.validSrcAddrsOffset128",
"Vale.PPC64LE.Decls.va_get_mem_heaplet",
"Prims.op_Division",
"Vale.PPC64LE.Decls.va_get_mem_layout",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.SHA.PPC64LE.SHA_helpers.k_reqs",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words_s.__proj__Mkfour__item__hi3",
"Vale.Def.Types_s.nat32",
"Vale.PPC64LE.Decls.va_get_vec",
"Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32",
"FStar.Seq.Base.index",
"Vale.SHA.PPC64LE.SHA_helpers.word",
"Vale.Arch.Types.add_wrap32",
"Vale.SHA.PPC64LE.SHA_helpers.k_index",
"Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale",
"Vale.SHA.PPC64LE.SHA_helpers.ws_opaque",
"Vale.Def.Words_s.__proj__Mkfour__item__hi2",
"Vale.Def.Words_s.__proj__Mkfour__item__lo1",
"FStar.Seq.Base.seq",
"Vale.Def.Types_s.quad32",
"Vale.PPC64LE.Decls.buffer128_as_seq",
"Prims.l_Forall",
"Vale.PPC64LE.Memory.nat64",
"Vale.PPC64LE.Memory.quad32",
"Prims.l_imp",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_vec",
"Vale.PPC64LE.Decls.va_upd_reg"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) | false | true | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Loop_rounds_0_59_a
(i: nat)
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_0_59_a | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
i: Prims.nat ->
k_b: Vale.PPC64LE.Memory.buffer128 ->
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
hash_orig: Vale.SHA.PPC64LE.SHA_helpers.hash256 ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 10,
"end_line": 258,
"start_col": 2,
"start_line": 201
} |
Prims.Tot | val va_wp_Loop_rounds_16_59_c
(i: nat)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Loop_rounds_16_59_c (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 24) (i == 40)) (i == 56) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 6))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 4 va_s0).hi3 == ws_opaque
block (i - 4))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 7
va_s0).hi3 == ws_opaque block (i - 1))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block i))
((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 10 va_s0).hi3 == ws_opaque
block (i - 14))) ((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 12
va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec 13 va_s0).hi3 == ws_opaque block (i -
11))) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32) (va_x_v11:quad32) (va_x_v12:quad32)
(va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25
va_x_v25 (va_upd_vec 12 va_x_v12 (va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0))))) in va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
ws_opaque block (i + 1)) ((va_get_vec 10 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec
11 va_sM).hi3 == ws_opaque block (i + 3))) ((va_get_vec 12 va_sM).hi3 == ws_opaque block (i +
4)) ==> va_k va_sM (()))) | val va_wp_Loop_rounds_16_59_c
(i: nat)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Loop_rounds_16_59_c
(i: nat)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(l_or (l_or (i == 24) (i == 40)) (i == 56) /\
l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 2 va_s0).hi3 ==
ws_opaque block (i - 6))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 5)))
((va_get_vec 4 va_s0).hi3 == ws_opaque block (i - 4)))
((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 3)))
((va_get_vec 7 va_s0).hi3 == ws_opaque block (i - 1)))
((va_get_vec 8 va_s0).hi3 == ws_opaque block i))
((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 15)))
((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 13)))
((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 12)))
((va_get_vec 13 va_s0).hi3 == ws_opaque block (i - 11))) /\
(forall (va_x_v9: quad32)
(va_x_v10: quad32)
(va_x_v11: quad32)
(va_x_v12: quad32)
(va_x_v25: quad32)
(va_x_v26: quad32).
let va_sM =
va_upd_vec 26
va_x_v26
(va_upd_vec 25
va_x_v25
(va_upd_vec 12
va_x_v12
(va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9 va_x_v9 va_s0)))))
in
va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 9 va_sM).hi3 == ws_opaque block (i + 1))
((va_get_vec 10 va_sM).hi3 == ws_opaque block (i + 2)))
((va_get_vec 11 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 12 va_sM).hi3 == ws_opaque block (i + 4)) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_or",
"Prims.eq2",
"Prims.int",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words_s.__proj__Mkfour__item__hi3",
"Vale.Def.Types_s.nat32",
"Vale.PPC64LE.Decls.va_get_vec",
"Vale.SHA.PPC64LE.SHA_helpers.ws_opaque",
"Prims.op_Subtraction",
"Prims.l_Forall",
"Vale.PPC64LE.Memory.quad32",
"Prims.l_imp",
"Prims.op_Addition",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_vec"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_d : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_d i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_d i)) =
(va_QProc (va_code_Loop_rounds_0_59_d i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_d i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_d i k_b block hash_orig))
//--
//-- Loop_rounds_60_63_b
val va_code_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_60_63_b : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_60_63_b : va_b0:va_code -> va_s0:va_state -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_60_63_b ()) va_s0 /\ va_get_ok va_s0 /\
(Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b 16
(va_get_mem_layout va_s0) Secret /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_s0) k_b in Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig /\ va_state_eq va_sM
(va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23 va_sM
(va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19 va_sM
(va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6 va_sM
(va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (Vale.PPC64LE.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg
6 va_s0) k_b 16 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale 60 block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks 60))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
60) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 61))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 62)) ((va_get_vec 15
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 63) /\ l_and (l_and ((va_get_vec 24
va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks 61) ((va_get_vec 24 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 62)) ((va_get_vec 24 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.k_index ks 63))) /\ (forall (va_x_r6:nat64) (va_x_v16:quad32)
(va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32) (va_x_v21:quad32)
(va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32) (va_x_v26:quad32) . let
va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24 va_x_v24 (va_upd_vec 23
va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20 va_x_v20 (va_upd_vec 19
va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16 va_x_v16 (va_upd_reg 6
va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\
Vale.SHA.PPC64LE.SHA_helpers.make_seperated_hash_quad32 (va_get_vec 16 va_sM) (va_get_vec 17
va_sM) (va_get_vec 18 va_sM) (va_get_vec 19 va_sM) (va_get_vec 20 va_sM) (va_get_vec 21 va_sM)
(va_get_vec 22 va_sM) (va_get_vec 23 va_sM) ==
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale_64 block hash_orig ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_60_63_b : k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_60_63_b k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_60_63_b (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_60_63_b ())) =
(va_QProc (va_code_Loop_rounds_60_63_b ()) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_60_63_b k_b block hash_orig)
(va_wpProof_Loop_rounds_60_63_b k_b block hash_orig))
//--
//-- Loop_rounds_1_3
val va_code_Loop_rounds_1_3 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_1_3 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_1_3 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_1_3 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 0 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 0 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 1 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1)
((va_get_vec 2 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ va_state_eq va_sM
(va_update_vec 3 va_sM (va_update_vec 2 va_sM (va_update_vec 1 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_1_3 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 0 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 0 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 0 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32)
(va_x_v3:quad32) . let va_sM = va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1 va_x_v1
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 1) ((va_get_vec 2 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 2)) ((va_get_vec 3 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 3) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_1_3 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_1_3 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3;
va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_1_3 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_1_3 ())) =
(va_QProc (va_code_Loop_rounds_1_3 ()) ([va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1])
(va_wp_Loop_rounds_1_3 block) (va_wpProof_Loop_rounds_1_3 block))
//--
//-- Loop_rounds_5_7
val va_code_Loop_rounds_5_7 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_5_7 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_5_7 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_5_7 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 4 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 4 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 5 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5)
((va_get_vec 6 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ va_state_eq va_sM
(va_update_vec 7 va_sM (va_update_vec 6 va_sM (va_update_vec 5 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_5_7 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 4 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 4 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 4 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) /\ (forall (va_x_v5:quad32) (va_x_v6:quad32)
(va_x_v7:quad32) . let va_sM = va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5
va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 5 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 5) ((va_get_vec 6 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 6)) ((va_get_vec 7 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 7) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_5_7 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_5_7 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7;
va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_5_7 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_5_7 ())) =
(va_QProc (va_code_Loop_rounds_5_7 ()) ([va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5])
(va_wp_Loop_rounds_5_7 block) (va_wpProof_Loop_rounds_5_7 block))
//--
//-- Loop_rounds_9_11
val va_code_Loop_rounds_9_11 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_9_11 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_9_11 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_9_11 ()) va_s0 /\ va_get_ok va_s0 /\ l_and
(l_and ((va_get_vec 8 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 8 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 9 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9)
((va_get_vec 10 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ va_state_eq va_sM
(va_update_vec 11 va_sM (va_update_vec 10 va_sM (va_update_vec 9 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_9_11 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 8 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 8 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 8 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) /\ (forall (va_x_v9:quad32) (va_x_v10:quad32)
(va_x_v11:quad32) . let va_sM = va_upd_vec 11 va_x_v11 (va_upd_vec 10 va_x_v10 (va_upd_vec 9
va_x_v9 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 9 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 9) ((va_get_vec 10 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 10)) ((va_get_vec 11 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 11) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_9_11 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_9_11 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11;
va_Mod_vec 10; va_Mod_vec 9]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_9_11 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_9_11 ())) =
(va_QProc (va_code_Loop_rounds_9_11 ()) ([va_Mod_vec 11; va_Mod_vec 10; va_Mod_vec 9])
(va_wp_Loop_rounds_9_11 block) (va_wpProof_Loop_rounds_9_11 block))
//--
//-- Loop_rounds_13_15
val va_code_Loop_rounds_13_15 : va_dummy:unit -> Tot va_code
val va_codegen_success_Loop_rounds_13_15 : va_dummy:unit -> Tot va_pbool
val va_lemma_Loop_rounds_13_15 : va_b0:va_code -> va_s0:va_state -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_13_15 ()) va_s0 /\ va_get_ok va_s0 /\
l_and (l_and ((va_get_vec 12 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 12 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12
va_s0).lo0 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and ((va_get_vec 13 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13)
((va_get_vec 14 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15
va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ va_state_eq va_sM
(va_update_vec 15 va_sM (va_update_vec 14 va_sM (va_update_vec 13 va_sM (va_update_ok va_sM
va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_13_15 (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
Type0 =
(va_get_ok va_s0 /\ l_and (l_and ((va_get_vec 12 va_s0).hi2 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 12 va_s0).lo1 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 12 va_s0).lo0 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) /\ (forall (va_x_v13:quad32) (va_x_v14:quad32)
(va_x_v15:quad32) . let va_sM = va_upd_vec 15 va_x_v15 (va_upd_vec 14 va_x_v14 (va_upd_vec 13
va_x_v13 va_s0)) in va_get_ok va_sM /\ l_and (l_and ((va_get_vec 13 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 13) ((va_get_vec 14 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 14)) ((va_get_vec 15 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block 15) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_13_15 : block:block_w -> va_s0:va_state -> va_k:(va_state -> unit ->
Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_13_15 block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15;
va_Mod_vec 14; va_Mod_vec 13]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_13_15 (block:block_w) : (va_quickCode unit (va_code_Loop_rounds_13_15 ()))
=
(va_QProc (va_code_Loop_rounds_13_15 ()) ([va_Mod_vec 15; va_Mod_vec 14; va_Mod_vec 13])
(va_wp_Loop_rounds_13_15 block) (va_wpProof_Loop_rounds_13_15 block))
//--
//-- Loop_rounds_16_59_a
val va_code_Loop_rounds_16_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i) ((va_get_vec 1 va_s0).hi3
== ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4 va_s0).hi3 == ws_opaque
block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 10
va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 5)))
((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec 13 va_s0).hi3 == ws_opaque
block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 1)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 2
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 4 va_sM (va_update_vec 3 va_sM (va_update_vec 2
va_sM (va_update_vec 1 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_a (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 16) (i == 32)) (i == 48) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block i)
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 15))) ((va_get_vec 2 va_s0).hi3 == ws_opaque
block (i - 14))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 4
va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec 5 va_s0).hi3 == ws_opaque block (i -
11))) ((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 6))) ((va_get_vec 11 va_s0).hi3 ==
ws_opaque block (i - 5))) ((va_get_vec 12 va_s0).hi3 == ws_opaque block (i - 4))) ((va_get_vec
13 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i -
1))) /\ (forall (va_x_v1:quad32) (va_x_v2:quad32) (va_x_v3:quad32) (va_x_v4:quad32)
(va_x_v25:quad32) (va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25
va_x_v25 (va_upd_vec 4 va_x_v4 (va_upd_vec 3 va_x_v3 (va_upd_vec 2 va_x_v2 (va_upd_vec 1
va_x_v1 va_s0))))) in va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 1 va_sM).hi3 ==
ws_opaque block (i + 1)) ((va_get_vec 2 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 3
va_sM).hi3 == ws_opaque block (i + 3))) ((va_get_vec 4 va_sM).hi3 == ws_opaque block (i + 4))
==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_a : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_a i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 4; va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_a (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_a i)) =
(va_QProc (va_code_Loop_rounds_16_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 4;
va_Mod_vec 3; va_Mod_vec 2; va_Mod_vec 1]) (va_wp_Loop_rounds_16_59_a i block)
(va_wpProof_Loop_rounds_16_59_a i block))
//--
//-- Loop_rounds_16_59_b
val va_code_Loop_rounds_16_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 20) (i == 36)) (i == 52) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 4)) ((va_get_vec 1
va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 3 va_s0).hi3 == ws_opaque block (i - 1)))
((va_get_vec 4 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 5 va_s0).hi3 == ws_opaque block
(i - 15))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14))) ((va_get_vec 7 va_s0).hi3 ==
ws_opaque block (i - 13))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i - 12))) ((va_get_vec
9 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 14 va_s0).hi3 == ws_opaque block (i -
6))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 6
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 7 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 8 va_sM (va_update_vec 7 va_sM (va_update_vec 6
va_sM (va_update_vec 5 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_b (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit ->
Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 20) (i == 36)) (i == 52) /\ l_and (l_and (l_and (l_and
(l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == ws_opaque block (i - 4))
((va_get_vec 1 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 3 va_s0).hi3 == ws_opaque
block (i - 1))) ((va_get_vec 4 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 5 va_s0).hi3 ==
ws_opaque block (i - 15))) ((va_get_vec 6 va_s0).hi3 == ws_opaque block (i - 14))) ((va_get_vec
7 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block (i -
12))) ((va_get_vec 9 va_s0).hi3 == ws_opaque block (i - 11))) ((va_get_vec 14 va_s0).hi3 ==
ws_opaque block (i - 6))) ((va_get_vec 15 va_s0).hi3 == ws_opaque block (i - 5))) /\ (forall
(va_x_v5:quad32) (va_x_v6:quad32) (va_x_v7:quad32) (va_x_v8:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 8
va_x_v8 (va_upd_vec 7 va_x_v7 (va_upd_vec 6 va_x_v6 (va_upd_vec 5 va_x_v5 va_s0))))) in
va_get_ok va_sM /\ l_and (l_and (l_and ((va_get_vec 5 va_sM).hi3 == ws_opaque block (i + 1))
((va_get_vec 6 va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 7 va_sM).hi3 == ws_opaque
block (i + 3))) ((va_get_vec 8 va_sM).hi3 == ws_opaque block (i + 4)) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_59_b : i:nat -> block:block_w -> va_s0:va_state -> va_k:(va_state ->
unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_59_b i block va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_59_b i) ([va_Mod_vec
26; va_Mod_vec 25; va_Mod_vec 8; va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_59_b (i:nat) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_59_b i)) =
(va_QProc (va_code_Loop_rounds_16_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 8;
va_Mod_vec 7; va_Mod_vec 6; va_Mod_vec 5]) (va_wp_Loop_rounds_16_59_b i block)
(va_wpProof_Loop_rounds_16_59_b i block))
//--
//-- Loop_rounds_16_59_c
val va_code_Loop_rounds_16_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_16_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_16_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 24) (i == 40)) (i == 56) /\ l_and (l_and (l_and (l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 2 va_s0).hi3 == ws_opaque block (i - 6)) ((va_get_vec 3
va_s0).hi3 == ws_opaque block (i - 5))) ((va_get_vec 4 va_s0).hi3 == ws_opaque block (i - 4)))
((va_get_vec 5 va_s0).hi3 == ws_opaque block (i - 3))) ((va_get_vec 7 va_s0).hi3 == ws_opaque
block (i - 1))) ((va_get_vec 8 va_s0).hi3 == ws_opaque block i)) ((va_get_vec 9 va_s0).hi3 ==
ws_opaque block (i - 15))) ((va_get_vec 10 va_s0).hi3 == ws_opaque block (i - 14)))
((va_get_vec 11 va_s0).hi3 == ws_opaque block (i - 13))) ((va_get_vec 12 va_s0).hi3 ==
ws_opaque block (i - 12))) ((va_get_vec 13 va_s0).hi3 == ws_opaque block (i - 11)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
l_and (l_and (l_and ((va_get_vec 9 va_sM).hi3 == ws_opaque block (i + 1)) ((va_get_vec 10
va_sM).hi3 == ws_opaque block (i + 2))) ((va_get_vec 11 va_sM).hi3 == ws_opaque block (i + 3)))
((va_get_vec 12 va_sM).hi3 == ws_opaque block (i + 4)) /\ va_state_eq va_sM (va_update_vec 26
va_sM (va_update_vec 25 va_sM (va_update_vec 12 va_sM (va_update_vec 11 va_sM (va_update_vec 10
va_sM (va_update_vec 9 va_sM (va_update_ok va_sM va_s0)))))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_59_c (i:nat) (block:block_w) (va_s0:va_state) (va_k:(va_state -> unit -> | false | true | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Loop_rounds_16_59_c
(i: nat)
(block: block_w)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_16_59_c | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
i: Prims.nat ->
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 29,
"end_line": 1133,
"start_col": 2,
"start_line": 1119
} |
Prims.Tot | val va_wp_Loop_rounds_0_59_b
(i: nat)
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(()))) | val va_wp_Loop_rounds_0_59_b
(i: nat)
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Loop_rounds_0_59_b
(i: nat)
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0)
k_b
(i `op_Division` 4 + 1)
1
(va_get_mem_layout va_s0)
Secret /\
(let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\
(let hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in
l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
hash
0))
((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
hash
1)))
((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
2)))
((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
3)))
((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
4)))
((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
5)))
((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
6)))
((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
hash
7))
(Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block i)
((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\
l_and (l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2)))
((va_get_vec 24 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\
(forall (va_x_r6: nat64) (va_x_v16: quad32) (va_x_v17: quad32) (va_x_v18: quad32)
(va_x_v19: quad32) (va_x_v20: quad32) (va_x_v21: quad32) (va_x_v22: quad32) (va_x_v23: quad32)
(va_x_v24: quad32) (va_x_v25: quad32) (va_x_v26: quad32).
let va_sM =
va_upd_vec 26
va_x_v26
(va_upd_vec 25
va_x_v25
(va_upd_vec 24
va_x_v24
(va_upd_vec 23
va_x_v23
(va_upd_vec 22
va_x_v22
(va_upd_vec 21
va_x_v21
(va_upd_vec 20
va_x_v20
(va_upd_vec 19
va_x_v19
(va_upd_vec 18
va_x_v18
(va_upd_vec 17
va_x_v17
(va_upd_vec 16 va_x_v16 (va_upd_reg 6 va_x_r6 va_s0)))
))))))))
in
va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\
(let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_sM) k_b in
(let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in
l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
0))
((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
1)))
((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
2)))
((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
3)))
((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
4)))
((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
5)))
((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
6)))
((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
7))
(Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 4)))) /\
l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 5)
)
((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.PPC64LE.Memory.buffer128",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.SHA.PPC64LE.SHA_helpers.hash256",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_or",
"Prims.eq2",
"Prims.int",
"Prims.op_LessThan",
"Prims.op_Addition",
"Vale.PPC64LE.Decls.va_get_reg",
"Vale.PPC64LE.Machine_s.pow2_64",
"Vale.PPC64LE.Decls.validSrcAddrsOffset128",
"Vale.PPC64LE.Decls.va_get_mem_heaplet",
"Prims.op_Division",
"Vale.PPC64LE.Decls.va_get_mem_layout",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.SHA.PPC64LE.SHA_helpers.k_reqs",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words_s.__proj__Mkfour__item__hi3",
"Vale.Def.Types_s.nat32",
"Vale.PPC64LE.Decls.va_get_vec",
"Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32",
"FStar.Seq.Base.index",
"Vale.SHA.PPC64LE.SHA_helpers.word",
"Vale.Arch.Types.add_wrap32",
"Vale.SHA.PPC64LE.SHA_helpers.k_index",
"Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale",
"Vale.SHA.PPC64LE.SHA_helpers.ws_opaque",
"Vale.Def.Words_s.__proj__Mkfour__item__hi2",
"Vale.Def.Words_s.__proj__Mkfour__item__lo1",
"FStar.Seq.Base.seq",
"Vale.Def.Types_s.quad32",
"Vale.PPC64LE.Decls.buffer128_as_seq",
"Prims.l_Forall",
"Vale.PPC64LE.Memory.nat64",
"Vale.PPC64LE.Memory.quad32",
"Prims.l_imp",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_vec",
"Vale.PPC64LE.Decls.va_upd_reg"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) | false | true | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Loop_rounds_0_59_b
(i: nat)
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_0_59_b | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
i: Prims.nat ->
k_b: Vale.PPC64LE.Memory.buffer128 ->
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
hash_orig: Vale.SHA.PPC64LE.SHA_helpers.hash256 ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 10,
"end_line": 403,
"start_col": 2,
"start_line": 346
} |
Prims.Tot | val va_wp_Loop_rounds_0_59_d
(i: nat)
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.SHA2.Wrapper",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Loops",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.SHA_helpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsVector",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA.PPC64LE.Rounds",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 <
pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6
va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(()))) | val va_wp_Loop_rounds_0_59_d
(i: nat)
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Loop_rounds_0_59_d
(i: nat)
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0)
k_b
(i `op_Division` 4 + 1)
1
(va_get_mem_layout va_s0)
Secret /\
(let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\
(let hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in
l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
hash
0))
((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
hash
1)))
((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
2)))
((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
3)))
((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
4)))
((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
5)))
((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
hash
6)))
((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
hash
7))
(Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block i)
((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\
l_and (l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2)))
((va_get_vec 24 va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\
(forall (va_x_r6: nat64) (va_x_v16: quad32) (va_x_v17: quad32) (va_x_v18: quad32)
(va_x_v19: quad32) (va_x_v20: quad32) (va_x_v21: quad32) (va_x_v22: quad32) (va_x_v23: quad32)
(va_x_v24: quad32) (va_x_v25: quad32) (va_x_v26: quad32).
let va_sM =
va_upd_vec 26
va_x_v26
(va_upd_vec 25
va_x_v25
(va_upd_vec 24
va_x_v24
(va_upd_vec 23
va_x_v23
(va_upd_vec 22
va_x_v22
(va_upd_vec 21
va_x_v21
(va_upd_vec 20
va_x_v20
(va_upd_vec 19
va_x_v19
(va_upd_vec 18
va_x_v18
(va_upd_vec 17
va_x_v17
(va_upd_vec 16 va_x_v16 (va_upd_reg 6 va_x_r6 va_s0)))
))))))))
in
va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\
(let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_sM) k_b in
(let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in
l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
0))
((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
1)))
((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
2)))
((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
3)))
((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
4)))
((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
5)))
((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
6)))
((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word
next_hash
7))
(Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 4)))) /\
l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 5)
)
((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti.checked",
"dependencies": [
"Vale.SHA2.Wrapper.fsti.checked",
"Vale.SHA.PPC64LE.SHA_helpers.fsti.checked",
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCodes.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.InsVector.fsti.checked",
"Vale.PPC64LE.InsStack.fsti.checked",
"Vale.PPC64LE.InsMem.fsti.checked",
"Vale.PPC64LE.InsBasic.fsti.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"Spec.SHA2.fsti.checked",
"Spec.Loops.fst.checked",
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.Hash.fsti.checked",
"prims.fst.checked",
"FStar.Seq.Base.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.PPC64LE.Rounds.Core.fsti"
} | [
"total"
] | [
"Prims.nat",
"Vale.PPC64LE.Memory.buffer128",
"Vale.SHA.PPC64LE.SHA_helpers.block_w",
"Vale.SHA.PPC64LE.SHA_helpers.hash256",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_or",
"Prims.eq2",
"Prims.int",
"Prims.op_LessThan",
"Prims.op_Addition",
"Vale.PPC64LE.Decls.va_get_reg",
"Vale.PPC64LE.Machine_s.pow2_64",
"Vale.PPC64LE.Decls.validSrcAddrsOffset128",
"Vale.PPC64LE.Decls.va_get_mem_heaplet",
"Prims.op_Division",
"Vale.PPC64LE.Decls.va_get_mem_layout",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.SHA.PPC64LE.SHA_helpers.k_reqs",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words_s.__proj__Mkfour__item__hi3",
"Vale.Def.Types_s.nat32",
"Vale.PPC64LE.Decls.va_get_vec",
"Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32",
"FStar.Seq.Base.index",
"Vale.SHA.PPC64LE.SHA_helpers.word",
"Vale.Arch.Types.add_wrap32",
"Vale.SHA.PPC64LE.SHA_helpers.k_index",
"Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale",
"Vale.SHA.PPC64LE.SHA_helpers.ws_opaque",
"Vale.Def.Words_s.__proj__Mkfour__item__hi2",
"Vale.Def.Words_s.__proj__Mkfour__item__lo1",
"FStar.Seq.Base.seq",
"Vale.Def.Types_s.quad32",
"Vale.PPC64LE.Decls.buffer128_as_seq",
"Prims.l_Forall",
"Vale.PPC64LE.Memory.nat64",
"Vale.PPC64LE.Memory.quad32",
"Prims.l_imp",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_vec",
"Vale.PPC64LE.Decls.va_upd_reg"
] | [] | module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body
val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
`op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
(va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
(va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
(Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
: (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
(va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
in_b offset))
//--
//-- Loop_rounds_16_63_body
val va_code_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr ->
msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_code
val va_codegen_success_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr ->
msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> Tot va_pbool
val va_lemma_Loop_rounds_16_63_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr -> msg2:va_operand_vec_opr ->
msg3:va_operand_vec_opr -> block:block_w
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) va_s0 /\
va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2)))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let sigma0 = sigma256_0_0 (ws_opaque block (i - 15)) in let sigma1 = sigma256_0_1 (ws_opaque
block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 == add_wrap32 (add_wrap32 (add_wrap32
(ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block (i - 7)) /\ (va_eval_vec_opr va_sM
msg0).hi3 == ws_opaque block i) /\ va_state_eq va_sM (va_update_vec 26 va_sM (va_update_vec 25
va_sM (va_update_ok va_sM (va_update_operand_vec_opr msg0 va_sM va_s0))))))
[@ va_qattr]
let va_wp_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_vec_opr msg0 va_s0 /\ va_is_src_vec_opr msg1 va_s0 /\ va_is_src_vec_opr msg2 va_s0 /\
va_is_src_vec_opr msg3 va_s0 /\ va_get_ok va_s0 /\ (l_and (16 <= i) (i < 64) /\ (let j = i
`op_Modulus` 16 in msg0 == j /\ msg1 == (j + 1) `op_Modulus` 16 /\ msg2 == (j + 9) `op_Modulus`
16 /\ msg3 == (j + 14) `op_Modulus` 16 /\ (va_eval_vec_opr va_s0 msg0).hi3 == ws_opaque block
(i - 16) /\ (va_eval_vec_opr va_s0 msg1).hi3 == ws_opaque block (i - 15) /\ (va_eval_vec_opr
va_s0 msg2).hi3 == ws_opaque block (i - 7) /\ (va_eval_vec_opr va_s0 msg3).hi3 == ws_opaque
block (i - 2))) /\ (forall (va_x_msg0:va_value_vec_opr) (va_x_v25:quad32) (va_x_v26:quad32) .
let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_operand_vec_opr msg0
va_x_msg0 va_s0)) in va_get_ok va_sM /\ (let sigma0 = sigma256_0_0 (ws_opaque block (i - 15))
in let sigma1 = sigma256_0_1 (ws_opaque block (i - 2)) in (va_eval_vec_opr va_sM msg0).hi3 ==
add_wrap32 (add_wrap32 (add_wrap32 (ws_opaque block (i - 16)) sigma0) sigma1) (ws_opaque block
(i - 7)) /\ (va_eval_vec_opr va_sM msg0).hi3 == ws_opaque block i) ==> va_k va_sM (())))
val va_wpProof_Loop_rounds_16_63_body : i:nat -> msg0:va_operand_vec_opr -> msg1:va_operand_vec_opr
-> msg2:va_operand_vec_opr -> msg3:va_operand_vec_opr -> block:block_w -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block va_s0
va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_16_63_body i msg0 msg1
msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25; va_mod_vec_opr msg0]) va_s0 va_k ((va_sM, va_f0,
va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_16_63_body (i:nat) (msg0:va_operand_vec_opr) (msg1:va_operand_vec_opr)
(msg2:va_operand_vec_opr) (msg3:va_operand_vec_opr) (block:block_w) : (va_quickCode unit
(va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3)) =
(va_QProc (va_code_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3) ([va_Mod_vec 26; va_Mod_vec 25;
va_mod_vec_opr msg0]) (va_wp_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block)
(va_wpProof_Loop_rounds_16_63_body i msg0 msg1 msg2 msg3 block))
//--
//-- Loop_rounds_0_59_a
val va_code_Loop_rounds_0_59_a : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_a : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_a : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_a i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 0) (i == 16)) (i == 32)) (i == 48) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 0 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 1 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 2 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 3 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_a : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_a i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_a (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_a i)) =
(va_QProc (va_code_Loop_rounds_0_59_a i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_a i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_a i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_b
val va_code_Loop_rounds_0_59_b : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_b : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_b : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_b i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 4) (i == 20)) (i == 36)) (i == 52) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 4 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 5 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 6 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 7 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_b : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_b i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_b (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_b i)) =
(va_QProc (va_code_Loop_rounds_0_59_b i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_b i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_b i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_c
val va_code_Loop_rounds_0_59_c : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_c : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_c : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_c i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6 va_s0 + 16 < pow2_64
/\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0)
k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (l_or (l_or (l_or (i == 8) (i == 24)) (i == 40)) (i == 56) /\ va_get_reg 6
va_s0 + 16 < pow2_64 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0)
(va_get_reg 6 va_s0) k_b (i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks
= Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 16 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 19 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 20 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 23 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 8 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 9 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 10 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 11 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3)))) /\ (forall (va_x_r6:nat64)
(va_x_v16:quad32) (va_x_v17:quad32) (va_x_v18:quad32) (va_x_v19:quad32) (va_x_v20:quad32)
(va_x_v21:quad32) (va_x_v22:quad32) (va_x_v23:quad32) (va_x_v24:quad32) (va_x_v25:quad32)
(va_x_v26:quad32) . let va_sM = va_upd_vec 26 va_x_v26 (va_upd_vec 25 va_x_v25 (va_upd_vec 24
va_x_v24 (va_upd_vec 23 va_x_v23 (va_upd_vec 22 va_x_v22 (va_upd_vec 21 va_x_v21 (va_upd_vec 20
va_x_v20 (va_upd_vec 19 va_x_v19 (va_upd_vec 18 va_x_v18 (va_upd_vec 17 va_x_v17 (va_upd_vec 16
va_x_v16 (va_upd_reg 6 va_x_r6 va_s0))))))))))) in va_get_ok va_sM /\ (va_get_reg 6 va_sM ==
va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0
va_sM) k_b in (let next_hash = Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block
hash_orig in l_and (l_and (l_and (l_and (l_and (l_and (l_and ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 23 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 19 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) ==> va_k va_sM
(())))
val va_wpProof_Loop_rounds_0_59_c : i:nat -> k_b:buffer128 -> block:block_w -> hash_orig:hash256 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Loop_rounds_0_59_c i k_b block hash_orig va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26;
va_Mod_vec 25; va_Mod_vec 24; va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20;
va_Mod_vec 19; va_Mod_vec 18; va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) va_s0 va_k ((va_sM,
va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_0_59_c (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) :
(va_quickCode unit (va_code_Loop_rounds_0_59_c i)) =
(va_QProc (va_code_Loop_rounds_0_59_c i) ([va_Mod_vec 26; va_Mod_vec 25; va_Mod_vec 24;
va_Mod_vec 23; va_Mod_vec 22; va_Mod_vec 21; va_Mod_vec 20; va_Mod_vec 19; va_Mod_vec 18;
va_Mod_vec 17; va_Mod_vec 16; va_Mod_reg 6]) (va_wp_Loop_rounds_0_59_c i k_b block hash_orig)
(va_wpProof_Loop_rounds_0_59_c i k_b block hash_orig))
//--
//-- Loop_rounds_0_59_d
val va_code_Loop_rounds_0_59_d : i:nat -> Tot va_code
val va_codegen_success_Loop_rounds_0_59_d : i:nat -> Tot va_pbool
val va_lemma_Loop_rounds_0_59_d : va_b0:va_code -> va_s0:va_state -> i:nat -> k_b:buffer128 ->
block:block_w -> hash_orig:hash256
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Loop_rounds_0_59_d i) va_s0 /\ va_get_ok va_s0 /\
(l_or (l_or (i == 12) (i == 28)) (i == 44) /\ va_get_reg 6 va_s0 + 16 < pow2_64 /\
Vale.PPC64LE.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 0 va_s0) (va_get_reg 6 va_s0) k_b
(i `op_Division` 4 + 1) 1 (va_get_mem_layout va_s0) Secret /\ (let ks =
Vale.PPC64LE.Decls.buffer128_as_seq (va_get_mem_heaplet 0 va_s0) k_b in
Vale.SHA.PPC64LE.SHA_helpers.k_reqs ks /\ (let hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale i block hash_orig in l_and (l_and (l_and (l_and
(l_and (l_and (l_and ((va_get_vec 20 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32
(FStar.Seq.Base.index #Vale.SHA.PPC64LE.SHA_helpers.word hash 0)) ((va_get_vec 21 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 1))) ((va_get_vec 22 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 2))) ((va_get_vec 23 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 3))) ((va_get_vec 16 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 4))) ((va_get_vec 17 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 5))) ((va_get_vec 18 va_s0).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 6))) ((va_get_vec 19 va_s0).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks i))) /\
l_and (l_and (l_and ((va_get_vec 12 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block
i) ((va_get_vec 13 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 1)))
((va_get_vec 14 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 2)))
((va_get_vec 15 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.ws_opaque block (i + 3)) /\ l_and
(l_and ((va_get_vec 24 va_s0).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 1))
((va_get_vec 24 va_s0).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 2))) ((va_get_vec 24
va_s0).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 3))))))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(va_get_reg 6 va_sM == va_get_reg 6 va_s0 + 16 /\ (let ks = Vale.PPC64LE.Decls.buffer128_as_seq
(va_get_mem_heaplet 0 va_sM) k_b in (let next_hash =
Vale.SHA.PPC64LE.SHA_helpers.repeat_range_vale (i + 4) block hash_orig in l_and (l_and (l_and
(l_and (l_and (l_and (l_and ((va_get_vec 16 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 0)) ((va_get_vec 17 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 1))) ((va_get_vec 18 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 2))) ((va_get_vec 19 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 3))) ((va_get_vec 20 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 4))) ((va_get_vec 21 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 5))) ((va_get_vec 22 va_sM).hi3 ==
Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 6))) ((va_get_vec 23 va_sM).hi3 ==
Vale.Arch.Types.add_wrap32 (Vale.SHA.PPC64LE.SHA_helpers.word_to_nat32 (FStar.Seq.Base.index
#Vale.SHA.PPC64LE.SHA_helpers.word next_hash 7)) (Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i +
4)))) /\ l_and (l_and ((va_get_vec 24 va_sM).hi3 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i
+ 5)) ((va_get_vec 24 va_sM).hi2 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 6)))
((va_get_vec 24 va_sM).lo1 == Vale.SHA.PPC64LE.SHA_helpers.k_index ks (i + 7)))) /\ va_state_eq
va_sM (va_update_vec 26 va_sM (va_update_vec 25 va_sM (va_update_vec 24 va_sM (va_update_vec 23
va_sM (va_update_vec 22 va_sM (va_update_vec 21 va_sM (va_update_vec 20 va_sM (va_update_vec 19
va_sM (va_update_vec 18 va_sM (va_update_vec 17 va_sM (va_update_vec 16 va_sM (va_update_reg 6
va_sM (va_update_ok va_sM va_s0)))))))))))))))
[@ va_qattr]
let va_wp_Loop_rounds_0_59_d (i:nat) (k_b:buffer128) (block:block_w) (hash_orig:hash256) | false | true | Vale.SHA.PPC64LE.Rounds.Core.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 2000,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Loop_rounds_0_59_d
(i: nat)
(k_b: buffer128)
(block: block_w)
(hash_orig: hash256)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_0_59_d | {
"file_name": "obj/Vale.SHA.PPC64LE.Rounds.Core.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
i: Prims.nat ->
k_b: Vale.PPC64LE.Memory.buffer128 ->
block: Vale.SHA.PPC64LE.SHA_helpers.block_w ->
hash_orig: Vale.SHA.PPC64LE.SHA_helpers.hash256 ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 10,
"end_line": 693,
"start_col": 2,
"start_line": 636
} |
Prims.Tot | val mk_extract:
a: fixed_len_alg ->
hmac: Hacl.HMAC.compute_st a ->
extract_st a | [
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "Seq"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "LB"
},
{
"abbrev": true,
"full_module": "Lib.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.HKDF",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let mk_extract a hmac prk salt saltlen ikm ikmlen =
hmac prk salt saltlen ikm ikmlen | val mk_extract:
a: fixed_len_alg ->
hmac: Hacl.HMAC.compute_st a ->
extract_st a
let mk_extract a hmac prk salt saltlen ikm ikmlen = | false | null | false | hmac prk salt saltlen ikm ikmlen | {
"checked_file": "Hacl.HKDF.fst.checked",
"dependencies": [
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"prims.fst.checked",
"LowStar.Buffer.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fst.checked",
"Lib.Buffer.fsti.checked",
"Hacl.HMAC.fsti.checked",
"Hacl.Hash.Definitions.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.HKDF.fst"
} | [
"total"
] | [
"Spec.Hash.Definitions.fixed_len_alg",
"Hacl.HMAC.compute_st",
"LowStar.Buffer.buffer",
"Lib.IntTypes.uint8",
"Lib.IntTypes.pub_uint32",
"Prims.unit"
] | [] | module Hacl.HKDF
open FStar.Seq
module B = Lib.Buffer
module LB = LowStar.Buffer
open Spec.Hash.Definitions
open Spec.Agile.HKDF
open FStar.Mul
open FStar.HyperStack
open FStar.HyperStack.ST
open Lib.Buffer
friend Spec.Agile.HKDF
friend Lib.IntTypes
module Seq = Lib.Sequence
// TODO: proofs break mysteriously when not befriending Lib.IntTypes and
// declassifying uint8; investigate
// assume val declassify8: squash (uint8 == UInt8.t)
module ST = FStar.HyperStack.ST
#set-options "--max_fuel 0 --max_ifuel 0 --z3rlimit 100" | false | false | Hacl.HKDF.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val mk_extract:
a: fixed_len_alg ->
hmac: Hacl.HMAC.compute_st a ->
extract_st a | [] | Hacl.HKDF.mk_extract | {
"file_name": "code/hkdf/Hacl.HKDF.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | a: Spec.Hash.Definitions.fixed_len_alg -> hmac: Hacl.HMAC.compute_st a -> Hacl.HKDF.extract_st a | {
"end_col": 34,
"end_line": 30,
"start_col": 2,
"start_line": 30
} |
FStar.Pervasives.Lemma | val hmac_input_fits: a:fixed_len_alg -> Lemma
((pow2 32 + block_length a) `less_than_max_input_length` a) | [
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "Seq"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.HKDF",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "LB"
},
{
"abbrev": true,
"full_module": "Lib.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.HKDF",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let hmac_input_fits a =
allow_inversion fixed_len_alg;
match a with
| MD5 ->
assert_norm (pow2 32 + block_length MD5 <= Some?.v (max_input_length MD5))
| SHA1 ->
assert_norm (pow2 32 + block_length SHA1 <= Some?.v (max_input_length SHA1))
| SHA2_224 ->
assert_norm (pow2 32 + block_length SHA2_224 <= Some?.v (max_input_length SHA2_224))
| SHA2_256 ->
assert_norm (pow2 32 + block_length SHA2_256 <= Some?.v (max_input_length SHA2_256))
| SHA2_384 ->
assert_norm (pow2 32 + block_length SHA2_384 <= Some?.v (max_input_length SHA2_384))
| SHA2_512 ->
assert_norm (pow2 32 + block_length SHA2_512 <= Some?.v (max_input_length SHA2_512))
| Blake2S ->
assert_norm (pow2 32 + block_length Blake2S <= Some?.v (max_input_length Blake2S))
| Blake2B ->
assert_norm (pow2 32 + block_length Blake2B <= Some?.v (max_input_length Blake2B))
| SHA3_224 -> ()
| SHA3_256 -> ()
| SHA3_384 -> ()
| SHA3_512 -> () | val hmac_input_fits: a:fixed_len_alg -> Lemma
((pow2 32 + block_length a) `less_than_max_input_length` a)
let hmac_input_fits a = | false | null | true | allow_inversion fixed_len_alg;
match a with
| MD5 -> assert_norm (pow2 32 + block_length MD5 <= Some?.v (max_input_length MD5))
| SHA1 -> assert_norm (pow2 32 + block_length SHA1 <= Some?.v (max_input_length SHA1))
| SHA2_224 -> assert_norm (pow2 32 + block_length SHA2_224 <= Some?.v (max_input_length SHA2_224))
| SHA2_256 -> assert_norm (pow2 32 + block_length SHA2_256 <= Some?.v (max_input_length SHA2_256))
| SHA2_384 -> assert_norm (pow2 32 + block_length SHA2_384 <= Some?.v (max_input_length SHA2_384))
| SHA2_512 -> assert_norm (pow2 32 + block_length SHA2_512 <= Some?.v (max_input_length SHA2_512))
| Blake2S -> assert_norm (pow2 32 + block_length Blake2S <= Some?.v (max_input_length Blake2S))
| Blake2B -> assert_norm (pow2 32 + block_length Blake2B <= Some?.v (max_input_length Blake2B))
| SHA3_224 -> ()
| SHA3_256 -> ()
| SHA3_384 -> ()
| SHA3_512 -> () | {
"checked_file": "Hacl.HKDF.fst.checked",
"dependencies": [
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"prims.fst.checked",
"LowStar.Buffer.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fst.checked",
"Lib.Buffer.fsti.checked",
"Hacl.HMAC.fsti.checked",
"Hacl.Hash.Definitions.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.HKDF.fst"
} | [
"lemma"
] | [
"Spec.Hash.Definitions.fixed_len_alg",
"FStar.Pervasives.assert_norm",
"Prims.b2t",
"Prims.op_LessThanOrEqual",
"Prims.op_Addition",
"Prims.pow2",
"Spec.Hash.Definitions.block_length",
"Spec.Hash.Definitions.MD5",
"FStar.Pervasives.Native.__proj__Some__item__v",
"Prims.pos",
"Spec.Hash.Definitions.max_input_length",
"Spec.Hash.Definitions.SHA1",
"Spec.Hash.Definitions.SHA2_224",
"Spec.Hash.Definitions.SHA2_256",
"Spec.Hash.Definitions.SHA2_384",
"Spec.Hash.Definitions.SHA2_512",
"Spec.Hash.Definitions.Blake2S",
"Spec.Hash.Definitions.Blake2B",
"Prims.unit",
"FStar.Pervasives.allow_inversion"
] | [] | module Hacl.HKDF
open FStar.Seq
module B = Lib.Buffer
module LB = LowStar.Buffer
open Spec.Hash.Definitions
open Spec.Agile.HKDF
open FStar.Mul
open FStar.HyperStack
open FStar.HyperStack.ST
open Lib.Buffer
friend Spec.Agile.HKDF
friend Lib.IntTypes
module Seq = Lib.Sequence
// TODO: proofs break mysteriously when not befriending Lib.IntTypes and
// declassifying uint8; investigate
// assume val declassify8: squash (uint8 == UInt8.t)
module ST = FStar.HyperStack.ST
#set-options "--max_fuel 0 --max_ifuel 0 --z3rlimit 100"
let mk_extract a hmac prk salt saltlen ikm ikmlen =
hmac prk salt saltlen ikm ikmlen
val hmac_input_fits: a:fixed_len_alg -> Lemma
((pow2 32 + block_length a) `less_than_max_input_length` a) | false | false | Hacl.HKDF.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val hmac_input_fits: a:fixed_len_alg -> Lemma
((pow2 32 + block_length a) `less_than_max_input_length` a) | [] | Hacl.HKDF.hmac_input_fits | {
"file_name": "code/hkdf/Hacl.HKDF.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | a: Spec.Hash.Definitions.fixed_len_alg
-> FStar.Pervasives.Lemma
(ensures
Spec.Hash.Definitions.less_than_max_input_length (Prims.pow2 32 +
Spec.Hash.Definitions.block_length a)
a) | {
"end_col": 18,
"end_line": 56,
"start_col": 2,
"start_line": 35
} |
Prims.Tot | val extract_sha2_512: extract_st SHA2_512 | [
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "Seq"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "LB"
},
{
"abbrev": true,
"full_module": "Lib.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.HKDF",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let extract_sha2_512: extract_st SHA2_512 =
mk_extract SHA2_512 Hacl.HMAC.compute_sha2_512 | val extract_sha2_512: extract_st SHA2_512
let extract_sha2_512:extract_st SHA2_512 = | false | null | false | mk_extract SHA2_512 Hacl.HMAC.compute_sha2_512 | {
"checked_file": "Hacl.HKDF.fst.checked",
"dependencies": [
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"prims.fst.checked",
"LowStar.Buffer.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fst.checked",
"Lib.Buffer.fsti.checked",
"Hacl.HMAC.fsti.checked",
"Hacl.Hash.Definitions.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.HKDF.fst"
} | [
"total"
] | [
"Hacl.HKDF.mk_extract",
"Spec.Hash.Definitions.SHA2_512",
"Hacl.HMAC.compute_sha2_512",
"Hacl.HKDF.extract_st"
] | [] | module Hacl.HKDF
open FStar.Seq
module B = Lib.Buffer
module LB = LowStar.Buffer
open Spec.Hash.Definitions
open Spec.Agile.HKDF
open FStar.Mul
open FStar.HyperStack
open FStar.HyperStack.ST
open Lib.Buffer
friend Spec.Agile.HKDF
friend Lib.IntTypes
module Seq = Lib.Sequence
// TODO: proofs break mysteriously when not befriending Lib.IntTypes and
// declassifying uint8; investigate
// assume val declassify8: squash (uint8 == UInt8.t)
module ST = FStar.HyperStack.ST
#set-options "--max_fuel 0 --max_ifuel 0 --z3rlimit 100"
let mk_extract a hmac prk salt saltlen ikm ikmlen =
hmac prk salt saltlen ikm ikmlen
val hmac_input_fits: a:fixed_len_alg -> Lemma
((pow2 32 + block_length a) `less_than_max_input_length` a)
let hmac_input_fits a =
allow_inversion fixed_len_alg;
match a with
| MD5 ->
assert_norm (pow2 32 + block_length MD5 <= Some?.v (max_input_length MD5))
| SHA1 ->
assert_norm (pow2 32 + block_length SHA1 <= Some?.v (max_input_length SHA1))
| SHA2_224 ->
assert_norm (pow2 32 + block_length SHA2_224 <= Some?.v (max_input_length SHA2_224))
| SHA2_256 ->
assert_norm (pow2 32 + block_length SHA2_256 <= Some?.v (max_input_length SHA2_256))
| SHA2_384 ->
assert_norm (pow2 32 + block_length SHA2_384 <= Some?.v (max_input_length SHA2_384))
| SHA2_512 ->
assert_norm (pow2 32 + block_length SHA2_512 <= Some?.v (max_input_length SHA2_512))
| Blake2S ->
assert_norm (pow2 32 + block_length Blake2S <= Some?.v (max_input_length Blake2S))
| Blake2B ->
assert_norm (pow2 32 + block_length Blake2B <= Some?.v (max_input_length Blake2B))
| SHA3_224 -> ()
| SHA3_256 -> ()
| SHA3_384 -> ()
| SHA3_512 -> ()
#push-options "--z3rlimit 300"
let mk_expand a hmac okm prk prklen info infolen len =
let tlen = Hash.Definitions.hash_len a in
let n = len /. tlen in
Math.Lemmas.lemma_div_mod (v len) (v tlen);
hmac_input_fits a;
[@inline_let]
let okm: B.lbuffer uint8 len = okm in
[@inline_let]
let prk: B.lbuffer uint8 prklen = prk in
[@inline_let]
let info: B.lbuffer uint8 infolen = info in
let output: B.lbuffer uint8 (n *! tlen) = B.sub okm 0ul (n *! tlen) in
push_frame ();
let text = B.create (tlen +! infolen +! 1ul) (u8 0) in
let text0: B.lbuffer uint8 (infolen +! 1ul) = B.sub text tlen (infolen +! 1ul) in
let tag = B.sub text 0ul tlen in
let ctr = B.sub text (tlen +! infolen) 1ul in
B.copy (B.sub text tlen infolen) info;
[@inline_let]
let a_spec = a_spec a in
[@inline_let]
let refl h (i:size_nat{i <= v n}) : GTot (a_spec i) =
if i = 0 then FStar.Seq.empty #uint8 else B.as_seq h tag
in
[@inline_let]
let footprint (i:size_nat{i <= v n}) :
GTot LB.(l:loc{loc_disjoint l (B.loc output) /\
address_liveness_insensitive_locs `loc_includes` l}) =
LB.loc_union (B.loc tag) (B.loc ctr)
in
[@inline_let]
let spec h0 : GTot (i:size_nat{i < v n} -> a_spec i -> a_spec (i + 1) & Seq.lseq uint8 (v tlen)) =
expand_loop a (B.as_seq h0 prk) (B.as_seq h0 info) (v n)
in
let h0 = ST.get () in
B.fill_blocks h0 tlen n output a_spec refl footprint spec (fun i ->
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (i +! 1ul);
let h1 = ST.get() in
if i = 0ul then
begin
Seq.eq_intro
(B.as_seq h1 text0)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (FStar.Seq.empty @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 0 (FStar.Seq.empty #uint8) in B.as_seq h2 tag == t)
end
else
begin
Seq.eq_intro
(B.as_seq h1 text)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (B.as_seq h1 tag @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 (v i) (B.as_seq h tag) in B.as_seq h2 tag == t)
end;
Seq.unfold_generate_blocks
(v tlen) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8) (v i);
//assert (v (i *! tlen) + v tlen <= v (n *! tlen));
B.copy (B.sub output (i *! tlen) tlen) tag
// let h3 = ST.get() in
// assert (
// footprint (v i + 1) `LB.loc_includes` footprint (v i) /\
// LB.modifies (LB.loc_union (footprint (v i + 1)) (B.loc block)) h h3);
//assert (
// let s, b = spec h0 (v i) (refl h (v i)) in
// refl h3 (v i + 1) == s /\ as_seq h3 block == b)
);
let h1 = ST.get () in
if n *! tlen <. len then
begin
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (n +! 1ul);
let h2 = ST.get() in
if n = 0ul then
begin
Seq.eq_intro
(B.as_seq h2 text0)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
end
else
begin
Seq.eq_intro
(B.as_seq h2 text)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
end;
let block = B.sub okm (n *! tlen) (len -! (n *! tlen)) in
B.copy block (B.sub tag 0ul (len -! (n *! tlen)))
end;
let h4 = ST.get() in
assert (
let tag', output' =
Seq.generate_blocks (v tlen) (v n) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8)
in
Seq.equal
(B.as_seq h4 okm)
(output' @| Seq.sub (B.as_seq h4 tag) 0 (v len - v n * v tlen)));
pop_frame ()
let expand_sha2_256: expand_st SHA2_256 =
mk_expand SHA2_256 Hacl.HMAC.compute_sha2_256
let extract_sha2_256: extract_st SHA2_256 =
mk_extract SHA2_256 Hacl.HMAC.compute_sha2_256
let expand_sha2_384: expand_st SHA2_384 =
mk_expand SHA2_384 Hacl.HMAC.compute_sha2_384
let extract_sha2_384: extract_st SHA2_384 =
mk_extract SHA2_384 Hacl.HMAC.compute_sha2_384
let expand_sha2_512: expand_st SHA2_512 =
mk_expand SHA2_512 Hacl.HMAC.compute_sha2_512 | false | true | Hacl.HKDF.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 300,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val extract_sha2_512: extract_st SHA2_512 | [] | Hacl.HKDF.extract_sha2_512 | {
"file_name": "code/hkdf/Hacl.HKDF.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Hacl.HKDF.extract_st Spec.Hash.Definitions.SHA2_512 | {
"end_col": 48,
"end_line": 187,
"start_col": 2,
"start_line": 187
} |
Prims.Tot | val expand_sha2_384: expand_st SHA2_384 | [
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "Seq"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "LB"
},
{
"abbrev": true,
"full_module": "Lib.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.HKDF",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let expand_sha2_384: expand_st SHA2_384 =
mk_expand SHA2_384 Hacl.HMAC.compute_sha2_384 | val expand_sha2_384: expand_st SHA2_384
let expand_sha2_384:expand_st SHA2_384 = | false | null | false | mk_expand SHA2_384 Hacl.HMAC.compute_sha2_384 | {
"checked_file": "Hacl.HKDF.fst.checked",
"dependencies": [
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"prims.fst.checked",
"LowStar.Buffer.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fst.checked",
"Lib.Buffer.fsti.checked",
"Hacl.HMAC.fsti.checked",
"Hacl.Hash.Definitions.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.HKDF.fst"
} | [
"total"
] | [
"Hacl.HKDF.mk_expand",
"Spec.Hash.Definitions.SHA2_384",
"Hacl.HMAC.compute_sha2_384",
"Hacl.HKDF.expand_st"
] | [] | module Hacl.HKDF
open FStar.Seq
module B = Lib.Buffer
module LB = LowStar.Buffer
open Spec.Hash.Definitions
open Spec.Agile.HKDF
open FStar.Mul
open FStar.HyperStack
open FStar.HyperStack.ST
open Lib.Buffer
friend Spec.Agile.HKDF
friend Lib.IntTypes
module Seq = Lib.Sequence
// TODO: proofs break mysteriously when not befriending Lib.IntTypes and
// declassifying uint8; investigate
// assume val declassify8: squash (uint8 == UInt8.t)
module ST = FStar.HyperStack.ST
#set-options "--max_fuel 0 --max_ifuel 0 --z3rlimit 100"
let mk_extract a hmac prk salt saltlen ikm ikmlen =
hmac prk salt saltlen ikm ikmlen
val hmac_input_fits: a:fixed_len_alg -> Lemma
((pow2 32 + block_length a) `less_than_max_input_length` a)
let hmac_input_fits a =
allow_inversion fixed_len_alg;
match a with
| MD5 ->
assert_norm (pow2 32 + block_length MD5 <= Some?.v (max_input_length MD5))
| SHA1 ->
assert_norm (pow2 32 + block_length SHA1 <= Some?.v (max_input_length SHA1))
| SHA2_224 ->
assert_norm (pow2 32 + block_length SHA2_224 <= Some?.v (max_input_length SHA2_224))
| SHA2_256 ->
assert_norm (pow2 32 + block_length SHA2_256 <= Some?.v (max_input_length SHA2_256))
| SHA2_384 ->
assert_norm (pow2 32 + block_length SHA2_384 <= Some?.v (max_input_length SHA2_384))
| SHA2_512 ->
assert_norm (pow2 32 + block_length SHA2_512 <= Some?.v (max_input_length SHA2_512))
| Blake2S ->
assert_norm (pow2 32 + block_length Blake2S <= Some?.v (max_input_length Blake2S))
| Blake2B ->
assert_norm (pow2 32 + block_length Blake2B <= Some?.v (max_input_length Blake2B))
| SHA3_224 -> ()
| SHA3_256 -> ()
| SHA3_384 -> ()
| SHA3_512 -> ()
#push-options "--z3rlimit 300"
let mk_expand a hmac okm prk prklen info infolen len =
let tlen = Hash.Definitions.hash_len a in
let n = len /. tlen in
Math.Lemmas.lemma_div_mod (v len) (v tlen);
hmac_input_fits a;
[@inline_let]
let okm: B.lbuffer uint8 len = okm in
[@inline_let]
let prk: B.lbuffer uint8 prklen = prk in
[@inline_let]
let info: B.lbuffer uint8 infolen = info in
let output: B.lbuffer uint8 (n *! tlen) = B.sub okm 0ul (n *! tlen) in
push_frame ();
let text = B.create (tlen +! infolen +! 1ul) (u8 0) in
let text0: B.lbuffer uint8 (infolen +! 1ul) = B.sub text tlen (infolen +! 1ul) in
let tag = B.sub text 0ul tlen in
let ctr = B.sub text (tlen +! infolen) 1ul in
B.copy (B.sub text tlen infolen) info;
[@inline_let]
let a_spec = a_spec a in
[@inline_let]
let refl h (i:size_nat{i <= v n}) : GTot (a_spec i) =
if i = 0 then FStar.Seq.empty #uint8 else B.as_seq h tag
in
[@inline_let]
let footprint (i:size_nat{i <= v n}) :
GTot LB.(l:loc{loc_disjoint l (B.loc output) /\
address_liveness_insensitive_locs `loc_includes` l}) =
LB.loc_union (B.loc tag) (B.loc ctr)
in
[@inline_let]
let spec h0 : GTot (i:size_nat{i < v n} -> a_spec i -> a_spec (i + 1) & Seq.lseq uint8 (v tlen)) =
expand_loop a (B.as_seq h0 prk) (B.as_seq h0 info) (v n)
in
let h0 = ST.get () in
B.fill_blocks h0 tlen n output a_spec refl footprint spec (fun i ->
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (i +! 1ul);
let h1 = ST.get() in
if i = 0ul then
begin
Seq.eq_intro
(B.as_seq h1 text0)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (FStar.Seq.empty @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 0 (FStar.Seq.empty #uint8) in B.as_seq h2 tag == t)
end
else
begin
Seq.eq_intro
(B.as_seq h1 text)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (B.as_seq h1 tag @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 (v i) (B.as_seq h tag) in B.as_seq h2 tag == t)
end;
Seq.unfold_generate_blocks
(v tlen) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8) (v i);
//assert (v (i *! tlen) + v tlen <= v (n *! tlen));
B.copy (B.sub output (i *! tlen) tlen) tag
// let h3 = ST.get() in
// assert (
// footprint (v i + 1) `LB.loc_includes` footprint (v i) /\
// LB.modifies (LB.loc_union (footprint (v i + 1)) (B.loc block)) h h3);
//assert (
// let s, b = spec h0 (v i) (refl h (v i)) in
// refl h3 (v i + 1) == s /\ as_seq h3 block == b)
);
let h1 = ST.get () in
if n *! tlen <. len then
begin
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (n +! 1ul);
let h2 = ST.get() in
if n = 0ul then
begin
Seq.eq_intro
(B.as_seq h2 text0)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
end
else
begin
Seq.eq_intro
(B.as_seq h2 text)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
end;
let block = B.sub okm (n *! tlen) (len -! (n *! tlen)) in
B.copy block (B.sub tag 0ul (len -! (n *! tlen)))
end;
let h4 = ST.get() in
assert (
let tag', output' =
Seq.generate_blocks (v tlen) (v n) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8)
in
Seq.equal
(B.as_seq h4 okm)
(output' @| Seq.sub (B.as_seq h4 tag) 0 (v len - v n * v tlen)));
pop_frame ()
let expand_sha2_256: expand_st SHA2_256 =
mk_expand SHA2_256 Hacl.HMAC.compute_sha2_256
let extract_sha2_256: extract_st SHA2_256 =
mk_extract SHA2_256 Hacl.HMAC.compute_sha2_256 | false | true | Hacl.HKDF.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 300,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val expand_sha2_384: expand_st SHA2_384 | [] | Hacl.HKDF.expand_sha2_384 | {
"file_name": "code/hkdf/Hacl.HKDF.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Hacl.HKDF.expand_st Spec.Hash.Definitions.SHA2_384 | {
"end_col": 47,
"end_line": 178,
"start_col": 2,
"start_line": 178
} |
Prims.Tot | val expand_sha2_512: expand_st SHA2_512 | [
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "Seq"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "LB"
},
{
"abbrev": true,
"full_module": "Lib.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.HKDF",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let expand_sha2_512: expand_st SHA2_512 =
mk_expand SHA2_512 Hacl.HMAC.compute_sha2_512 | val expand_sha2_512: expand_st SHA2_512
let expand_sha2_512:expand_st SHA2_512 = | false | null | false | mk_expand SHA2_512 Hacl.HMAC.compute_sha2_512 | {
"checked_file": "Hacl.HKDF.fst.checked",
"dependencies": [
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"prims.fst.checked",
"LowStar.Buffer.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fst.checked",
"Lib.Buffer.fsti.checked",
"Hacl.HMAC.fsti.checked",
"Hacl.Hash.Definitions.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.HKDF.fst"
} | [
"total"
] | [
"Hacl.HKDF.mk_expand",
"Spec.Hash.Definitions.SHA2_512",
"Hacl.HMAC.compute_sha2_512",
"Hacl.HKDF.expand_st"
] | [] | module Hacl.HKDF
open FStar.Seq
module B = Lib.Buffer
module LB = LowStar.Buffer
open Spec.Hash.Definitions
open Spec.Agile.HKDF
open FStar.Mul
open FStar.HyperStack
open FStar.HyperStack.ST
open Lib.Buffer
friend Spec.Agile.HKDF
friend Lib.IntTypes
module Seq = Lib.Sequence
// TODO: proofs break mysteriously when not befriending Lib.IntTypes and
// declassifying uint8; investigate
// assume val declassify8: squash (uint8 == UInt8.t)
module ST = FStar.HyperStack.ST
#set-options "--max_fuel 0 --max_ifuel 0 --z3rlimit 100"
let mk_extract a hmac prk salt saltlen ikm ikmlen =
hmac prk salt saltlen ikm ikmlen
val hmac_input_fits: a:fixed_len_alg -> Lemma
((pow2 32 + block_length a) `less_than_max_input_length` a)
let hmac_input_fits a =
allow_inversion fixed_len_alg;
match a with
| MD5 ->
assert_norm (pow2 32 + block_length MD5 <= Some?.v (max_input_length MD5))
| SHA1 ->
assert_norm (pow2 32 + block_length SHA1 <= Some?.v (max_input_length SHA1))
| SHA2_224 ->
assert_norm (pow2 32 + block_length SHA2_224 <= Some?.v (max_input_length SHA2_224))
| SHA2_256 ->
assert_norm (pow2 32 + block_length SHA2_256 <= Some?.v (max_input_length SHA2_256))
| SHA2_384 ->
assert_norm (pow2 32 + block_length SHA2_384 <= Some?.v (max_input_length SHA2_384))
| SHA2_512 ->
assert_norm (pow2 32 + block_length SHA2_512 <= Some?.v (max_input_length SHA2_512))
| Blake2S ->
assert_norm (pow2 32 + block_length Blake2S <= Some?.v (max_input_length Blake2S))
| Blake2B ->
assert_norm (pow2 32 + block_length Blake2B <= Some?.v (max_input_length Blake2B))
| SHA3_224 -> ()
| SHA3_256 -> ()
| SHA3_384 -> ()
| SHA3_512 -> ()
#push-options "--z3rlimit 300"
let mk_expand a hmac okm prk prklen info infolen len =
let tlen = Hash.Definitions.hash_len a in
let n = len /. tlen in
Math.Lemmas.lemma_div_mod (v len) (v tlen);
hmac_input_fits a;
[@inline_let]
let okm: B.lbuffer uint8 len = okm in
[@inline_let]
let prk: B.lbuffer uint8 prklen = prk in
[@inline_let]
let info: B.lbuffer uint8 infolen = info in
let output: B.lbuffer uint8 (n *! tlen) = B.sub okm 0ul (n *! tlen) in
push_frame ();
let text = B.create (tlen +! infolen +! 1ul) (u8 0) in
let text0: B.lbuffer uint8 (infolen +! 1ul) = B.sub text tlen (infolen +! 1ul) in
let tag = B.sub text 0ul tlen in
let ctr = B.sub text (tlen +! infolen) 1ul in
B.copy (B.sub text tlen infolen) info;
[@inline_let]
let a_spec = a_spec a in
[@inline_let]
let refl h (i:size_nat{i <= v n}) : GTot (a_spec i) =
if i = 0 then FStar.Seq.empty #uint8 else B.as_seq h tag
in
[@inline_let]
let footprint (i:size_nat{i <= v n}) :
GTot LB.(l:loc{loc_disjoint l (B.loc output) /\
address_liveness_insensitive_locs `loc_includes` l}) =
LB.loc_union (B.loc tag) (B.loc ctr)
in
[@inline_let]
let spec h0 : GTot (i:size_nat{i < v n} -> a_spec i -> a_spec (i + 1) & Seq.lseq uint8 (v tlen)) =
expand_loop a (B.as_seq h0 prk) (B.as_seq h0 info) (v n)
in
let h0 = ST.get () in
B.fill_blocks h0 tlen n output a_spec refl footprint spec (fun i ->
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (i +! 1ul);
let h1 = ST.get() in
if i = 0ul then
begin
Seq.eq_intro
(B.as_seq h1 text0)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (FStar.Seq.empty @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 0 (FStar.Seq.empty #uint8) in B.as_seq h2 tag == t)
end
else
begin
Seq.eq_intro
(B.as_seq h1 text)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (B.as_seq h1 tag @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 (v i) (B.as_seq h tag) in B.as_seq h2 tag == t)
end;
Seq.unfold_generate_blocks
(v tlen) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8) (v i);
//assert (v (i *! tlen) + v tlen <= v (n *! tlen));
B.copy (B.sub output (i *! tlen) tlen) tag
// let h3 = ST.get() in
// assert (
// footprint (v i + 1) `LB.loc_includes` footprint (v i) /\
// LB.modifies (LB.loc_union (footprint (v i + 1)) (B.loc block)) h h3);
//assert (
// let s, b = spec h0 (v i) (refl h (v i)) in
// refl h3 (v i + 1) == s /\ as_seq h3 block == b)
);
let h1 = ST.get () in
if n *! tlen <. len then
begin
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (n +! 1ul);
let h2 = ST.get() in
if n = 0ul then
begin
Seq.eq_intro
(B.as_seq h2 text0)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
end
else
begin
Seq.eq_intro
(B.as_seq h2 text)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
end;
let block = B.sub okm (n *! tlen) (len -! (n *! tlen)) in
B.copy block (B.sub tag 0ul (len -! (n *! tlen)))
end;
let h4 = ST.get() in
assert (
let tag', output' =
Seq.generate_blocks (v tlen) (v n) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8)
in
Seq.equal
(B.as_seq h4 okm)
(output' @| Seq.sub (B.as_seq h4 tag) 0 (v len - v n * v tlen)));
pop_frame ()
let expand_sha2_256: expand_st SHA2_256 =
mk_expand SHA2_256 Hacl.HMAC.compute_sha2_256
let extract_sha2_256: extract_st SHA2_256 =
mk_extract SHA2_256 Hacl.HMAC.compute_sha2_256
let expand_sha2_384: expand_st SHA2_384 =
mk_expand SHA2_384 Hacl.HMAC.compute_sha2_384
let extract_sha2_384: extract_st SHA2_384 =
mk_extract SHA2_384 Hacl.HMAC.compute_sha2_384 | false | true | Hacl.HKDF.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 300,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val expand_sha2_512: expand_st SHA2_512 | [] | Hacl.HKDF.expand_sha2_512 | {
"file_name": "code/hkdf/Hacl.HKDF.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Hacl.HKDF.expand_st Spec.Hash.Definitions.SHA2_512 | {
"end_col": 47,
"end_line": 184,
"start_col": 2,
"start_line": 184
} |
Prims.Tot | val extract_sha2_256: extract_st SHA2_256 | [
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "Seq"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "LB"
},
{
"abbrev": true,
"full_module": "Lib.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.HKDF",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let extract_sha2_256: extract_st SHA2_256 =
mk_extract SHA2_256 Hacl.HMAC.compute_sha2_256 | val extract_sha2_256: extract_st SHA2_256
let extract_sha2_256:extract_st SHA2_256 = | false | null | false | mk_extract SHA2_256 Hacl.HMAC.compute_sha2_256 | {
"checked_file": "Hacl.HKDF.fst.checked",
"dependencies": [
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"prims.fst.checked",
"LowStar.Buffer.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fst.checked",
"Lib.Buffer.fsti.checked",
"Hacl.HMAC.fsti.checked",
"Hacl.Hash.Definitions.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.HKDF.fst"
} | [
"total"
] | [
"Hacl.HKDF.mk_extract",
"Spec.Hash.Definitions.SHA2_256",
"Hacl.HMAC.compute_sha2_256",
"Hacl.HKDF.extract_st"
] | [] | module Hacl.HKDF
open FStar.Seq
module B = Lib.Buffer
module LB = LowStar.Buffer
open Spec.Hash.Definitions
open Spec.Agile.HKDF
open FStar.Mul
open FStar.HyperStack
open FStar.HyperStack.ST
open Lib.Buffer
friend Spec.Agile.HKDF
friend Lib.IntTypes
module Seq = Lib.Sequence
// TODO: proofs break mysteriously when not befriending Lib.IntTypes and
// declassifying uint8; investigate
// assume val declassify8: squash (uint8 == UInt8.t)
module ST = FStar.HyperStack.ST
#set-options "--max_fuel 0 --max_ifuel 0 --z3rlimit 100"
let mk_extract a hmac prk salt saltlen ikm ikmlen =
hmac prk salt saltlen ikm ikmlen
val hmac_input_fits: a:fixed_len_alg -> Lemma
((pow2 32 + block_length a) `less_than_max_input_length` a)
let hmac_input_fits a =
allow_inversion fixed_len_alg;
match a with
| MD5 ->
assert_norm (pow2 32 + block_length MD5 <= Some?.v (max_input_length MD5))
| SHA1 ->
assert_norm (pow2 32 + block_length SHA1 <= Some?.v (max_input_length SHA1))
| SHA2_224 ->
assert_norm (pow2 32 + block_length SHA2_224 <= Some?.v (max_input_length SHA2_224))
| SHA2_256 ->
assert_norm (pow2 32 + block_length SHA2_256 <= Some?.v (max_input_length SHA2_256))
| SHA2_384 ->
assert_norm (pow2 32 + block_length SHA2_384 <= Some?.v (max_input_length SHA2_384))
| SHA2_512 ->
assert_norm (pow2 32 + block_length SHA2_512 <= Some?.v (max_input_length SHA2_512))
| Blake2S ->
assert_norm (pow2 32 + block_length Blake2S <= Some?.v (max_input_length Blake2S))
| Blake2B ->
assert_norm (pow2 32 + block_length Blake2B <= Some?.v (max_input_length Blake2B))
| SHA3_224 -> ()
| SHA3_256 -> ()
| SHA3_384 -> ()
| SHA3_512 -> ()
#push-options "--z3rlimit 300"
let mk_expand a hmac okm prk prklen info infolen len =
let tlen = Hash.Definitions.hash_len a in
let n = len /. tlen in
Math.Lemmas.lemma_div_mod (v len) (v tlen);
hmac_input_fits a;
[@inline_let]
let okm: B.lbuffer uint8 len = okm in
[@inline_let]
let prk: B.lbuffer uint8 prklen = prk in
[@inline_let]
let info: B.lbuffer uint8 infolen = info in
let output: B.lbuffer uint8 (n *! tlen) = B.sub okm 0ul (n *! tlen) in
push_frame ();
let text = B.create (tlen +! infolen +! 1ul) (u8 0) in
let text0: B.lbuffer uint8 (infolen +! 1ul) = B.sub text tlen (infolen +! 1ul) in
let tag = B.sub text 0ul tlen in
let ctr = B.sub text (tlen +! infolen) 1ul in
B.copy (B.sub text tlen infolen) info;
[@inline_let]
let a_spec = a_spec a in
[@inline_let]
let refl h (i:size_nat{i <= v n}) : GTot (a_spec i) =
if i = 0 then FStar.Seq.empty #uint8 else B.as_seq h tag
in
[@inline_let]
let footprint (i:size_nat{i <= v n}) :
GTot LB.(l:loc{loc_disjoint l (B.loc output) /\
address_liveness_insensitive_locs `loc_includes` l}) =
LB.loc_union (B.loc tag) (B.loc ctr)
in
[@inline_let]
let spec h0 : GTot (i:size_nat{i < v n} -> a_spec i -> a_spec (i + 1) & Seq.lseq uint8 (v tlen)) =
expand_loop a (B.as_seq h0 prk) (B.as_seq h0 info) (v n)
in
let h0 = ST.get () in
B.fill_blocks h0 tlen n output a_spec refl footprint spec (fun i ->
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (i +! 1ul);
let h1 = ST.get() in
if i = 0ul then
begin
Seq.eq_intro
(B.as_seq h1 text0)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (FStar.Seq.empty @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 0 (FStar.Seq.empty #uint8) in B.as_seq h2 tag == t)
end
else
begin
Seq.eq_intro
(B.as_seq h1 text)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (B.as_seq h1 tag @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 (v i) (B.as_seq h tag) in B.as_seq h2 tag == t)
end;
Seq.unfold_generate_blocks
(v tlen) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8) (v i);
//assert (v (i *! tlen) + v tlen <= v (n *! tlen));
B.copy (B.sub output (i *! tlen) tlen) tag
// let h3 = ST.get() in
// assert (
// footprint (v i + 1) `LB.loc_includes` footprint (v i) /\
// LB.modifies (LB.loc_union (footprint (v i + 1)) (B.loc block)) h h3);
//assert (
// let s, b = spec h0 (v i) (refl h (v i)) in
// refl h3 (v i + 1) == s /\ as_seq h3 block == b)
);
let h1 = ST.get () in
if n *! tlen <. len then
begin
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (n +! 1ul);
let h2 = ST.get() in
if n = 0ul then
begin
Seq.eq_intro
(B.as_seq h2 text0)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
end
else
begin
Seq.eq_intro
(B.as_seq h2 text)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
end;
let block = B.sub okm (n *! tlen) (len -! (n *! tlen)) in
B.copy block (B.sub tag 0ul (len -! (n *! tlen)))
end;
let h4 = ST.get() in
assert (
let tag', output' =
Seq.generate_blocks (v tlen) (v n) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8)
in
Seq.equal
(B.as_seq h4 okm)
(output' @| Seq.sub (B.as_seq h4 tag) 0 (v len - v n * v tlen)));
pop_frame ()
let expand_sha2_256: expand_st SHA2_256 =
mk_expand SHA2_256 Hacl.HMAC.compute_sha2_256 | false | true | Hacl.HKDF.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 300,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val extract_sha2_256: extract_st SHA2_256 | [] | Hacl.HKDF.extract_sha2_256 | {
"file_name": "code/hkdf/Hacl.HKDF.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Hacl.HKDF.extract_st Spec.Hash.Definitions.SHA2_256 | {
"end_col": 48,
"end_line": 175,
"start_col": 2,
"start_line": 175
} |
Prims.Tot | val expand_blake2b_32: expand_st Blake2B | [
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "Seq"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "LB"
},
{
"abbrev": true,
"full_module": "Lib.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.HKDF",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let expand_blake2b_32: expand_st Blake2B =
mk_expand Blake2B Hacl.HMAC.compute_blake2b_32 | val expand_blake2b_32: expand_st Blake2B
let expand_blake2b_32:expand_st Blake2B = | false | null | false | mk_expand Blake2B Hacl.HMAC.compute_blake2b_32 | {
"checked_file": "Hacl.HKDF.fst.checked",
"dependencies": [
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"prims.fst.checked",
"LowStar.Buffer.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fst.checked",
"Lib.Buffer.fsti.checked",
"Hacl.HMAC.fsti.checked",
"Hacl.Hash.Definitions.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.HKDF.fst"
} | [
"total"
] | [
"Hacl.HKDF.mk_expand",
"Spec.Hash.Definitions.Blake2B",
"Hacl.HMAC.compute_blake2b_32",
"Hacl.HKDF.expand_st"
] | [] | module Hacl.HKDF
open FStar.Seq
module B = Lib.Buffer
module LB = LowStar.Buffer
open Spec.Hash.Definitions
open Spec.Agile.HKDF
open FStar.Mul
open FStar.HyperStack
open FStar.HyperStack.ST
open Lib.Buffer
friend Spec.Agile.HKDF
friend Lib.IntTypes
module Seq = Lib.Sequence
// TODO: proofs break mysteriously when not befriending Lib.IntTypes and
// declassifying uint8; investigate
// assume val declassify8: squash (uint8 == UInt8.t)
module ST = FStar.HyperStack.ST
#set-options "--max_fuel 0 --max_ifuel 0 --z3rlimit 100"
let mk_extract a hmac prk salt saltlen ikm ikmlen =
hmac prk salt saltlen ikm ikmlen
val hmac_input_fits: a:fixed_len_alg -> Lemma
((pow2 32 + block_length a) `less_than_max_input_length` a)
let hmac_input_fits a =
allow_inversion fixed_len_alg;
match a with
| MD5 ->
assert_norm (pow2 32 + block_length MD5 <= Some?.v (max_input_length MD5))
| SHA1 ->
assert_norm (pow2 32 + block_length SHA1 <= Some?.v (max_input_length SHA1))
| SHA2_224 ->
assert_norm (pow2 32 + block_length SHA2_224 <= Some?.v (max_input_length SHA2_224))
| SHA2_256 ->
assert_norm (pow2 32 + block_length SHA2_256 <= Some?.v (max_input_length SHA2_256))
| SHA2_384 ->
assert_norm (pow2 32 + block_length SHA2_384 <= Some?.v (max_input_length SHA2_384))
| SHA2_512 ->
assert_norm (pow2 32 + block_length SHA2_512 <= Some?.v (max_input_length SHA2_512))
| Blake2S ->
assert_norm (pow2 32 + block_length Blake2S <= Some?.v (max_input_length Blake2S))
| Blake2B ->
assert_norm (pow2 32 + block_length Blake2B <= Some?.v (max_input_length Blake2B))
| SHA3_224 -> ()
| SHA3_256 -> ()
| SHA3_384 -> ()
| SHA3_512 -> ()
#push-options "--z3rlimit 300"
let mk_expand a hmac okm prk prklen info infolen len =
let tlen = Hash.Definitions.hash_len a in
let n = len /. tlen in
Math.Lemmas.lemma_div_mod (v len) (v tlen);
hmac_input_fits a;
[@inline_let]
let okm: B.lbuffer uint8 len = okm in
[@inline_let]
let prk: B.lbuffer uint8 prklen = prk in
[@inline_let]
let info: B.lbuffer uint8 infolen = info in
let output: B.lbuffer uint8 (n *! tlen) = B.sub okm 0ul (n *! tlen) in
push_frame ();
let text = B.create (tlen +! infolen +! 1ul) (u8 0) in
let text0: B.lbuffer uint8 (infolen +! 1ul) = B.sub text tlen (infolen +! 1ul) in
let tag = B.sub text 0ul tlen in
let ctr = B.sub text (tlen +! infolen) 1ul in
B.copy (B.sub text tlen infolen) info;
[@inline_let]
let a_spec = a_spec a in
[@inline_let]
let refl h (i:size_nat{i <= v n}) : GTot (a_spec i) =
if i = 0 then FStar.Seq.empty #uint8 else B.as_seq h tag
in
[@inline_let]
let footprint (i:size_nat{i <= v n}) :
GTot LB.(l:loc{loc_disjoint l (B.loc output) /\
address_liveness_insensitive_locs `loc_includes` l}) =
LB.loc_union (B.loc tag) (B.loc ctr)
in
[@inline_let]
let spec h0 : GTot (i:size_nat{i < v n} -> a_spec i -> a_spec (i + 1) & Seq.lseq uint8 (v tlen)) =
expand_loop a (B.as_seq h0 prk) (B.as_seq h0 info) (v n)
in
let h0 = ST.get () in
B.fill_blocks h0 tlen n output a_spec refl footprint spec (fun i ->
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (i +! 1ul);
let h1 = ST.get() in
if i = 0ul then
begin
Seq.eq_intro
(B.as_seq h1 text0)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (FStar.Seq.empty @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 0 (FStar.Seq.empty #uint8) in B.as_seq h2 tag == t)
end
else
begin
Seq.eq_intro
(B.as_seq h1 text)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (B.as_seq h1 tag @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 (v i) (B.as_seq h tag) in B.as_seq h2 tag == t)
end;
Seq.unfold_generate_blocks
(v tlen) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8) (v i);
//assert (v (i *! tlen) + v tlen <= v (n *! tlen));
B.copy (B.sub output (i *! tlen) tlen) tag
// let h3 = ST.get() in
// assert (
// footprint (v i + 1) `LB.loc_includes` footprint (v i) /\
// LB.modifies (LB.loc_union (footprint (v i + 1)) (B.loc block)) h h3);
//assert (
// let s, b = spec h0 (v i) (refl h (v i)) in
// refl h3 (v i + 1) == s /\ as_seq h3 block == b)
);
let h1 = ST.get () in
if n *! tlen <. len then
begin
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (n +! 1ul);
let h2 = ST.get() in
if n = 0ul then
begin
Seq.eq_intro
(B.as_seq h2 text0)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
end
else
begin
Seq.eq_intro
(B.as_seq h2 text)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
end;
let block = B.sub okm (n *! tlen) (len -! (n *! tlen)) in
B.copy block (B.sub tag 0ul (len -! (n *! tlen)))
end;
let h4 = ST.get() in
assert (
let tag', output' =
Seq.generate_blocks (v tlen) (v n) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8)
in
Seq.equal
(B.as_seq h4 okm)
(output' @| Seq.sub (B.as_seq h4 tag) 0 (v len - v n * v tlen)));
pop_frame ()
let expand_sha2_256: expand_st SHA2_256 =
mk_expand SHA2_256 Hacl.HMAC.compute_sha2_256
let extract_sha2_256: extract_st SHA2_256 =
mk_extract SHA2_256 Hacl.HMAC.compute_sha2_256
let expand_sha2_384: expand_st SHA2_384 =
mk_expand SHA2_384 Hacl.HMAC.compute_sha2_384
let extract_sha2_384: extract_st SHA2_384 =
mk_extract SHA2_384 Hacl.HMAC.compute_sha2_384
let expand_sha2_512: expand_st SHA2_512 =
mk_expand SHA2_512 Hacl.HMAC.compute_sha2_512
let extract_sha2_512: extract_st SHA2_512 =
mk_extract SHA2_512 Hacl.HMAC.compute_sha2_512
let expand_blake2s_32: expand_st Blake2S =
mk_expand Blake2S Hacl.HMAC.compute_blake2s_32
let extract_blake2s_32: extract_st Blake2S =
mk_extract Blake2S Hacl.HMAC.compute_blake2s_32 | false | true | Hacl.HKDF.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 300,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val expand_blake2b_32: expand_st Blake2B | [] | Hacl.HKDF.expand_blake2b_32 | {
"file_name": "code/hkdf/Hacl.HKDF.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Hacl.HKDF.expand_st Spec.Hash.Definitions.Blake2B | {
"end_col": 48,
"end_line": 196,
"start_col": 2,
"start_line": 196
} |
Prims.Tot | val expand_blake2s_32: expand_st Blake2S | [
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "Seq"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "LB"
},
{
"abbrev": true,
"full_module": "Lib.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.HKDF",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let expand_blake2s_32: expand_st Blake2S =
mk_expand Blake2S Hacl.HMAC.compute_blake2s_32 | val expand_blake2s_32: expand_st Blake2S
let expand_blake2s_32:expand_st Blake2S = | false | null | false | mk_expand Blake2S Hacl.HMAC.compute_blake2s_32 | {
"checked_file": "Hacl.HKDF.fst.checked",
"dependencies": [
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"prims.fst.checked",
"LowStar.Buffer.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fst.checked",
"Lib.Buffer.fsti.checked",
"Hacl.HMAC.fsti.checked",
"Hacl.Hash.Definitions.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.HKDF.fst"
} | [
"total"
] | [
"Hacl.HKDF.mk_expand",
"Spec.Hash.Definitions.Blake2S",
"Hacl.HMAC.compute_blake2s_32",
"Hacl.HKDF.expand_st"
] | [] | module Hacl.HKDF
open FStar.Seq
module B = Lib.Buffer
module LB = LowStar.Buffer
open Spec.Hash.Definitions
open Spec.Agile.HKDF
open FStar.Mul
open FStar.HyperStack
open FStar.HyperStack.ST
open Lib.Buffer
friend Spec.Agile.HKDF
friend Lib.IntTypes
module Seq = Lib.Sequence
// TODO: proofs break mysteriously when not befriending Lib.IntTypes and
// declassifying uint8; investigate
// assume val declassify8: squash (uint8 == UInt8.t)
module ST = FStar.HyperStack.ST
#set-options "--max_fuel 0 --max_ifuel 0 --z3rlimit 100"
let mk_extract a hmac prk salt saltlen ikm ikmlen =
hmac prk salt saltlen ikm ikmlen
val hmac_input_fits: a:fixed_len_alg -> Lemma
((pow2 32 + block_length a) `less_than_max_input_length` a)
let hmac_input_fits a =
allow_inversion fixed_len_alg;
match a with
| MD5 ->
assert_norm (pow2 32 + block_length MD5 <= Some?.v (max_input_length MD5))
| SHA1 ->
assert_norm (pow2 32 + block_length SHA1 <= Some?.v (max_input_length SHA1))
| SHA2_224 ->
assert_norm (pow2 32 + block_length SHA2_224 <= Some?.v (max_input_length SHA2_224))
| SHA2_256 ->
assert_norm (pow2 32 + block_length SHA2_256 <= Some?.v (max_input_length SHA2_256))
| SHA2_384 ->
assert_norm (pow2 32 + block_length SHA2_384 <= Some?.v (max_input_length SHA2_384))
| SHA2_512 ->
assert_norm (pow2 32 + block_length SHA2_512 <= Some?.v (max_input_length SHA2_512))
| Blake2S ->
assert_norm (pow2 32 + block_length Blake2S <= Some?.v (max_input_length Blake2S))
| Blake2B ->
assert_norm (pow2 32 + block_length Blake2B <= Some?.v (max_input_length Blake2B))
| SHA3_224 -> ()
| SHA3_256 -> ()
| SHA3_384 -> ()
| SHA3_512 -> ()
#push-options "--z3rlimit 300"
let mk_expand a hmac okm prk prklen info infolen len =
let tlen = Hash.Definitions.hash_len a in
let n = len /. tlen in
Math.Lemmas.lemma_div_mod (v len) (v tlen);
hmac_input_fits a;
[@inline_let]
let okm: B.lbuffer uint8 len = okm in
[@inline_let]
let prk: B.lbuffer uint8 prklen = prk in
[@inline_let]
let info: B.lbuffer uint8 infolen = info in
let output: B.lbuffer uint8 (n *! tlen) = B.sub okm 0ul (n *! tlen) in
push_frame ();
let text = B.create (tlen +! infolen +! 1ul) (u8 0) in
let text0: B.lbuffer uint8 (infolen +! 1ul) = B.sub text tlen (infolen +! 1ul) in
let tag = B.sub text 0ul tlen in
let ctr = B.sub text (tlen +! infolen) 1ul in
B.copy (B.sub text tlen infolen) info;
[@inline_let]
let a_spec = a_spec a in
[@inline_let]
let refl h (i:size_nat{i <= v n}) : GTot (a_spec i) =
if i = 0 then FStar.Seq.empty #uint8 else B.as_seq h tag
in
[@inline_let]
let footprint (i:size_nat{i <= v n}) :
GTot LB.(l:loc{loc_disjoint l (B.loc output) /\
address_liveness_insensitive_locs `loc_includes` l}) =
LB.loc_union (B.loc tag) (B.loc ctr)
in
[@inline_let]
let spec h0 : GTot (i:size_nat{i < v n} -> a_spec i -> a_spec (i + 1) & Seq.lseq uint8 (v tlen)) =
expand_loop a (B.as_seq h0 prk) (B.as_seq h0 info) (v n)
in
let h0 = ST.get () in
B.fill_blocks h0 tlen n output a_spec refl footprint spec (fun i ->
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (i +! 1ul);
let h1 = ST.get() in
if i = 0ul then
begin
Seq.eq_intro
(B.as_seq h1 text0)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (FStar.Seq.empty @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 0 (FStar.Seq.empty #uint8) in B.as_seq h2 tag == t)
end
else
begin
Seq.eq_intro
(B.as_seq h1 text)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (B.as_seq h1 tag @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 (v i) (B.as_seq h tag) in B.as_seq h2 tag == t)
end;
Seq.unfold_generate_blocks
(v tlen) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8) (v i);
//assert (v (i *! tlen) + v tlen <= v (n *! tlen));
B.copy (B.sub output (i *! tlen) tlen) tag
// let h3 = ST.get() in
// assert (
// footprint (v i + 1) `LB.loc_includes` footprint (v i) /\
// LB.modifies (LB.loc_union (footprint (v i + 1)) (B.loc block)) h h3);
//assert (
// let s, b = spec h0 (v i) (refl h (v i)) in
// refl h3 (v i + 1) == s /\ as_seq h3 block == b)
);
let h1 = ST.get () in
if n *! tlen <. len then
begin
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (n +! 1ul);
let h2 = ST.get() in
if n = 0ul then
begin
Seq.eq_intro
(B.as_seq h2 text0)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
end
else
begin
Seq.eq_intro
(B.as_seq h2 text)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
end;
let block = B.sub okm (n *! tlen) (len -! (n *! tlen)) in
B.copy block (B.sub tag 0ul (len -! (n *! tlen)))
end;
let h4 = ST.get() in
assert (
let tag', output' =
Seq.generate_blocks (v tlen) (v n) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8)
in
Seq.equal
(B.as_seq h4 okm)
(output' @| Seq.sub (B.as_seq h4 tag) 0 (v len - v n * v tlen)));
pop_frame ()
let expand_sha2_256: expand_st SHA2_256 =
mk_expand SHA2_256 Hacl.HMAC.compute_sha2_256
let extract_sha2_256: extract_st SHA2_256 =
mk_extract SHA2_256 Hacl.HMAC.compute_sha2_256
let expand_sha2_384: expand_st SHA2_384 =
mk_expand SHA2_384 Hacl.HMAC.compute_sha2_384
let extract_sha2_384: extract_st SHA2_384 =
mk_extract SHA2_384 Hacl.HMAC.compute_sha2_384
let expand_sha2_512: expand_st SHA2_512 =
mk_expand SHA2_512 Hacl.HMAC.compute_sha2_512
let extract_sha2_512: extract_st SHA2_512 =
mk_extract SHA2_512 Hacl.HMAC.compute_sha2_512 | false | true | Hacl.HKDF.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 300,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val expand_blake2s_32: expand_st Blake2S | [] | Hacl.HKDF.expand_blake2s_32 | {
"file_name": "code/hkdf/Hacl.HKDF.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Hacl.HKDF.expand_st Spec.Hash.Definitions.Blake2S | {
"end_col": 48,
"end_line": 190,
"start_col": 2,
"start_line": 190
} |
Prims.Tot | val extract_blake2b_32: extract_st Blake2B | [
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "Seq"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "LB"
},
{
"abbrev": true,
"full_module": "Lib.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.HKDF",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let extract_blake2b_32: extract_st Blake2B =
mk_extract Blake2B Hacl.HMAC.compute_blake2b_32 | val extract_blake2b_32: extract_st Blake2B
let extract_blake2b_32:extract_st Blake2B = | false | null | false | mk_extract Blake2B Hacl.HMAC.compute_blake2b_32 | {
"checked_file": "Hacl.HKDF.fst.checked",
"dependencies": [
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"prims.fst.checked",
"LowStar.Buffer.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fst.checked",
"Lib.Buffer.fsti.checked",
"Hacl.HMAC.fsti.checked",
"Hacl.Hash.Definitions.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.HKDF.fst"
} | [
"total"
] | [
"Hacl.HKDF.mk_extract",
"Spec.Hash.Definitions.Blake2B",
"Hacl.HMAC.compute_blake2b_32",
"Hacl.HKDF.extract_st"
] | [] | module Hacl.HKDF
open FStar.Seq
module B = Lib.Buffer
module LB = LowStar.Buffer
open Spec.Hash.Definitions
open Spec.Agile.HKDF
open FStar.Mul
open FStar.HyperStack
open FStar.HyperStack.ST
open Lib.Buffer
friend Spec.Agile.HKDF
friend Lib.IntTypes
module Seq = Lib.Sequence
// TODO: proofs break mysteriously when not befriending Lib.IntTypes and
// declassifying uint8; investigate
// assume val declassify8: squash (uint8 == UInt8.t)
module ST = FStar.HyperStack.ST
#set-options "--max_fuel 0 --max_ifuel 0 --z3rlimit 100"
let mk_extract a hmac prk salt saltlen ikm ikmlen =
hmac prk salt saltlen ikm ikmlen
val hmac_input_fits: a:fixed_len_alg -> Lemma
((pow2 32 + block_length a) `less_than_max_input_length` a)
let hmac_input_fits a =
allow_inversion fixed_len_alg;
match a with
| MD5 ->
assert_norm (pow2 32 + block_length MD5 <= Some?.v (max_input_length MD5))
| SHA1 ->
assert_norm (pow2 32 + block_length SHA1 <= Some?.v (max_input_length SHA1))
| SHA2_224 ->
assert_norm (pow2 32 + block_length SHA2_224 <= Some?.v (max_input_length SHA2_224))
| SHA2_256 ->
assert_norm (pow2 32 + block_length SHA2_256 <= Some?.v (max_input_length SHA2_256))
| SHA2_384 ->
assert_norm (pow2 32 + block_length SHA2_384 <= Some?.v (max_input_length SHA2_384))
| SHA2_512 ->
assert_norm (pow2 32 + block_length SHA2_512 <= Some?.v (max_input_length SHA2_512))
| Blake2S ->
assert_norm (pow2 32 + block_length Blake2S <= Some?.v (max_input_length Blake2S))
| Blake2B ->
assert_norm (pow2 32 + block_length Blake2B <= Some?.v (max_input_length Blake2B))
| SHA3_224 -> ()
| SHA3_256 -> ()
| SHA3_384 -> ()
| SHA3_512 -> ()
#push-options "--z3rlimit 300"
let mk_expand a hmac okm prk prklen info infolen len =
let tlen = Hash.Definitions.hash_len a in
let n = len /. tlen in
Math.Lemmas.lemma_div_mod (v len) (v tlen);
hmac_input_fits a;
[@inline_let]
let okm: B.lbuffer uint8 len = okm in
[@inline_let]
let prk: B.lbuffer uint8 prklen = prk in
[@inline_let]
let info: B.lbuffer uint8 infolen = info in
let output: B.lbuffer uint8 (n *! tlen) = B.sub okm 0ul (n *! tlen) in
push_frame ();
let text = B.create (tlen +! infolen +! 1ul) (u8 0) in
let text0: B.lbuffer uint8 (infolen +! 1ul) = B.sub text tlen (infolen +! 1ul) in
let tag = B.sub text 0ul tlen in
let ctr = B.sub text (tlen +! infolen) 1ul in
B.copy (B.sub text tlen infolen) info;
[@inline_let]
let a_spec = a_spec a in
[@inline_let]
let refl h (i:size_nat{i <= v n}) : GTot (a_spec i) =
if i = 0 then FStar.Seq.empty #uint8 else B.as_seq h tag
in
[@inline_let]
let footprint (i:size_nat{i <= v n}) :
GTot LB.(l:loc{loc_disjoint l (B.loc output) /\
address_liveness_insensitive_locs `loc_includes` l}) =
LB.loc_union (B.loc tag) (B.loc ctr)
in
[@inline_let]
let spec h0 : GTot (i:size_nat{i < v n} -> a_spec i -> a_spec (i + 1) & Seq.lseq uint8 (v tlen)) =
expand_loop a (B.as_seq h0 prk) (B.as_seq h0 info) (v n)
in
let h0 = ST.get () in
B.fill_blocks h0 tlen n output a_spec refl footprint spec (fun i ->
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (i +! 1ul);
let h1 = ST.get() in
if i = 0ul then
begin
Seq.eq_intro
(B.as_seq h1 text0)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (FStar.Seq.empty @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 0 (FStar.Seq.empty #uint8) in B.as_seq h2 tag == t)
end
else
begin
Seq.eq_intro
(B.as_seq h1 text)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (B.as_seq h1 tag @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 (v i) (B.as_seq h tag) in B.as_seq h2 tag == t)
end;
Seq.unfold_generate_blocks
(v tlen) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8) (v i);
//assert (v (i *! tlen) + v tlen <= v (n *! tlen));
B.copy (B.sub output (i *! tlen) tlen) tag
// let h3 = ST.get() in
// assert (
// footprint (v i + 1) `LB.loc_includes` footprint (v i) /\
// LB.modifies (LB.loc_union (footprint (v i + 1)) (B.loc block)) h h3);
//assert (
// let s, b = spec h0 (v i) (refl h (v i)) in
// refl h3 (v i + 1) == s /\ as_seq h3 block == b)
);
let h1 = ST.get () in
if n *! tlen <. len then
begin
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (n +! 1ul);
let h2 = ST.get() in
if n = 0ul then
begin
Seq.eq_intro
(B.as_seq h2 text0)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
end
else
begin
Seq.eq_intro
(B.as_seq h2 text)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
end;
let block = B.sub okm (n *! tlen) (len -! (n *! tlen)) in
B.copy block (B.sub tag 0ul (len -! (n *! tlen)))
end;
let h4 = ST.get() in
assert (
let tag', output' =
Seq.generate_blocks (v tlen) (v n) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8)
in
Seq.equal
(B.as_seq h4 okm)
(output' @| Seq.sub (B.as_seq h4 tag) 0 (v len - v n * v tlen)));
pop_frame ()
let expand_sha2_256: expand_st SHA2_256 =
mk_expand SHA2_256 Hacl.HMAC.compute_sha2_256
let extract_sha2_256: extract_st SHA2_256 =
mk_extract SHA2_256 Hacl.HMAC.compute_sha2_256
let expand_sha2_384: expand_st SHA2_384 =
mk_expand SHA2_384 Hacl.HMAC.compute_sha2_384
let extract_sha2_384: extract_st SHA2_384 =
mk_extract SHA2_384 Hacl.HMAC.compute_sha2_384
let expand_sha2_512: expand_st SHA2_512 =
mk_expand SHA2_512 Hacl.HMAC.compute_sha2_512
let extract_sha2_512: extract_st SHA2_512 =
mk_extract SHA2_512 Hacl.HMAC.compute_sha2_512
let expand_blake2s_32: expand_st Blake2S =
mk_expand Blake2S Hacl.HMAC.compute_blake2s_32
let extract_blake2s_32: extract_st Blake2S =
mk_extract Blake2S Hacl.HMAC.compute_blake2s_32
let expand_blake2b_32: expand_st Blake2B =
mk_expand Blake2B Hacl.HMAC.compute_blake2b_32 | false | true | Hacl.HKDF.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 300,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val extract_blake2b_32: extract_st Blake2B | [] | Hacl.HKDF.extract_blake2b_32 | {
"file_name": "code/hkdf/Hacl.HKDF.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Hacl.HKDF.extract_st Spec.Hash.Definitions.Blake2B | {
"end_col": 49,
"end_line": 199,
"start_col": 2,
"start_line": 199
} |
Prims.Tot | val extract_blake2s_32: extract_st Blake2S | [
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "Seq"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "LB"
},
{
"abbrev": true,
"full_module": "Lib.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.HKDF",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let extract_blake2s_32: extract_st Blake2S =
mk_extract Blake2S Hacl.HMAC.compute_blake2s_32 | val extract_blake2s_32: extract_st Blake2S
let extract_blake2s_32:extract_st Blake2S = | false | null | false | mk_extract Blake2S Hacl.HMAC.compute_blake2s_32 | {
"checked_file": "Hacl.HKDF.fst.checked",
"dependencies": [
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"prims.fst.checked",
"LowStar.Buffer.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fst.checked",
"Lib.Buffer.fsti.checked",
"Hacl.HMAC.fsti.checked",
"Hacl.Hash.Definitions.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.HKDF.fst"
} | [
"total"
] | [
"Hacl.HKDF.mk_extract",
"Spec.Hash.Definitions.Blake2S",
"Hacl.HMAC.compute_blake2s_32",
"Hacl.HKDF.extract_st"
] | [] | module Hacl.HKDF
open FStar.Seq
module B = Lib.Buffer
module LB = LowStar.Buffer
open Spec.Hash.Definitions
open Spec.Agile.HKDF
open FStar.Mul
open FStar.HyperStack
open FStar.HyperStack.ST
open Lib.Buffer
friend Spec.Agile.HKDF
friend Lib.IntTypes
module Seq = Lib.Sequence
// TODO: proofs break mysteriously when not befriending Lib.IntTypes and
// declassifying uint8; investigate
// assume val declassify8: squash (uint8 == UInt8.t)
module ST = FStar.HyperStack.ST
#set-options "--max_fuel 0 --max_ifuel 0 --z3rlimit 100"
let mk_extract a hmac prk salt saltlen ikm ikmlen =
hmac prk salt saltlen ikm ikmlen
val hmac_input_fits: a:fixed_len_alg -> Lemma
((pow2 32 + block_length a) `less_than_max_input_length` a)
let hmac_input_fits a =
allow_inversion fixed_len_alg;
match a with
| MD5 ->
assert_norm (pow2 32 + block_length MD5 <= Some?.v (max_input_length MD5))
| SHA1 ->
assert_norm (pow2 32 + block_length SHA1 <= Some?.v (max_input_length SHA1))
| SHA2_224 ->
assert_norm (pow2 32 + block_length SHA2_224 <= Some?.v (max_input_length SHA2_224))
| SHA2_256 ->
assert_norm (pow2 32 + block_length SHA2_256 <= Some?.v (max_input_length SHA2_256))
| SHA2_384 ->
assert_norm (pow2 32 + block_length SHA2_384 <= Some?.v (max_input_length SHA2_384))
| SHA2_512 ->
assert_norm (pow2 32 + block_length SHA2_512 <= Some?.v (max_input_length SHA2_512))
| Blake2S ->
assert_norm (pow2 32 + block_length Blake2S <= Some?.v (max_input_length Blake2S))
| Blake2B ->
assert_norm (pow2 32 + block_length Blake2B <= Some?.v (max_input_length Blake2B))
| SHA3_224 -> ()
| SHA3_256 -> ()
| SHA3_384 -> ()
| SHA3_512 -> ()
#push-options "--z3rlimit 300"
let mk_expand a hmac okm prk prklen info infolen len =
let tlen = Hash.Definitions.hash_len a in
let n = len /. tlen in
Math.Lemmas.lemma_div_mod (v len) (v tlen);
hmac_input_fits a;
[@inline_let]
let okm: B.lbuffer uint8 len = okm in
[@inline_let]
let prk: B.lbuffer uint8 prklen = prk in
[@inline_let]
let info: B.lbuffer uint8 infolen = info in
let output: B.lbuffer uint8 (n *! tlen) = B.sub okm 0ul (n *! tlen) in
push_frame ();
let text = B.create (tlen +! infolen +! 1ul) (u8 0) in
let text0: B.lbuffer uint8 (infolen +! 1ul) = B.sub text tlen (infolen +! 1ul) in
let tag = B.sub text 0ul tlen in
let ctr = B.sub text (tlen +! infolen) 1ul in
B.copy (B.sub text tlen infolen) info;
[@inline_let]
let a_spec = a_spec a in
[@inline_let]
let refl h (i:size_nat{i <= v n}) : GTot (a_spec i) =
if i = 0 then FStar.Seq.empty #uint8 else B.as_seq h tag
in
[@inline_let]
let footprint (i:size_nat{i <= v n}) :
GTot LB.(l:loc{loc_disjoint l (B.loc output) /\
address_liveness_insensitive_locs `loc_includes` l}) =
LB.loc_union (B.loc tag) (B.loc ctr)
in
[@inline_let]
let spec h0 : GTot (i:size_nat{i < v n} -> a_spec i -> a_spec (i + 1) & Seq.lseq uint8 (v tlen)) =
expand_loop a (B.as_seq h0 prk) (B.as_seq h0 info) (v n)
in
let h0 = ST.get () in
B.fill_blocks h0 tlen n output a_spec refl footprint spec (fun i ->
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (i +! 1ul);
let h1 = ST.get() in
if i = 0ul then
begin
Seq.eq_intro
(B.as_seq h1 text0)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (FStar.Seq.empty @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 0 (FStar.Seq.empty #uint8) in B.as_seq h2 tag == t)
end
else
begin
Seq.eq_intro
(B.as_seq h1 text)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (B.as_seq h1 tag @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 (v i) (B.as_seq h tag) in B.as_seq h2 tag == t)
end;
Seq.unfold_generate_blocks
(v tlen) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8) (v i);
//assert (v (i *! tlen) + v tlen <= v (n *! tlen));
B.copy (B.sub output (i *! tlen) tlen) tag
// let h3 = ST.get() in
// assert (
// footprint (v i + 1) `LB.loc_includes` footprint (v i) /\
// LB.modifies (LB.loc_union (footprint (v i + 1)) (B.loc block)) h h3);
//assert (
// let s, b = spec h0 (v i) (refl h (v i)) in
// refl h3 (v i + 1) == s /\ as_seq h3 block == b)
);
let h1 = ST.get () in
if n *! tlen <. len then
begin
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (n +! 1ul);
let h2 = ST.get() in
if n = 0ul then
begin
Seq.eq_intro
(B.as_seq h2 text0)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
end
else
begin
Seq.eq_intro
(B.as_seq h2 text)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
end;
let block = B.sub okm (n *! tlen) (len -! (n *! tlen)) in
B.copy block (B.sub tag 0ul (len -! (n *! tlen)))
end;
let h4 = ST.get() in
assert (
let tag', output' =
Seq.generate_blocks (v tlen) (v n) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8)
in
Seq.equal
(B.as_seq h4 okm)
(output' @| Seq.sub (B.as_seq h4 tag) 0 (v len - v n * v tlen)));
pop_frame ()
let expand_sha2_256: expand_st SHA2_256 =
mk_expand SHA2_256 Hacl.HMAC.compute_sha2_256
let extract_sha2_256: extract_st SHA2_256 =
mk_extract SHA2_256 Hacl.HMAC.compute_sha2_256
let expand_sha2_384: expand_st SHA2_384 =
mk_expand SHA2_384 Hacl.HMAC.compute_sha2_384
let extract_sha2_384: extract_st SHA2_384 =
mk_extract SHA2_384 Hacl.HMAC.compute_sha2_384
let expand_sha2_512: expand_st SHA2_512 =
mk_expand SHA2_512 Hacl.HMAC.compute_sha2_512
let extract_sha2_512: extract_st SHA2_512 =
mk_extract SHA2_512 Hacl.HMAC.compute_sha2_512
let expand_blake2s_32: expand_st Blake2S =
mk_expand Blake2S Hacl.HMAC.compute_blake2s_32 | false | true | Hacl.HKDF.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 300,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val extract_blake2s_32: extract_st Blake2S | [] | Hacl.HKDF.extract_blake2s_32 | {
"file_name": "code/hkdf/Hacl.HKDF.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Hacl.HKDF.extract_st Spec.Hash.Definitions.Blake2S | {
"end_col": 49,
"end_line": 193,
"start_col": 2,
"start_line": 193
} |
Prims.Tot | val expand_sha2_256: expand_st SHA2_256 | [
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "Seq"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "LB"
},
{
"abbrev": true,
"full_module": "Lib.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.HKDF",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let expand_sha2_256: expand_st SHA2_256 =
mk_expand SHA2_256 Hacl.HMAC.compute_sha2_256 | val expand_sha2_256: expand_st SHA2_256
let expand_sha2_256:expand_st SHA2_256 = | false | null | false | mk_expand SHA2_256 Hacl.HMAC.compute_sha2_256 | {
"checked_file": "Hacl.HKDF.fst.checked",
"dependencies": [
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"prims.fst.checked",
"LowStar.Buffer.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fst.checked",
"Lib.Buffer.fsti.checked",
"Hacl.HMAC.fsti.checked",
"Hacl.Hash.Definitions.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.HKDF.fst"
} | [
"total"
] | [
"Hacl.HKDF.mk_expand",
"Spec.Hash.Definitions.SHA2_256",
"Hacl.HMAC.compute_sha2_256",
"Hacl.HKDF.expand_st"
] | [] | module Hacl.HKDF
open FStar.Seq
module B = Lib.Buffer
module LB = LowStar.Buffer
open Spec.Hash.Definitions
open Spec.Agile.HKDF
open FStar.Mul
open FStar.HyperStack
open FStar.HyperStack.ST
open Lib.Buffer
friend Spec.Agile.HKDF
friend Lib.IntTypes
module Seq = Lib.Sequence
// TODO: proofs break mysteriously when not befriending Lib.IntTypes and
// declassifying uint8; investigate
// assume val declassify8: squash (uint8 == UInt8.t)
module ST = FStar.HyperStack.ST
#set-options "--max_fuel 0 --max_ifuel 0 --z3rlimit 100"
let mk_extract a hmac prk salt saltlen ikm ikmlen =
hmac prk salt saltlen ikm ikmlen
val hmac_input_fits: a:fixed_len_alg -> Lemma
((pow2 32 + block_length a) `less_than_max_input_length` a)
let hmac_input_fits a =
allow_inversion fixed_len_alg;
match a with
| MD5 ->
assert_norm (pow2 32 + block_length MD5 <= Some?.v (max_input_length MD5))
| SHA1 ->
assert_norm (pow2 32 + block_length SHA1 <= Some?.v (max_input_length SHA1))
| SHA2_224 ->
assert_norm (pow2 32 + block_length SHA2_224 <= Some?.v (max_input_length SHA2_224))
| SHA2_256 ->
assert_norm (pow2 32 + block_length SHA2_256 <= Some?.v (max_input_length SHA2_256))
| SHA2_384 ->
assert_norm (pow2 32 + block_length SHA2_384 <= Some?.v (max_input_length SHA2_384))
| SHA2_512 ->
assert_norm (pow2 32 + block_length SHA2_512 <= Some?.v (max_input_length SHA2_512))
| Blake2S ->
assert_norm (pow2 32 + block_length Blake2S <= Some?.v (max_input_length Blake2S))
| Blake2B ->
assert_norm (pow2 32 + block_length Blake2B <= Some?.v (max_input_length Blake2B))
| SHA3_224 -> ()
| SHA3_256 -> ()
| SHA3_384 -> ()
| SHA3_512 -> ()
#push-options "--z3rlimit 300"
let mk_expand a hmac okm prk prklen info infolen len =
let tlen = Hash.Definitions.hash_len a in
let n = len /. tlen in
Math.Lemmas.lemma_div_mod (v len) (v tlen);
hmac_input_fits a;
[@inline_let]
let okm: B.lbuffer uint8 len = okm in
[@inline_let]
let prk: B.lbuffer uint8 prklen = prk in
[@inline_let]
let info: B.lbuffer uint8 infolen = info in
let output: B.lbuffer uint8 (n *! tlen) = B.sub okm 0ul (n *! tlen) in
push_frame ();
let text = B.create (tlen +! infolen +! 1ul) (u8 0) in
let text0: B.lbuffer uint8 (infolen +! 1ul) = B.sub text tlen (infolen +! 1ul) in
let tag = B.sub text 0ul tlen in
let ctr = B.sub text (tlen +! infolen) 1ul in
B.copy (B.sub text tlen infolen) info;
[@inline_let]
let a_spec = a_spec a in
[@inline_let]
let refl h (i:size_nat{i <= v n}) : GTot (a_spec i) =
if i = 0 then FStar.Seq.empty #uint8 else B.as_seq h tag
in
[@inline_let]
let footprint (i:size_nat{i <= v n}) :
GTot LB.(l:loc{loc_disjoint l (B.loc output) /\
address_liveness_insensitive_locs `loc_includes` l}) =
LB.loc_union (B.loc tag) (B.loc ctr)
in
[@inline_let]
let spec h0 : GTot (i:size_nat{i < v n} -> a_spec i -> a_spec (i + 1) & Seq.lseq uint8 (v tlen)) =
expand_loop a (B.as_seq h0 prk) (B.as_seq h0 info) (v n)
in
let h0 = ST.get () in
B.fill_blocks h0 tlen n output a_spec refl footprint spec (fun i ->
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (i +! 1ul);
let h1 = ST.get() in
if i = 0ul then
begin
Seq.eq_intro
(B.as_seq h1 text0)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (FStar.Seq.empty @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 0 (FStar.Seq.empty #uint8) in B.as_seq h2 tag == t)
end
else
begin
Seq.eq_intro
(B.as_seq h1 text)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (B.as_seq h1 tag @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 (v i) (B.as_seq h tag) in B.as_seq h2 tag == t)
end;
Seq.unfold_generate_blocks
(v tlen) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8) (v i);
//assert (v (i *! tlen) + v tlen <= v (n *! tlen));
B.copy (B.sub output (i *! tlen) tlen) tag
// let h3 = ST.get() in
// assert (
// footprint (v i + 1) `LB.loc_includes` footprint (v i) /\
// LB.modifies (LB.loc_union (footprint (v i + 1)) (B.loc block)) h h3);
//assert (
// let s, b = spec h0 (v i) (refl h (v i)) in
// refl h3 (v i + 1) == s /\ as_seq h3 block == b)
);
let h1 = ST.get () in
if n *! tlen <. len then
begin
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (n +! 1ul);
let h2 = ST.get() in
if n = 0ul then
begin
Seq.eq_intro
(B.as_seq h2 text0)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
end
else
begin
Seq.eq_intro
(B.as_seq h2 text)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
end;
let block = B.sub okm (n *! tlen) (len -! (n *! tlen)) in
B.copy block (B.sub tag 0ul (len -! (n *! tlen)))
end;
let h4 = ST.get() in
assert (
let tag', output' =
Seq.generate_blocks (v tlen) (v n) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8)
in
Seq.equal
(B.as_seq h4 okm)
(output' @| Seq.sub (B.as_seq h4 tag) 0 (v len - v n * v tlen)));
pop_frame () | false | true | Hacl.HKDF.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 300,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val expand_sha2_256: expand_st SHA2_256 | [] | Hacl.HKDF.expand_sha2_256 | {
"file_name": "code/hkdf/Hacl.HKDF.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Hacl.HKDF.expand_st Spec.Hash.Definitions.SHA2_256 | {
"end_col": 47,
"end_line": 172,
"start_col": 2,
"start_line": 172
} |
Prims.Tot | val extract_sha2_384: extract_st SHA2_384 | [
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "Seq"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "LB"
},
{
"abbrev": true,
"full_module": "Lib.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.HKDF",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let extract_sha2_384: extract_st SHA2_384 =
mk_extract SHA2_384 Hacl.HMAC.compute_sha2_384 | val extract_sha2_384: extract_st SHA2_384
let extract_sha2_384:extract_st SHA2_384 = | false | null | false | mk_extract SHA2_384 Hacl.HMAC.compute_sha2_384 | {
"checked_file": "Hacl.HKDF.fst.checked",
"dependencies": [
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"prims.fst.checked",
"LowStar.Buffer.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fst.checked",
"Lib.Buffer.fsti.checked",
"Hacl.HMAC.fsti.checked",
"Hacl.Hash.Definitions.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.HKDF.fst"
} | [
"total"
] | [
"Hacl.HKDF.mk_extract",
"Spec.Hash.Definitions.SHA2_384",
"Hacl.HMAC.compute_sha2_384",
"Hacl.HKDF.extract_st"
] | [] | module Hacl.HKDF
open FStar.Seq
module B = Lib.Buffer
module LB = LowStar.Buffer
open Spec.Hash.Definitions
open Spec.Agile.HKDF
open FStar.Mul
open FStar.HyperStack
open FStar.HyperStack.ST
open Lib.Buffer
friend Spec.Agile.HKDF
friend Lib.IntTypes
module Seq = Lib.Sequence
// TODO: proofs break mysteriously when not befriending Lib.IntTypes and
// declassifying uint8; investigate
// assume val declassify8: squash (uint8 == UInt8.t)
module ST = FStar.HyperStack.ST
#set-options "--max_fuel 0 --max_ifuel 0 --z3rlimit 100"
let mk_extract a hmac prk salt saltlen ikm ikmlen =
hmac prk salt saltlen ikm ikmlen
val hmac_input_fits: a:fixed_len_alg -> Lemma
((pow2 32 + block_length a) `less_than_max_input_length` a)
let hmac_input_fits a =
allow_inversion fixed_len_alg;
match a with
| MD5 ->
assert_norm (pow2 32 + block_length MD5 <= Some?.v (max_input_length MD5))
| SHA1 ->
assert_norm (pow2 32 + block_length SHA1 <= Some?.v (max_input_length SHA1))
| SHA2_224 ->
assert_norm (pow2 32 + block_length SHA2_224 <= Some?.v (max_input_length SHA2_224))
| SHA2_256 ->
assert_norm (pow2 32 + block_length SHA2_256 <= Some?.v (max_input_length SHA2_256))
| SHA2_384 ->
assert_norm (pow2 32 + block_length SHA2_384 <= Some?.v (max_input_length SHA2_384))
| SHA2_512 ->
assert_norm (pow2 32 + block_length SHA2_512 <= Some?.v (max_input_length SHA2_512))
| Blake2S ->
assert_norm (pow2 32 + block_length Blake2S <= Some?.v (max_input_length Blake2S))
| Blake2B ->
assert_norm (pow2 32 + block_length Blake2B <= Some?.v (max_input_length Blake2B))
| SHA3_224 -> ()
| SHA3_256 -> ()
| SHA3_384 -> ()
| SHA3_512 -> ()
#push-options "--z3rlimit 300"
let mk_expand a hmac okm prk prklen info infolen len =
let tlen = Hash.Definitions.hash_len a in
let n = len /. tlen in
Math.Lemmas.lemma_div_mod (v len) (v tlen);
hmac_input_fits a;
[@inline_let]
let okm: B.lbuffer uint8 len = okm in
[@inline_let]
let prk: B.lbuffer uint8 prklen = prk in
[@inline_let]
let info: B.lbuffer uint8 infolen = info in
let output: B.lbuffer uint8 (n *! tlen) = B.sub okm 0ul (n *! tlen) in
push_frame ();
let text = B.create (tlen +! infolen +! 1ul) (u8 0) in
let text0: B.lbuffer uint8 (infolen +! 1ul) = B.sub text tlen (infolen +! 1ul) in
let tag = B.sub text 0ul tlen in
let ctr = B.sub text (tlen +! infolen) 1ul in
B.copy (B.sub text tlen infolen) info;
[@inline_let]
let a_spec = a_spec a in
[@inline_let]
let refl h (i:size_nat{i <= v n}) : GTot (a_spec i) =
if i = 0 then FStar.Seq.empty #uint8 else B.as_seq h tag
in
[@inline_let]
let footprint (i:size_nat{i <= v n}) :
GTot LB.(l:loc{loc_disjoint l (B.loc output) /\
address_liveness_insensitive_locs `loc_includes` l}) =
LB.loc_union (B.loc tag) (B.loc ctr)
in
[@inline_let]
let spec h0 : GTot (i:size_nat{i < v n} -> a_spec i -> a_spec (i + 1) & Seq.lseq uint8 (v tlen)) =
expand_loop a (B.as_seq h0 prk) (B.as_seq h0 info) (v n)
in
let h0 = ST.get () in
B.fill_blocks h0 tlen n output a_spec refl footprint spec (fun i ->
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (i +! 1ul);
let h1 = ST.get() in
if i = 0ul then
begin
Seq.eq_intro
(B.as_seq h1 text0)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (FStar.Seq.empty @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 0 (FStar.Seq.empty #uint8) in B.as_seq h2 tag == t)
end
else
begin
Seq.eq_intro
(B.as_seq h1 text)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (B.as_seq h1 tag @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 (v i) (B.as_seq h tag) in B.as_seq h2 tag == t)
end;
Seq.unfold_generate_blocks
(v tlen) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8) (v i);
//assert (v (i *! tlen) + v tlen <= v (n *! tlen));
B.copy (B.sub output (i *! tlen) tlen) tag
// let h3 = ST.get() in
// assert (
// footprint (v i + 1) `LB.loc_includes` footprint (v i) /\
// LB.modifies (LB.loc_union (footprint (v i + 1)) (B.loc block)) h h3);
//assert (
// let s, b = spec h0 (v i) (refl h (v i)) in
// refl h3 (v i + 1) == s /\ as_seq h3 block == b)
);
let h1 = ST.get () in
if n *! tlen <. len then
begin
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (n +! 1ul);
let h2 = ST.get() in
if n = 0ul then
begin
Seq.eq_intro
(B.as_seq h2 text0)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
end
else
begin
Seq.eq_intro
(B.as_seq h2 text)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
end;
let block = B.sub okm (n *! tlen) (len -! (n *! tlen)) in
B.copy block (B.sub tag 0ul (len -! (n *! tlen)))
end;
let h4 = ST.get() in
assert (
let tag', output' =
Seq.generate_blocks (v tlen) (v n) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8)
in
Seq.equal
(B.as_seq h4 okm)
(output' @| Seq.sub (B.as_seq h4 tag) 0 (v len - v n * v tlen)));
pop_frame ()
let expand_sha2_256: expand_st SHA2_256 =
mk_expand SHA2_256 Hacl.HMAC.compute_sha2_256
let extract_sha2_256: extract_st SHA2_256 =
mk_extract SHA2_256 Hacl.HMAC.compute_sha2_256
let expand_sha2_384: expand_st SHA2_384 =
mk_expand SHA2_384 Hacl.HMAC.compute_sha2_384 | false | true | Hacl.HKDF.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 300,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val extract_sha2_384: extract_st SHA2_384 | [] | Hacl.HKDF.extract_sha2_384 | {
"file_name": "code/hkdf/Hacl.HKDF.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Hacl.HKDF.extract_st Spec.Hash.Definitions.SHA2_384 | {
"end_col": 48,
"end_line": 181,
"start_col": 2,
"start_line": 181
} |
Prims.Tot | val mk_expand:
a: fixed_len_alg ->
hmac: Hacl.HMAC.compute_st a ->
expand_st a | [
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "Seq"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "LB"
},
{
"abbrev": true,
"full_module": "Lib.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.HKDF",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let mk_expand a hmac okm prk prklen info infolen len =
let tlen = Hash.Definitions.hash_len a in
let n = len /. tlen in
Math.Lemmas.lemma_div_mod (v len) (v tlen);
hmac_input_fits a;
[@inline_let]
let okm: B.lbuffer uint8 len = okm in
[@inline_let]
let prk: B.lbuffer uint8 prklen = prk in
[@inline_let]
let info: B.lbuffer uint8 infolen = info in
let output: B.lbuffer uint8 (n *! tlen) = B.sub okm 0ul (n *! tlen) in
push_frame ();
let text = B.create (tlen +! infolen +! 1ul) (u8 0) in
let text0: B.lbuffer uint8 (infolen +! 1ul) = B.sub text tlen (infolen +! 1ul) in
let tag = B.sub text 0ul tlen in
let ctr = B.sub text (tlen +! infolen) 1ul in
B.copy (B.sub text tlen infolen) info;
[@inline_let]
let a_spec = a_spec a in
[@inline_let]
let refl h (i:size_nat{i <= v n}) : GTot (a_spec i) =
if i = 0 then FStar.Seq.empty #uint8 else B.as_seq h tag
in
[@inline_let]
let footprint (i:size_nat{i <= v n}) :
GTot LB.(l:loc{loc_disjoint l (B.loc output) /\
address_liveness_insensitive_locs `loc_includes` l}) =
LB.loc_union (B.loc tag) (B.loc ctr)
in
[@inline_let]
let spec h0 : GTot (i:size_nat{i < v n} -> a_spec i -> a_spec (i + 1) & Seq.lseq uint8 (v tlen)) =
expand_loop a (B.as_seq h0 prk) (B.as_seq h0 info) (v n)
in
let h0 = ST.get () in
B.fill_blocks h0 tlen n output a_spec refl footprint spec (fun i ->
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (i +! 1ul);
let h1 = ST.get() in
if i = 0ul then
begin
Seq.eq_intro
(B.as_seq h1 text0)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (FStar.Seq.empty @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 0 (FStar.Seq.empty #uint8) in B.as_seq h2 tag == t)
end
else
begin
Seq.eq_intro
(B.as_seq h1 text)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
// let h2 = ST.get() in
// assert (B.as_seq h2 tag ==
// Spec.Agile.HMAC.hmac a (B.as_seq h0 prk)
// (B.as_seq h1 tag @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1))));
// assert (let _, t = spec h0 (v i) (B.as_seq h tag) in B.as_seq h2 tag == t)
end;
Seq.unfold_generate_blocks
(v tlen) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8) (v i);
//assert (v (i *! tlen) + v tlen <= v (n *! tlen));
B.copy (B.sub output (i *! tlen) tlen) tag
// let h3 = ST.get() in
// assert (
// footprint (v i + 1) `LB.loc_includes` footprint (v i) /\
// LB.modifies (LB.loc_union (footprint (v i + 1)) (B.loc block)) h h3);
//assert (
// let s, b = spec h0 (v i) (refl h (v i)) in
// refl h3 (v i + 1) == s /\ as_seq h3 block == b)
);
let h1 = ST.get () in
if n *! tlen <. len then
begin
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (n +! 1ul);
let h2 = ST.get() in
if n = 0ul then
begin
Seq.eq_intro
(B.as_seq h2 text0)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text0 (infolen +! 1ul)
end
else
begin
Seq.eq_intro
(B.as_seq h2 text)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul)
end;
let block = B.sub okm (n *! tlen) (len -! (n *! tlen)) in
B.copy block (B.sub tag 0ul (len -! (n *! tlen)))
end;
let h4 = ST.get() in
assert (
let tag', output' =
Seq.generate_blocks (v tlen) (v n) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8)
in
Seq.equal
(B.as_seq h4 okm)
(output' @| Seq.sub (B.as_seq h4 tag) 0 (v len - v n * v tlen)));
pop_frame () | val mk_expand:
a: fixed_len_alg ->
hmac: Hacl.HMAC.compute_st a ->
expand_st a
let mk_expand a hmac okm prk prklen info infolen len = | false | null | false | let tlen = Hash.Definitions.hash_len a in
let n = len /. tlen in
Math.Lemmas.lemma_div_mod (v len) (v tlen);
hmac_input_fits a;
[@@ inline_let ]let okm:B.lbuffer uint8 len = okm in
[@@ inline_let ]let prk:B.lbuffer uint8 prklen = prk in
[@@ inline_let ]let info:B.lbuffer uint8 infolen = info in
let output:B.lbuffer uint8 (n *! tlen) = B.sub okm 0ul (n *! tlen) in
push_frame ();
let text = B.create (tlen +! infolen +! 1ul) (u8 0) in
let text0:B.lbuffer uint8 (infolen +! 1ul) = B.sub text tlen (infolen +! 1ul) in
let tag = B.sub text 0ul tlen in
let ctr = B.sub text (tlen +! infolen) 1ul in
B.copy (B.sub text tlen infolen) info;
[@@ inline_let ]let a_spec = a_spec a in
[@@ inline_let ]let refl h (i: size_nat{i <= v n}) : GTot (a_spec i) =
if i = 0 then FStar.Seq.empty #uint8 else B.as_seq h tag
in
[@@ inline_let ]let footprint (i: size_nat{i <= v n})
: GTot
LB.(l: loc{loc_disjoint l (B.loc output) /\ address_liveness_insensitive_locs `loc_includes` l})
=
LB.loc_union (B.loc tag) (B.loc ctr)
in
[@@ inline_let ]let spec h0
: GTot (i: size_nat{i < v n} -> a_spec i -> a_spec (i + 1) & Seq.lseq uint8 (v tlen)) =
expand_loop a (B.as_seq h0 prk) (B.as_seq h0 info) (v n)
in
let h0 = ST.get () in
B.fill_blocks h0
tlen
n
output
a_spec
refl
footprint
spec
(fun i ->
ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (i +! 1ul);
let h1 = ST.get () in
if i = 0ul
then
(Seq.eq_intro (B.as_seq h1 text0)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text0 (infolen +! 1ul))
else
(Seq.eq_intro (B.as_seq h1 text)
(refl h1 (v i) @| B.as_seq h0 info @| Seq.create 1 (u8 (v i + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul));
Seq.unfold_generate_blocks (v tlen) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8) (v i);
B.copy (B.sub output (i *! tlen) tlen) tag);
let h1 = ST.get () in
if n *! tlen <. len
then
(ctr.(0ul) <- Lib.IntTypes.cast U8 PUB (n +! 1ul);
let h2 = ST.get () in
if n = 0ul
then
(Seq.eq_intro (B.as_seq h2 text0)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text0 (infolen +! 1ul))
else
(Seq.eq_intro (B.as_seq h2 text)
(refl h1 (v n) @| B.as_seq h0 info @| Seq.create 1 (u8 (v n + 1)));
hmac tag prk prklen text (tlen +! infolen +! 1ul));
let block = B.sub okm (n *! tlen) (len -! (n *! tlen)) in
B.copy block (B.sub tag 0ul (len -! (n *! tlen))));
let h4 = ST.get () in
assert (let tag', output' =
Seq.generate_blocks (v tlen) (v n) (v n) a_spec (spec h0) (FStar.Seq.empty #uint8)
in
Seq.equal (B.as_seq h4 okm) (output' @| Seq.sub (B.as_seq h4 tag) 0 (v len - v n * v tlen)));
pop_frame () | {
"checked_file": "Hacl.HKDF.fst.checked",
"dependencies": [
"Spec.Hash.Definitions.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"Spec.Agile.HKDF.fst.checked",
"prims.fst.checked",
"LowStar.Buffer.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fst.checked",
"Lib.Buffer.fsti.checked",
"Hacl.HMAC.fsti.checked",
"Hacl.Hash.Definitions.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.HKDF.fst"
} | [
"total"
] | [
"Spec.Hash.Definitions.fixed_len_alg",
"Hacl.HMAC.compute_st",
"LowStar.Buffer.buffer",
"Lib.IntTypes.uint8",
"Lib.IntTypes.pub_uint32",
"FStar.HyperStack.ST.pop_frame",
"Prims.unit",
"Prims._assert",
"Lib.IntTypes.v",
"Lib.IntTypes.U32",
"Lib.IntTypes.PUB",
"Lib.Sequence.seq",
"Prims.eq2",
"Prims.int",
"Lib.Sequence.length",
"FStar.Mul.op_Star",
"Lib.Sequence.equal",
"Lib.IntTypes.int_t",
"Lib.IntTypes.U8",
"Lib.IntTypes.SEC",
"Lib.Buffer.as_seq",
"Lib.Buffer.MUT",
"FStar.Seq.Base.op_At_Bar",
"Lib.Sequence.sub",
"Prims.op_Subtraction",
"FStar.Pervasives.Native.tuple2",
"Prims.op_Multiply",
"Lib.Sequence.generate_blocks",
"FStar.Seq.Base.empty",
"FStar.Monotonic.HyperStack.mem",
"FStar.HyperStack.ST.get",
"Lib.IntTypes.op_Less_Dot",
"Lib.IntTypes.op_Star_Bang",
"Lib.Buffer.copy",
"Lib.IntTypes.op_Subtraction_Bang",
"Lib.Buffer.lbuffer_t",
"Lib.IntTypes.sub",
"Lib.IntTypes.mul",
"Lib.Buffer.sub",
"FStar.UInt32.__uint_to_t",
"Prims.op_Equality",
"FStar.UInt32.t",
"Lib.IntTypes.op_Plus_Bang",
"Lib.Sequence.eq_intro",
"Lib.IntTypes.add",
"FStar.UInt32.uint_to_t",
"Lib.Sequence.create",
"Lib.IntTypes.u8",
"Prims.op_Addition",
"Prims.bool",
"Lib.Buffer.op_Array_Assignment",
"Lib.IntTypes.cast",
"Lib.Buffer.fill_blocks",
"Lib.IntTypes.size_t",
"Prims.b2t",
"Prims.op_LessThan",
"Lib.Sequence.unfold_generate_blocks",
"Prims.nat",
"Prims.op_LessThanOrEqual",
"Prims.pow2",
"Lib.Sequence.lseq",
"Spec.Agile.HKDF.expand_loop",
"Lib.IntTypes.size_nat",
"LowStar.Monotonic.Buffer.loc",
"Prims.l_and",
"LowStar.Monotonic.Buffer.loc_disjoint",
"Lib.Buffer.loc",
"LowStar.Monotonic.Buffer.loc_includes",
"LowStar.Monotonic.Buffer.address_liveness_insensitive_locs",
"LowStar.Monotonic.Buffer.loc_union",
"FStar.Integers.int_t",
"FStar.Integers.Signed",
"FStar.Integers.Winfinite",
"Prims.op_GreaterThanOrEqual",
"Spec.Agile.HKDF.a_spec",
"Lib.Buffer.create",
"Lib.Buffer.lbuffer",
"FStar.HyperStack.ST.push_frame",
"Hacl.HKDF.hmac_input_fits",
"FStar.Math.Lemmas.lemma_div_mod",
"Lib.IntTypes.op_Slash_Dot",
"Prims.l_or",
"Lib.IntTypes.range",
"Prims.op_GreaterThan",
"Spec.Hash.Definitions.hash_length",
"Hacl.Hash.Definitions.hash_len"
] | [] | module Hacl.HKDF
open FStar.Seq
module B = Lib.Buffer
module LB = LowStar.Buffer
open Spec.Hash.Definitions
open Spec.Agile.HKDF
open FStar.Mul
open FStar.HyperStack
open FStar.HyperStack.ST
open Lib.Buffer
friend Spec.Agile.HKDF
friend Lib.IntTypes
module Seq = Lib.Sequence
// TODO: proofs break mysteriously when not befriending Lib.IntTypes and
// declassifying uint8; investigate
// assume val declassify8: squash (uint8 == UInt8.t)
module ST = FStar.HyperStack.ST
#set-options "--max_fuel 0 --max_ifuel 0 --z3rlimit 100"
let mk_extract a hmac prk salt saltlen ikm ikmlen =
hmac prk salt saltlen ikm ikmlen
val hmac_input_fits: a:fixed_len_alg -> Lemma
((pow2 32 + block_length a) `less_than_max_input_length` a)
let hmac_input_fits a =
allow_inversion fixed_len_alg;
match a with
| MD5 ->
assert_norm (pow2 32 + block_length MD5 <= Some?.v (max_input_length MD5))
| SHA1 ->
assert_norm (pow2 32 + block_length SHA1 <= Some?.v (max_input_length SHA1))
| SHA2_224 ->
assert_norm (pow2 32 + block_length SHA2_224 <= Some?.v (max_input_length SHA2_224))
| SHA2_256 ->
assert_norm (pow2 32 + block_length SHA2_256 <= Some?.v (max_input_length SHA2_256))
| SHA2_384 ->
assert_norm (pow2 32 + block_length SHA2_384 <= Some?.v (max_input_length SHA2_384))
| SHA2_512 ->
assert_norm (pow2 32 + block_length SHA2_512 <= Some?.v (max_input_length SHA2_512))
| Blake2S ->
assert_norm (pow2 32 + block_length Blake2S <= Some?.v (max_input_length Blake2S))
| Blake2B ->
assert_norm (pow2 32 + block_length Blake2B <= Some?.v (max_input_length Blake2B))
| SHA3_224 -> ()
| SHA3_256 -> ()
| SHA3_384 -> ()
| SHA3_512 -> ()
#push-options "--z3rlimit 300" | false | false | Hacl.HKDF.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 300,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val mk_expand:
a: fixed_len_alg ->
hmac: Hacl.HMAC.compute_st a ->
expand_st a | [] | Hacl.HKDF.mk_expand | {
"file_name": "code/hkdf/Hacl.HKDF.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | a: Spec.Hash.Definitions.fixed_len_alg -> hmac: Hacl.HMAC.compute_st a -> Hacl.HKDF.expand_st a | {
"end_col": 14,
"end_line": 169,
"start_col": 54,
"start_line": 60
} |
FStar.HyperStack.ST.Stack | val point_double_4 (z3 t0 t2 t3:felem) : Stack unit
(requires fun h ->
live h z3 /\ live h t0 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc z3; loc t0; loc t2; loc t3 ] /\
as_nat h z3 < S.prime /\ as_nat h t0 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc z3 |+| loc t3) h0 h1 /\
as_nat h1 z3 < S.prime /\ as_nat h1 t3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t0_s = fmont_as_nat h0 t0 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fmul S.b_coeff z3_s in
let z3_s = S.fsub z3_s t2_s in
let z3_s = S.fsub z3_s t0_s in
let t3_s = S.fadd z3_s z3_s in
let z3_s = S.fadd z3_s t3_s in
fmont_as_nat h1 z3 == z3_s /\ fmont_as_nat h1 t3 == t3_s)) | [
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.All",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.All",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let point_double_4 z3 t0 t2 t3 =
fmul_by_b_coeff z3 z3;
fsub z3 z3 t2;
fsub z3 z3 t0;
fdouble t3 z3;
fadd z3 z3 t3 | val point_double_4 (z3 t0 t2 t3:felem) : Stack unit
(requires fun h ->
live h z3 /\ live h t0 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc z3; loc t0; loc t2; loc t3 ] /\
as_nat h z3 < S.prime /\ as_nat h t0 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc z3 |+| loc t3) h0 h1 /\
as_nat h1 z3 < S.prime /\ as_nat h1 t3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t0_s = fmont_as_nat h0 t0 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fmul S.b_coeff z3_s in
let z3_s = S.fsub z3_s t2_s in
let z3_s = S.fsub z3_s t0_s in
let t3_s = S.fadd z3_s z3_s in
let z3_s = S.fadd z3_s t3_s in
fmont_as_nat h1 z3 == z3_s /\ fmont_as_nat h1 t3 == t3_s))
let point_double_4 z3 t0 t2 t3 = | true | null | false | fmul_by_b_coeff z3 z3;
fsub z3 z3 t2;
fsub z3 z3 t0;
fdouble t3 z3;
fadd z3 z3 t3 | {
"checked_file": "Hacl.Impl.P256.PointDouble.fst.checked",
"dependencies": [
"Spec.P256.fst.checked",
"prims.fst.checked",
"LowStar.Monotonic.Buffer.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Impl.P256.Field.fsti.checked",
"Hacl.Impl.P256.Bignum.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.All.fst.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.Impl.P256.PointDouble.fst"
} | [] | [
"Hacl.Impl.P256.Bignum.felem",
"Hacl.Impl.P256.Field.fadd",
"Prims.unit",
"Hacl.Impl.P256.Field.fdouble",
"Hacl.Impl.P256.Field.fsub",
"Hacl.Impl.P256.Field.fmul_by_b_coeff"
] | [] | module Hacl.Impl.P256.PointDouble
open FStar.Mul
open FStar.HyperStack.All
open FStar.HyperStack
module ST = FStar.HyperStack.ST
open Lib.IntTypes
open Lib.Buffer
open Hacl.Impl.P256.Bignum
open Hacl.Impl.P256.Field
module S = Spec.P256
#set-options "--z3rlimit 50 --ifuel 0 --fuel 0"
inline_for_extraction noextract
val point_double_1 (t0 t1 t2 t3 t4:felem) (p:point) : Stack unit
(requires fun h ->
live h t0 /\ live h t1 /\ live h t2 /\
live h t3 /\ live h t4 /\ live h p /\
LowStar.Monotonic.Buffer.all_disjoint
[loc t0; loc t1; loc t2; loc t3; loc t4; loc p ] /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc t0 |+| loc t1 |+| loc t2 |+| loc t3 |+| loc t4) h0 h1 /\
as_nat h1 t0 < S.prime /\ as_nat h1 t1 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
as_nat h1 t4 < S.prime /\
(let x, y, z = from_mont_point (as_point_nat h0 p) in
let t0_s = S.fmul x x in
let t1_s = S.fmul y y in
let t2_s = S.fmul z z in
let t3_s = S.fmul x y in
let t3_s = S.fadd t3_s t3_s in
let t4_s = S.fmul y z in
fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t1 == t1_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s /\
fmont_as_nat h1 t4 == t4_s))
let point_double_1 t0 t1 t2 t3 t4 p =
let x, y, z = getx p, gety p, getz p in
fsqr t0 x;
fsqr t1 y;
fsqr t2 z;
fmul t3 x y;
fdouble t3 t3;
fmul t4 y z
inline_for_extraction noextract
val point_double_2 (x3 y3 z3 t2:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h z3 /\ live h t2 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc z3; loc t2 ] /\
as_nat h z3 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc z3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\ as_nat h1 z3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fadd z3_s z3_s in
let y3_s = S.fmul S.b_coeff t2_s in
let y3_s = S.fsub y3_s z3_s in
let x3_s = S.fadd y3_s y3_s in
let y3_s = S.fadd x3_s y3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 z3 == z3_s))
let point_double_2 x3 y3 z3 t2 =
fdouble z3 z3;
fmul_by_b_coeff y3 t2;
fsub y3 y3 z3;
fdouble x3 y3;
fadd y3 x3 y3
inline_for_extraction noextract
val point_double_3 (x3 y3 t1 t2 t3:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h t1 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc t1; loc t2; loc t3 ] /\
as_nat h t1 < S.prime /\ as_nat h t2 < S.prime /\
as_nat h t3 < S.prime /\ as_nat h y3 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc t2 |+| loc t3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
(let t1_s = fmont_as_nat h0 t1 in
let t2_s = fmont_as_nat h0 t2 in
let t3_s = fmont_as_nat h0 t3 in
let y3_s = fmont_as_nat h0 y3 in
let x3_s = S.fsub t1_s y3_s in
let y3_s = S.fadd t1_s y3_s in
let y3_s = S.fmul x3_s y3_s in
let x3_s = S.fmul x3_s t3_s in
let t3_s = S.fadd t2_s t2_s in
let t2_s = S.fadd t2_s t3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s))
let point_double_3 x3 y3 t1 t2 t3 =
fsub x3 t1 y3;
fadd y3 t1 y3;
fmul y3 x3 y3;
fmul x3 x3 t3;
fdouble t3 t2;
fadd t2 t2 t3
inline_for_extraction noextract
val point_double_4 (z3 t0 t2 t3:felem) : Stack unit
(requires fun h ->
live h z3 /\ live h t0 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc z3; loc t0; loc t2; loc t3 ] /\
as_nat h z3 < S.prime /\ as_nat h t0 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc z3 |+| loc t3) h0 h1 /\
as_nat h1 z3 < S.prime /\ as_nat h1 t3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t0_s = fmont_as_nat h0 t0 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fmul S.b_coeff z3_s in
let z3_s = S.fsub z3_s t2_s in
let z3_s = S.fsub z3_s t0_s in
let t3_s = S.fadd z3_s z3_s in
let z3_s = S.fadd z3_s t3_s in
fmont_as_nat h1 z3 == z3_s /\ fmont_as_nat h1 t3 == t3_s)) | false | false | Hacl.Impl.P256.PointDouble.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val point_double_4 (z3 t0 t2 t3:felem) : Stack unit
(requires fun h ->
live h z3 /\ live h t0 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc z3; loc t0; loc t2; loc t3 ] /\
as_nat h z3 < S.prime /\ as_nat h t0 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc z3 |+| loc t3) h0 h1 /\
as_nat h1 z3 < S.prime /\ as_nat h1 t3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t0_s = fmont_as_nat h0 t0 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fmul S.b_coeff z3_s in
let z3_s = S.fsub z3_s t2_s in
let z3_s = S.fsub z3_s t0_s in
let t3_s = S.fadd z3_s z3_s in
let z3_s = S.fadd z3_s t3_s in
fmont_as_nat h1 z3 == z3_s /\ fmont_as_nat h1 t3 == t3_s)) | [] | Hacl.Impl.P256.PointDouble.point_double_4 | {
"file_name": "code/ecdsap256/Hacl.Impl.P256.PointDouble.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
z3: Hacl.Impl.P256.Bignum.felem ->
t0: Hacl.Impl.P256.Bignum.felem ->
t2: Hacl.Impl.P256.Bignum.felem ->
t3: Hacl.Impl.P256.Bignum.felem
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 15,
"end_line": 133,
"start_col": 2,
"start_line": 129
} |
FStar.HyperStack.ST.Stack | val point_double_5 (y3 z3 t0 t2 t3:felem) : Stack unit
(requires fun h ->
live h y3 /\ live h z3 /\ live h t0 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc y3; loc z3; loc t0; loc t2; loc t3 ] /\
as_nat h y3 < S.prime /\ as_nat h z3 < S.prime /\
as_nat h t0 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc y3 |+| loc t0 |+| loc t3) h0 h1 /\
as_nat h1 y3 < S.prime /\ as_nat h1 t3 < S.prime /\
(let t0_s = fmont_as_nat h0 t0 in
let t2_s = fmont_as_nat h0 t2 in
let y3_s = fmont_as_nat h0 y3 in
let z3_s = fmont_as_nat h0 z3 in
let t3_s = S.fadd t0_s t0_s in
let t0_s = S.fadd t3_s t0_s in
let t0_s = S.fsub t0_s t2_s in
let t0_s = S.fmul t0_s z3_s in
let y3_s = S.fadd y3_s t0_s in
fmont_as_nat h1 y3 == y3_s /\ fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t3 == t3_s)) | [
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.All",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.All",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let point_double_5 y3 z3 t0 t2 t3 =
fdouble t3 t0;
fadd t0 t3 t0;
fsub t0 t0 t2;
fmul t0 t0 z3;
fadd y3 y3 t0 | val point_double_5 (y3 z3 t0 t2 t3:felem) : Stack unit
(requires fun h ->
live h y3 /\ live h z3 /\ live h t0 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc y3; loc z3; loc t0; loc t2; loc t3 ] /\
as_nat h y3 < S.prime /\ as_nat h z3 < S.prime /\
as_nat h t0 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc y3 |+| loc t0 |+| loc t3) h0 h1 /\
as_nat h1 y3 < S.prime /\ as_nat h1 t3 < S.prime /\
(let t0_s = fmont_as_nat h0 t0 in
let t2_s = fmont_as_nat h0 t2 in
let y3_s = fmont_as_nat h0 y3 in
let z3_s = fmont_as_nat h0 z3 in
let t3_s = S.fadd t0_s t0_s in
let t0_s = S.fadd t3_s t0_s in
let t0_s = S.fsub t0_s t2_s in
let t0_s = S.fmul t0_s z3_s in
let y3_s = S.fadd y3_s t0_s in
fmont_as_nat h1 y3 == y3_s /\ fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t3 == t3_s))
let point_double_5 y3 z3 t0 t2 t3 = | true | null | false | fdouble t3 t0;
fadd t0 t3 t0;
fsub t0 t0 t2;
fmul t0 t0 z3;
fadd y3 y3 t0 | {
"checked_file": "Hacl.Impl.P256.PointDouble.fst.checked",
"dependencies": [
"Spec.P256.fst.checked",
"prims.fst.checked",
"LowStar.Monotonic.Buffer.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Impl.P256.Field.fsti.checked",
"Hacl.Impl.P256.Bignum.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.All.fst.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.Impl.P256.PointDouble.fst"
} | [] | [
"Hacl.Impl.P256.Bignum.felem",
"Hacl.Impl.P256.Field.fadd",
"Prims.unit",
"Hacl.Impl.P256.Field.fmul",
"Hacl.Impl.P256.Field.fsub",
"Hacl.Impl.P256.Field.fdouble"
] | [] | module Hacl.Impl.P256.PointDouble
open FStar.Mul
open FStar.HyperStack.All
open FStar.HyperStack
module ST = FStar.HyperStack.ST
open Lib.IntTypes
open Lib.Buffer
open Hacl.Impl.P256.Bignum
open Hacl.Impl.P256.Field
module S = Spec.P256
#set-options "--z3rlimit 50 --ifuel 0 --fuel 0"
inline_for_extraction noextract
val point_double_1 (t0 t1 t2 t3 t4:felem) (p:point) : Stack unit
(requires fun h ->
live h t0 /\ live h t1 /\ live h t2 /\
live h t3 /\ live h t4 /\ live h p /\
LowStar.Monotonic.Buffer.all_disjoint
[loc t0; loc t1; loc t2; loc t3; loc t4; loc p ] /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc t0 |+| loc t1 |+| loc t2 |+| loc t3 |+| loc t4) h0 h1 /\
as_nat h1 t0 < S.prime /\ as_nat h1 t1 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
as_nat h1 t4 < S.prime /\
(let x, y, z = from_mont_point (as_point_nat h0 p) in
let t0_s = S.fmul x x in
let t1_s = S.fmul y y in
let t2_s = S.fmul z z in
let t3_s = S.fmul x y in
let t3_s = S.fadd t3_s t3_s in
let t4_s = S.fmul y z in
fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t1 == t1_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s /\
fmont_as_nat h1 t4 == t4_s))
let point_double_1 t0 t1 t2 t3 t4 p =
let x, y, z = getx p, gety p, getz p in
fsqr t0 x;
fsqr t1 y;
fsqr t2 z;
fmul t3 x y;
fdouble t3 t3;
fmul t4 y z
inline_for_extraction noextract
val point_double_2 (x3 y3 z3 t2:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h z3 /\ live h t2 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc z3; loc t2 ] /\
as_nat h z3 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc z3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\ as_nat h1 z3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fadd z3_s z3_s in
let y3_s = S.fmul S.b_coeff t2_s in
let y3_s = S.fsub y3_s z3_s in
let x3_s = S.fadd y3_s y3_s in
let y3_s = S.fadd x3_s y3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 z3 == z3_s))
let point_double_2 x3 y3 z3 t2 =
fdouble z3 z3;
fmul_by_b_coeff y3 t2;
fsub y3 y3 z3;
fdouble x3 y3;
fadd y3 x3 y3
inline_for_extraction noextract
val point_double_3 (x3 y3 t1 t2 t3:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h t1 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc t1; loc t2; loc t3 ] /\
as_nat h t1 < S.prime /\ as_nat h t2 < S.prime /\
as_nat h t3 < S.prime /\ as_nat h y3 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc t2 |+| loc t3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
(let t1_s = fmont_as_nat h0 t1 in
let t2_s = fmont_as_nat h0 t2 in
let t3_s = fmont_as_nat h0 t3 in
let y3_s = fmont_as_nat h0 y3 in
let x3_s = S.fsub t1_s y3_s in
let y3_s = S.fadd t1_s y3_s in
let y3_s = S.fmul x3_s y3_s in
let x3_s = S.fmul x3_s t3_s in
let t3_s = S.fadd t2_s t2_s in
let t2_s = S.fadd t2_s t3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s))
let point_double_3 x3 y3 t1 t2 t3 =
fsub x3 t1 y3;
fadd y3 t1 y3;
fmul y3 x3 y3;
fmul x3 x3 t3;
fdouble t3 t2;
fadd t2 t2 t3
inline_for_extraction noextract
val point_double_4 (z3 t0 t2 t3:felem) : Stack unit
(requires fun h ->
live h z3 /\ live h t0 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc z3; loc t0; loc t2; loc t3 ] /\
as_nat h z3 < S.prime /\ as_nat h t0 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc z3 |+| loc t3) h0 h1 /\
as_nat h1 z3 < S.prime /\ as_nat h1 t3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t0_s = fmont_as_nat h0 t0 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fmul S.b_coeff z3_s in
let z3_s = S.fsub z3_s t2_s in
let z3_s = S.fsub z3_s t0_s in
let t3_s = S.fadd z3_s z3_s in
let z3_s = S.fadd z3_s t3_s in
fmont_as_nat h1 z3 == z3_s /\ fmont_as_nat h1 t3 == t3_s))
let point_double_4 z3 t0 t2 t3 =
fmul_by_b_coeff z3 z3;
fsub z3 z3 t2;
fsub z3 z3 t0;
fdouble t3 z3;
fadd z3 z3 t3
inline_for_extraction noextract
val point_double_5 (y3 z3 t0 t2 t3:felem) : Stack unit
(requires fun h ->
live h y3 /\ live h z3 /\ live h t0 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc y3; loc z3; loc t0; loc t2; loc t3 ] /\
as_nat h y3 < S.prime /\ as_nat h z3 < S.prime /\
as_nat h t0 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc y3 |+| loc t0 |+| loc t3) h0 h1 /\
as_nat h1 y3 < S.prime /\ as_nat h1 t3 < S.prime /\
(let t0_s = fmont_as_nat h0 t0 in
let t2_s = fmont_as_nat h0 t2 in
let y3_s = fmont_as_nat h0 y3 in
let z3_s = fmont_as_nat h0 z3 in
let t3_s = S.fadd t0_s t0_s in
let t0_s = S.fadd t3_s t0_s in
let t0_s = S.fsub t0_s t2_s in
let t0_s = S.fmul t0_s z3_s in
let y3_s = S.fadd y3_s t0_s in
fmont_as_nat h1 y3 == y3_s /\ fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t3 == t3_s)) | false | false | Hacl.Impl.P256.PointDouble.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val point_double_5 (y3 z3 t0 t2 t3:felem) : Stack unit
(requires fun h ->
live h y3 /\ live h z3 /\ live h t0 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc y3; loc z3; loc t0; loc t2; loc t3 ] /\
as_nat h y3 < S.prime /\ as_nat h z3 < S.prime /\
as_nat h t0 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc y3 |+| loc t0 |+| loc t3) h0 h1 /\
as_nat h1 y3 < S.prime /\ as_nat h1 t3 < S.prime /\
(let t0_s = fmont_as_nat h0 t0 in
let t2_s = fmont_as_nat h0 t2 in
let y3_s = fmont_as_nat h0 y3 in
let z3_s = fmont_as_nat h0 z3 in
let t3_s = S.fadd t0_s t0_s in
let t0_s = S.fadd t3_s t0_s in
let t0_s = S.fsub t0_s t2_s in
let t0_s = S.fmul t0_s z3_s in
let y3_s = S.fadd y3_s t0_s in
fmont_as_nat h1 y3 == y3_s /\ fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t3 == t3_s)) | [] | Hacl.Impl.P256.PointDouble.point_double_5 | {
"file_name": "code/ecdsap256/Hacl.Impl.P256.PointDouble.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
y3: Hacl.Impl.P256.Bignum.felem ->
z3: Hacl.Impl.P256.Bignum.felem ->
t0: Hacl.Impl.P256.Bignum.felem ->
t2: Hacl.Impl.P256.Bignum.felem ->
t3: Hacl.Impl.P256.Bignum.felem
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 15,
"end_line": 161,
"start_col": 2,
"start_line": 157
} |
FStar.HyperStack.ST.Stack | val point_double: res:point -> p:point -> Stack unit
(requires fun h ->
live h p /\ live h res /\ eq_or_disjoint p res /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc res) h0 h1 /\
point_inv h1 res /\
from_mont_point (as_point_nat h1 res) ==
S.point_double (from_mont_point (as_point_nat h0 p))) | [
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.All",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.All",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let point_double res p =
push_frame ();
let tmp = create 20ul (u64 0) in
point_double_noalloc tmp res p;
pop_frame () | val point_double: res:point -> p:point -> Stack unit
(requires fun h ->
live h p /\ live h res /\ eq_or_disjoint p res /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc res) h0 h1 /\
point_inv h1 res /\
from_mont_point (as_point_nat h1 res) ==
S.point_double (from_mont_point (as_point_nat h0 p)))
let point_double res p = | true | null | false | push_frame ();
let tmp = create 20ul (u64 0) in
point_double_noalloc tmp res p;
pop_frame () | {
"checked_file": "Hacl.Impl.P256.PointDouble.fst.checked",
"dependencies": [
"Spec.P256.fst.checked",
"prims.fst.checked",
"LowStar.Monotonic.Buffer.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Impl.P256.Field.fsti.checked",
"Hacl.Impl.P256.Bignum.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.All.fst.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.Impl.P256.PointDouble.fst"
} | [] | [
"Hacl.Impl.P256.Point.point",
"FStar.HyperStack.ST.pop_frame",
"Prims.unit",
"Hacl.Impl.P256.PointDouble.point_double_noalloc",
"Lib.Buffer.lbuffer_t",
"Lib.Buffer.MUT",
"Lib.IntTypes.int_t",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"FStar.UInt32.uint_to_t",
"FStar.UInt32.t",
"Lib.Buffer.create",
"Lib.IntTypes.uint64",
"FStar.UInt32.__uint_to_t",
"Lib.IntTypes.u64",
"Lib.Buffer.lbuffer",
"FStar.HyperStack.ST.push_frame"
] | [] | module Hacl.Impl.P256.PointDouble
open FStar.Mul
open FStar.HyperStack.All
open FStar.HyperStack
module ST = FStar.HyperStack.ST
open Lib.IntTypes
open Lib.Buffer
open Hacl.Impl.P256.Bignum
open Hacl.Impl.P256.Field
module S = Spec.P256
#set-options "--z3rlimit 50 --ifuel 0 --fuel 0"
inline_for_extraction noextract
val point_double_1 (t0 t1 t2 t3 t4:felem) (p:point) : Stack unit
(requires fun h ->
live h t0 /\ live h t1 /\ live h t2 /\
live h t3 /\ live h t4 /\ live h p /\
LowStar.Monotonic.Buffer.all_disjoint
[loc t0; loc t1; loc t2; loc t3; loc t4; loc p ] /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc t0 |+| loc t1 |+| loc t2 |+| loc t3 |+| loc t4) h0 h1 /\
as_nat h1 t0 < S.prime /\ as_nat h1 t1 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
as_nat h1 t4 < S.prime /\
(let x, y, z = from_mont_point (as_point_nat h0 p) in
let t0_s = S.fmul x x in
let t1_s = S.fmul y y in
let t2_s = S.fmul z z in
let t3_s = S.fmul x y in
let t3_s = S.fadd t3_s t3_s in
let t4_s = S.fmul y z in
fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t1 == t1_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s /\
fmont_as_nat h1 t4 == t4_s))
let point_double_1 t0 t1 t2 t3 t4 p =
let x, y, z = getx p, gety p, getz p in
fsqr t0 x;
fsqr t1 y;
fsqr t2 z;
fmul t3 x y;
fdouble t3 t3;
fmul t4 y z
inline_for_extraction noextract
val point_double_2 (x3 y3 z3 t2:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h z3 /\ live h t2 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc z3; loc t2 ] /\
as_nat h z3 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc z3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\ as_nat h1 z3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fadd z3_s z3_s in
let y3_s = S.fmul S.b_coeff t2_s in
let y3_s = S.fsub y3_s z3_s in
let x3_s = S.fadd y3_s y3_s in
let y3_s = S.fadd x3_s y3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 z3 == z3_s))
let point_double_2 x3 y3 z3 t2 =
fdouble z3 z3;
fmul_by_b_coeff y3 t2;
fsub y3 y3 z3;
fdouble x3 y3;
fadd y3 x3 y3
inline_for_extraction noextract
val point_double_3 (x3 y3 t1 t2 t3:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h t1 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc t1; loc t2; loc t3 ] /\
as_nat h t1 < S.prime /\ as_nat h t2 < S.prime /\
as_nat h t3 < S.prime /\ as_nat h y3 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc t2 |+| loc t3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
(let t1_s = fmont_as_nat h0 t1 in
let t2_s = fmont_as_nat h0 t2 in
let t3_s = fmont_as_nat h0 t3 in
let y3_s = fmont_as_nat h0 y3 in
let x3_s = S.fsub t1_s y3_s in
let y3_s = S.fadd t1_s y3_s in
let y3_s = S.fmul x3_s y3_s in
let x3_s = S.fmul x3_s t3_s in
let t3_s = S.fadd t2_s t2_s in
let t2_s = S.fadd t2_s t3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s))
let point_double_3 x3 y3 t1 t2 t3 =
fsub x3 t1 y3;
fadd y3 t1 y3;
fmul y3 x3 y3;
fmul x3 x3 t3;
fdouble t3 t2;
fadd t2 t2 t3
inline_for_extraction noextract
val point_double_4 (z3 t0 t2 t3:felem) : Stack unit
(requires fun h ->
live h z3 /\ live h t0 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc z3; loc t0; loc t2; loc t3 ] /\
as_nat h z3 < S.prime /\ as_nat h t0 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc z3 |+| loc t3) h0 h1 /\
as_nat h1 z3 < S.prime /\ as_nat h1 t3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t0_s = fmont_as_nat h0 t0 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fmul S.b_coeff z3_s in
let z3_s = S.fsub z3_s t2_s in
let z3_s = S.fsub z3_s t0_s in
let t3_s = S.fadd z3_s z3_s in
let z3_s = S.fadd z3_s t3_s in
fmont_as_nat h1 z3 == z3_s /\ fmont_as_nat h1 t3 == t3_s))
let point_double_4 z3 t0 t2 t3 =
fmul_by_b_coeff z3 z3;
fsub z3 z3 t2;
fsub z3 z3 t0;
fdouble t3 z3;
fadd z3 z3 t3
inline_for_extraction noextract
val point_double_5 (y3 z3 t0 t2 t3:felem) : Stack unit
(requires fun h ->
live h y3 /\ live h z3 /\ live h t0 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc y3; loc z3; loc t0; loc t2; loc t3 ] /\
as_nat h y3 < S.prime /\ as_nat h z3 < S.prime /\
as_nat h t0 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc y3 |+| loc t0 |+| loc t3) h0 h1 /\
as_nat h1 y3 < S.prime /\ as_nat h1 t3 < S.prime /\
(let t0_s = fmont_as_nat h0 t0 in
let t2_s = fmont_as_nat h0 t2 in
let y3_s = fmont_as_nat h0 y3 in
let z3_s = fmont_as_nat h0 z3 in
let t3_s = S.fadd t0_s t0_s in
let t0_s = S.fadd t3_s t0_s in
let t0_s = S.fsub t0_s t2_s in
let t0_s = S.fmul t0_s z3_s in
let y3_s = S.fadd y3_s t0_s in
fmont_as_nat h1 y3 == y3_s /\ fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t3 == t3_s))
let point_double_5 y3 z3 t0 t2 t3 =
fdouble t3 t0;
fadd t0 t3 t0;
fsub t0 t0 t2;
fmul t0 t0 z3;
fadd y3 y3 t0
inline_for_extraction noextract
val point_double_6 (x3 z3 t0 t1 t4:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h z3 /\ live h t0 /\ live h t1 /\ live h t4 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc z3; loc t0; loc t1; loc t4 ] /\
as_nat h x3 < S.prime /\ as_nat h z3 < S.prime /\
as_nat h t1 < S.prime /\ as_nat h t4 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc z3 |+| loc t0) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 z3 < S.prime /\ as_nat h1 t0 < S.prime /\
(let t1_s = fmont_as_nat h0 t1 in
let t4_s = fmont_as_nat h0 t4 in
let x3_s = fmont_as_nat h0 x3 in
let z3_s = fmont_as_nat h0 z3 in
let t0_s = S.fadd t4_s t4_s in
let z3_s = S.fmul t0_s z3_s in
let x3_s = S.fsub x3_s z3_s in
let z3_s = S.fmul t0_s t1_s in
let z3_s = S.fadd z3_s z3_s in
let z3_s = S.fadd z3_s z3_s in
fmont_as_nat h1 z3 == z3_s /\ fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 t0 == t0_s))
let point_double_6 x3 z3 t0 t1 t4 =
fdouble t0 t4;
fmul z3 t0 z3;
fsub x3 x3 z3;
fmul z3 t0 t1;
fdouble z3 z3;
fdouble z3 z3
inline_for_extraction noextract
val point_double_noalloc: tmp:lbuffer uint64 20ul -> res:point -> p:point -> Stack unit
(requires fun h ->
live h p /\ live h res /\ live h tmp /\
eq_or_disjoint p res /\ disjoint tmp res /\ disjoint tmp p /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc res |+| loc tmp) h0 h1 /\
point_inv h1 res /\
from_mont_point (as_point_nat h1 res) ==
S.point_double (from_mont_point (as_point_nat h0 p)))
let point_double_noalloc tmp res p =
let x, z = getx p, getz p in
let x3, y3, z3 = getx res, gety res, getz res in
let t0 = sub tmp 0ul 4ul in
let t1 = sub tmp 4ul 4ul in
let t2 = sub tmp 8ul 4ul in
let t3 = sub tmp 12ul 4ul in
let t4 = sub tmp 16ul 4ul in
point_double_1 t0 t1 t2 t3 t4 p;
fmul z3 x z;
point_double_2 x3 y3 z3 t2;
point_double_3 x3 y3 t1 t2 t3;
point_double_4 z3 t0 t2 t3;
point_double_5 y3 z3 t0 t2 t3;
point_double_6 x3 z3 t0 t1 t4
[@CInline] | false | false | Hacl.Impl.P256.PointDouble.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val point_double: res:point -> p:point -> Stack unit
(requires fun h ->
live h p /\ live h res /\ eq_or_disjoint p res /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc res) h0 h1 /\
point_inv h1 res /\
from_mont_point (as_point_nat h1 res) ==
S.point_double (from_mont_point (as_point_nat h0 p))) | [] | Hacl.Impl.P256.PointDouble.point_double | {
"file_name": "code/ecdsap256/Hacl.Impl.P256.PointDouble.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | res: Hacl.Impl.P256.Point.point -> p: Hacl.Impl.P256.Point.point
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 14,
"end_line": 227,
"start_col": 2,
"start_line": 224
} |
FStar.HyperStack.ST.Stack | val point_double_2 (x3 y3 z3 t2:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h z3 /\ live h t2 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc z3; loc t2 ] /\
as_nat h z3 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc z3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\ as_nat h1 z3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fadd z3_s z3_s in
let y3_s = S.fmul S.b_coeff t2_s in
let y3_s = S.fsub y3_s z3_s in
let x3_s = S.fadd y3_s y3_s in
let y3_s = S.fadd x3_s y3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 z3 == z3_s)) | [
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.All",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.All",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let point_double_2 x3 y3 z3 t2 =
fdouble z3 z3;
fmul_by_b_coeff y3 t2;
fsub y3 y3 z3;
fdouble x3 y3;
fadd y3 x3 y3 | val point_double_2 (x3 y3 z3 t2:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h z3 /\ live h t2 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc z3; loc t2 ] /\
as_nat h z3 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc z3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\ as_nat h1 z3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fadd z3_s z3_s in
let y3_s = S.fmul S.b_coeff t2_s in
let y3_s = S.fsub y3_s z3_s in
let x3_s = S.fadd y3_s y3_s in
let y3_s = S.fadd x3_s y3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 z3 == z3_s))
let point_double_2 x3 y3 z3 t2 = | true | null | false | fdouble z3 z3;
fmul_by_b_coeff y3 t2;
fsub y3 y3 z3;
fdouble x3 y3;
fadd y3 x3 y3 | {
"checked_file": "Hacl.Impl.P256.PointDouble.fst.checked",
"dependencies": [
"Spec.P256.fst.checked",
"prims.fst.checked",
"LowStar.Monotonic.Buffer.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Impl.P256.Field.fsti.checked",
"Hacl.Impl.P256.Bignum.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.All.fst.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.Impl.P256.PointDouble.fst"
} | [] | [
"Hacl.Impl.P256.Bignum.felem",
"Hacl.Impl.P256.Field.fadd",
"Prims.unit",
"Hacl.Impl.P256.Field.fdouble",
"Hacl.Impl.P256.Field.fsub",
"Hacl.Impl.P256.Field.fmul_by_b_coeff"
] | [] | module Hacl.Impl.P256.PointDouble
open FStar.Mul
open FStar.HyperStack.All
open FStar.HyperStack
module ST = FStar.HyperStack.ST
open Lib.IntTypes
open Lib.Buffer
open Hacl.Impl.P256.Bignum
open Hacl.Impl.P256.Field
module S = Spec.P256
#set-options "--z3rlimit 50 --ifuel 0 --fuel 0"
inline_for_extraction noextract
val point_double_1 (t0 t1 t2 t3 t4:felem) (p:point) : Stack unit
(requires fun h ->
live h t0 /\ live h t1 /\ live h t2 /\
live h t3 /\ live h t4 /\ live h p /\
LowStar.Monotonic.Buffer.all_disjoint
[loc t0; loc t1; loc t2; loc t3; loc t4; loc p ] /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc t0 |+| loc t1 |+| loc t2 |+| loc t3 |+| loc t4) h0 h1 /\
as_nat h1 t0 < S.prime /\ as_nat h1 t1 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
as_nat h1 t4 < S.prime /\
(let x, y, z = from_mont_point (as_point_nat h0 p) in
let t0_s = S.fmul x x in
let t1_s = S.fmul y y in
let t2_s = S.fmul z z in
let t3_s = S.fmul x y in
let t3_s = S.fadd t3_s t3_s in
let t4_s = S.fmul y z in
fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t1 == t1_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s /\
fmont_as_nat h1 t4 == t4_s))
let point_double_1 t0 t1 t2 t3 t4 p =
let x, y, z = getx p, gety p, getz p in
fsqr t0 x;
fsqr t1 y;
fsqr t2 z;
fmul t3 x y;
fdouble t3 t3;
fmul t4 y z
inline_for_extraction noextract
val point_double_2 (x3 y3 z3 t2:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h z3 /\ live h t2 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc z3; loc t2 ] /\
as_nat h z3 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc z3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\ as_nat h1 z3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fadd z3_s z3_s in
let y3_s = S.fmul S.b_coeff t2_s in
let y3_s = S.fsub y3_s z3_s in
let x3_s = S.fadd y3_s y3_s in
let y3_s = S.fadd x3_s y3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 z3 == z3_s)) | false | false | Hacl.Impl.P256.PointDouble.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val point_double_2 (x3 y3 z3 t2:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h z3 /\ live h t2 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc z3; loc t2 ] /\
as_nat h z3 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc z3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\ as_nat h1 z3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fadd z3_s z3_s in
let y3_s = S.fmul S.b_coeff t2_s in
let y3_s = S.fsub y3_s z3_s in
let x3_s = S.fadd y3_s y3_s in
let y3_s = S.fadd x3_s y3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 z3 == z3_s)) | [] | Hacl.Impl.P256.PointDouble.point_double_2 | {
"file_name": "code/ecdsap256/Hacl.Impl.P256.PointDouble.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
x3: Hacl.Impl.P256.Bignum.felem ->
y3: Hacl.Impl.P256.Bignum.felem ->
z3: Hacl.Impl.P256.Bignum.felem ->
t2: Hacl.Impl.P256.Bignum.felem
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 15,
"end_line": 74,
"start_col": 2,
"start_line": 70
} |
FStar.HyperStack.ST.Stack | val point_double_3 (x3 y3 t1 t2 t3:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h t1 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc t1; loc t2; loc t3 ] /\
as_nat h t1 < S.prime /\ as_nat h t2 < S.prime /\
as_nat h t3 < S.prime /\ as_nat h y3 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc t2 |+| loc t3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
(let t1_s = fmont_as_nat h0 t1 in
let t2_s = fmont_as_nat h0 t2 in
let t3_s = fmont_as_nat h0 t3 in
let y3_s = fmont_as_nat h0 y3 in
let x3_s = S.fsub t1_s y3_s in
let y3_s = S.fadd t1_s y3_s in
let y3_s = S.fmul x3_s y3_s in
let x3_s = S.fmul x3_s t3_s in
let t3_s = S.fadd t2_s t2_s in
let t2_s = S.fadd t2_s t3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s)) | [
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.All",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.All",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let point_double_3 x3 y3 t1 t2 t3 =
fsub x3 t1 y3;
fadd y3 t1 y3;
fmul y3 x3 y3;
fmul x3 x3 t3;
fdouble t3 t2;
fadd t2 t2 t3 | val point_double_3 (x3 y3 t1 t2 t3:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h t1 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc t1; loc t2; loc t3 ] /\
as_nat h t1 < S.prime /\ as_nat h t2 < S.prime /\
as_nat h t3 < S.prime /\ as_nat h y3 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc t2 |+| loc t3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
(let t1_s = fmont_as_nat h0 t1 in
let t2_s = fmont_as_nat h0 t2 in
let t3_s = fmont_as_nat h0 t3 in
let y3_s = fmont_as_nat h0 y3 in
let x3_s = S.fsub t1_s y3_s in
let y3_s = S.fadd t1_s y3_s in
let y3_s = S.fmul x3_s y3_s in
let x3_s = S.fmul x3_s t3_s in
let t3_s = S.fadd t2_s t2_s in
let t2_s = S.fadd t2_s t3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s))
let point_double_3 x3 y3 t1 t2 t3 = | true | null | false | fsub x3 t1 y3;
fadd y3 t1 y3;
fmul y3 x3 y3;
fmul x3 x3 t3;
fdouble t3 t2;
fadd t2 t2 t3 | {
"checked_file": "Hacl.Impl.P256.PointDouble.fst.checked",
"dependencies": [
"Spec.P256.fst.checked",
"prims.fst.checked",
"LowStar.Monotonic.Buffer.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Impl.P256.Field.fsti.checked",
"Hacl.Impl.P256.Bignum.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.All.fst.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.Impl.P256.PointDouble.fst"
} | [] | [
"Hacl.Impl.P256.Bignum.felem",
"Hacl.Impl.P256.Field.fadd",
"Prims.unit",
"Hacl.Impl.P256.Field.fdouble",
"Hacl.Impl.P256.Field.fmul",
"Hacl.Impl.P256.Field.fsub"
] | [] | module Hacl.Impl.P256.PointDouble
open FStar.Mul
open FStar.HyperStack.All
open FStar.HyperStack
module ST = FStar.HyperStack.ST
open Lib.IntTypes
open Lib.Buffer
open Hacl.Impl.P256.Bignum
open Hacl.Impl.P256.Field
module S = Spec.P256
#set-options "--z3rlimit 50 --ifuel 0 --fuel 0"
inline_for_extraction noextract
val point_double_1 (t0 t1 t2 t3 t4:felem) (p:point) : Stack unit
(requires fun h ->
live h t0 /\ live h t1 /\ live h t2 /\
live h t3 /\ live h t4 /\ live h p /\
LowStar.Monotonic.Buffer.all_disjoint
[loc t0; loc t1; loc t2; loc t3; loc t4; loc p ] /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc t0 |+| loc t1 |+| loc t2 |+| loc t3 |+| loc t4) h0 h1 /\
as_nat h1 t0 < S.prime /\ as_nat h1 t1 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
as_nat h1 t4 < S.prime /\
(let x, y, z = from_mont_point (as_point_nat h0 p) in
let t0_s = S.fmul x x in
let t1_s = S.fmul y y in
let t2_s = S.fmul z z in
let t3_s = S.fmul x y in
let t3_s = S.fadd t3_s t3_s in
let t4_s = S.fmul y z in
fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t1 == t1_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s /\
fmont_as_nat h1 t4 == t4_s))
let point_double_1 t0 t1 t2 t3 t4 p =
let x, y, z = getx p, gety p, getz p in
fsqr t0 x;
fsqr t1 y;
fsqr t2 z;
fmul t3 x y;
fdouble t3 t3;
fmul t4 y z
inline_for_extraction noextract
val point_double_2 (x3 y3 z3 t2:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h z3 /\ live h t2 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc z3; loc t2 ] /\
as_nat h z3 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc z3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\ as_nat h1 z3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fadd z3_s z3_s in
let y3_s = S.fmul S.b_coeff t2_s in
let y3_s = S.fsub y3_s z3_s in
let x3_s = S.fadd y3_s y3_s in
let y3_s = S.fadd x3_s y3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 z3 == z3_s))
let point_double_2 x3 y3 z3 t2 =
fdouble z3 z3;
fmul_by_b_coeff y3 t2;
fsub y3 y3 z3;
fdouble x3 y3;
fadd y3 x3 y3
inline_for_extraction noextract
val point_double_3 (x3 y3 t1 t2 t3:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h t1 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc t1; loc t2; loc t3 ] /\
as_nat h t1 < S.prime /\ as_nat h t2 < S.prime /\
as_nat h t3 < S.prime /\ as_nat h y3 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc t2 |+| loc t3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
(let t1_s = fmont_as_nat h0 t1 in
let t2_s = fmont_as_nat h0 t2 in
let t3_s = fmont_as_nat h0 t3 in
let y3_s = fmont_as_nat h0 y3 in
let x3_s = S.fsub t1_s y3_s in
let y3_s = S.fadd t1_s y3_s in
let y3_s = S.fmul x3_s y3_s in
let x3_s = S.fmul x3_s t3_s in
let t3_s = S.fadd t2_s t2_s in
let t2_s = S.fadd t2_s t3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s)) | false | false | Hacl.Impl.P256.PointDouble.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val point_double_3 (x3 y3 t1 t2 t3:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h t1 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc t1; loc t2; loc t3 ] /\
as_nat h t1 < S.prime /\ as_nat h t2 < S.prime /\
as_nat h t3 < S.prime /\ as_nat h y3 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc t2 |+| loc t3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
(let t1_s = fmont_as_nat h0 t1 in
let t2_s = fmont_as_nat h0 t2 in
let t3_s = fmont_as_nat h0 t3 in
let y3_s = fmont_as_nat h0 y3 in
let x3_s = S.fsub t1_s y3_s in
let y3_s = S.fadd t1_s y3_s in
let y3_s = S.fmul x3_s y3_s in
let x3_s = S.fmul x3_s t3_s in
let t3_s = S.fadd t2_s t2_s in
let t2_s = S.fadd t2_s t3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s)) | [] | Hacl.Impl.P256.PointDouble.point_double_3 | {
"file_name": "code/ecdsap256/Hacl.Impl.P256.PointDouble.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
x3: Hacl.Impl.P256.Bignum.felem ->
y3: Hacl.Impl.P256.Bignum.felem ->
t1: Hacl.Impl.P256.Bignum.felem ->
t2: Hacl.Impl.P256.Bignum.felem ->
t3: Hacl.Impl.P256.Bignum.felem
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 15,
"end_line": 107,
"start_col": 2,
"start_line": 102
} |
FStar.HyperStack.ST.Stack | val point_double_1 (t0 t1 t2 t3 t4:felem) (p:point) : Stack unit
(requires fun h ->
live h t0 /\ live h t1 /\ live h t2 /\
live h t3 /\ live h t4 /\ live h p /\
LowStar.Monotonic.Buffer.all_disjoint
[loc t0; loc t1; loc t2; loc t3; loc t4; loc p ] /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc t0 |+| loc t1 |+| loc t2 |+| loc t3 |+| loc t4) h0 h1 /\
as_nat h1 t0 < S.prime /\ as_nat h1 t1 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
as_nat h1 t4 < S.prime /\
(let x, y, z = from_mont_point (as_point_nat h0 p) in
let t0_s = S.fmul x x in
let t1_s = S.fmul y y in
let t2_s = S.fmul z z in
let t3_s = S.fmul x y in
let t3_s = S.fadd t3_s t3_s in
let t4_s = S.fmul y z in
fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t1 == t1_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s /\
fmont_as_nat h1 t4 == t4_s)) | [
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.All",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.All",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let point_double_1 t0 t1 t2 t3 t4 p =
let x, y, z = getx p, gety p, getz p in
fsqr t0 x;
fsqr t1 y;
fsqr t2 z;
fmul t3 x y;
fdouble t3 t3;
fmul t4 y z | val point_double_1 (t0 t1 t2 t3 t4:felem) (p:point) : Stack unit
(requires fun h ->
live h t0 /\ live h t1 /\ live h t2 /\
live h t3 /\ live h t4 /\ live h p /\
LowStar.Monotonic.Buffer.all_disjoint
[loc t0; loc t1; loc t2; loc t3; loc t4; loc p ] /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc t0 |+| loc t1 |+| loc t2 |+| loc t3 |+| loc t4) h0 h1 /\
as_nat h1 t0 < S.prime /\ as_nat h1 t1 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
as_nat h1 t4 < S.prime /\
(let x, y, z = from_mont_point (as_point_nat h0 p) in
let t0_s = S.fmul x x in
let t1_s = S.fmul y y in
let t2_s = S.fmul z z in
let t3_s = S.fmul x y in
let t3_s = S.fadd t3_s t3_s in
let t4_s = S.fmul y z in
fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t1 == t1_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s /\
fmont_as_nat h1 t4 == t4_s))
let point_double_1 t0 t1 t2 t3 t4 p = | true | null | false | let x, y, z = getx p, gety p, getz p in
fsqr t0 x;
fsqr t1 y;
fsqr t2 z;
fmul t3 x y;
fdouble t3 t3;
fmul t4 y z | {
"checked_file": "Hacl.Impl.P256.PointDouble.fst.checked",
"dependencies": [
"Spec.P256.fst.checked",
"prims.fst.checked",
"LowStar.Monotonic.Buffer.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Impl.P256.Field.fsti.checked",
"Hacl.Impl.P256.Bignum.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.All.fst.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.Impl.P256.PointDouble.fst"
} | [] | [
"Hacl.Impl.P256.Bignum.felem",
"Hacl.Impl.P256.Point.point",
"Hacl.Impl.P256.Field.fmul",
"Prims.unit",
"Hacl.Impl.P256.Field.fdouble",
"Hacl.Impl.P256.Field.fsqr",
"FStar.Pervasives.Native.tuple3",
"FStar.Pervasives.Native.Mktuple3",
"Hacl.Impl.P256.Point.getz",
"Hacl.Impl.P256.Point.gety",
"Hacl.Impl.P256.Point.getx"
] | [] | module Hacl.Impl.P256.PointDouble
open FStar.Mul
open FStar.HyperStack.All
open FStar.HyperStack
module ST = FStar.HyperStack.ST
open Lib.IntTypes
open Lib.Buffer
open Hacl.Impl.P256.Bignum
open Hacl.Impl.P256.Field
module S = Spec.P256
#set-options "--z3rlimit 50 --ifuel 0 --fuel 0"
inline_for_extraction noextract
val point_double_1 (t0 t1 t2 t3 t4:felem) (p:point) : Stack unit
(requires fun h ->
live h t0 /\ live h t1 /\ live h t2 /\
live h t3 /\ live h t4 /\ live h p /\
LowStar.Monotonic.Buffer.all_disjoint
[loc t0; loc t1; loc t2; loc t3; loc t4; loc p ] /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc t0 |+| loc t1 |+| loc t2 |+| loc t3 |+| loc t4) h0 h1 /\
as_nat h1 t0 < S.prime /\ as_nat h1 t1 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
as_nat h1 t4 < S.prime /\
(let x, y, z = from_mont_point (as_point_nat h0 p) in
let t0_s = S.fmul x x in
let t1_s = S.fmul y y in
let t2_s = S.fmul z z in
let t3_s = S.fmul x y in
let t3_s = S.fadd t3_s t3_s in
let t4_s = S.fmul y z in
fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t1 == t1_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s /\
fmont_as_nat h1 t4 == t4_s)) | false | false | Hacl.Impl.P256.PointDouble.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val point_double_1 (t0 t1 t2 t3 t4:felem) (p:point) : Stack unit
(requires fun h ->
live h t0 /\ live h t1 /\ live h t2 /\
live h t3 /\ live h t4 /\ live h p /\
LowStar.Monotonic.Buffer.all_disjoint
[loc t0; loc t1; loc t2; loc t3; loc t4; loc p ] /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc t0 |+| loc t1 |+| loc t2 |+| loc t3 |+| loc t4) h0 h1 /\
as_nat h1 t0 < S.prime /\ as_nat h1 t1 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
as_nat h1 t4 < S.prime /\
(let x, y, z = from_mont_point (as_point_nat h0 p) in
let t0_s = S.fmul x x in
let t1_s = S.fmul y y in
let t2_s = S.fmul z z in
let t3_s = S.fmul x y in
let t3_s = S.fadd t3_s t3_s in
let t4_s = S.fmul y z in
fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t1 == t1_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s /\
fmont_as_nat h1 t4 == t4_s)) | [] | Hacl.Impl.P256.PointDouble.point_double_1 | {
"file_name": "code/ecdsap256/Hacl.Impl.P256.PointDouble.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
t0: Hacl.Impl.P256.Bignum.felem ->
t1: Hacl.Impl.P256.Bignum.felem ->
t2: Hacl.Impl.P256.Bignum.felem ->
t3: Hacl.Impl.P256.Bignum.felem ->
t4: Hacl.Impl.P256.Bignum.felem ->
p: Hacl.Impl.P256.Point.point
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 13,
"end_line": 48,
"start_col": 37,
"start_line": 41
} |
FStar.HyperStack.ST.Stack | val point_double_noalloc: tmp:lbuffer uint64 20ul -> res:point -> p:point -> Stack unit
(requires fun h ->
live h p /\ live h res /\ live h tmp /\
eq_or_disjoint p res /\ disjoint tmp res /\ disjoint tmp p /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc res |+| loc tmp) h0 h1 /\
point_inv h1 res /\
from_mont_point (as_point_nat h1 res) ==
S.point_double (from_mont_point (as_point_nat h0 p))) | [
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.All",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.All",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let point_double_noalloc tmp res p =
let x, z = getx p, getz p in
let x3, y3, z3 = getx res, gety res, getz res in
let t0 = sub tmp 0ul 4ul in
let t1 = sub tmp 4ul 4ul in
let t2 = sub tmp 8ul 4ul in
let t3 = sub tmp 12ul 4ul in
let t4 = sub tmp 16ul 4ul in
point_double_1 t0 t1 t2 t3 t4 p;
fmul z3 x z;
point_double_2 x3 y3 z3 t2;
point_double_3 x3 y3 t1 t2 t3;
point_double_4 z3 t0 t2 t3;
point_double_5 y3 z3 t0 t2 t3;
point_double_6 x3 z3 t0 t1 t4 | val point_double_noalloc: tmp:lbuffer uint64 20ul -> res:point -> p:point -> Stack unit
(requires fun h ->
live h p /\ live h res /\ live h tmp /\
eq_or_disjoint p res /\ disjoint tmp res /\ disjoint tmp p /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc res |+| loc tmp) h0 h1 /\
point_inv h1 res /\
from_mont_point (as_point_nat h1 res) ==
S.point_double (from_mont_point (as_point_nat h0 p)))
let point_double_noalloc tmp res p = | true | null | false | let x, z = getx p, getz p in
let x3, y3, z3 = getx res, gety res, getz res in
let t0 = sub tmp 0ul 4ul in
let t1 = sub tmp 4ul 4ul in
let t2 = sub tmp 8ul 4ul in
let t3 = sub tmp 12ul 4ul in
let t4 = sub tmp 16ul 4ul in
point_double_1 t0 t1 t2 t3 t4 p;
fmul z3 x z;
point_double_2 x3 y3 z3 t2;
point_double_3 x3 y3 t1 t2 t3;
point_double_4 z3 t0 t2 t3;
point_double_5 y3 z3 t0 t2 t3;
point_double_6 x3 z3 t0 t1 t4 | {
"checked_file": "Hacl.Impl.P256.PointDouble.fst.checked",
"dependencies": [
"Spec.P256.fst.checked",
"prims.fst.checked",
"LowStar.Monotonic.Buffer.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Impl.P256.Field.fsti.checked",
"Hacl.Impl.P256.Bignum.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.All.fst.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.Impl.P256.PointDouble.fst"
} | [] | [
"Lib.Buffer.lbuffer",
"Lib.IntTypes.uint64",
"FStar.UInt32.__uint_to_t",
"Hacl.Impl.P256.Point.point",
"Hacl.Impl.P256.Bignum.felem",
"Hacl.Impl.P256.PointDouble.point_double_6",
"Prims.unit",
"Hacl.Impl.P256.PointDouble.point_double_5",
"Hacl.Impl.P256.PointDouble.point_double_4",
"Hacl.Impl.P256.PointDouble.point_double_3",
"Hacl.Impl.P256.PointDouble.point_double_2",
"Hacl.Impl.P256.Field.fmul",
"Hacl.Impl.P256.PointDouble.point_double_1",
"Lib.Buffer.lbuffer_t",
"Lib.Buffer.MUT",
"Lib.IntTypes.int_t",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"FStar.UInt32.uint_to_t",
"FStar.UInt32.t",
"Lib.Buffer.sub",
"FStar.Pervasives.Native.tuple3",
"FStar.Pervasives.Native.Mktuple3",
"Hacl.Impl.P256.Point.getz",
"Hacl.Impl.P256.Point.gety",
"Hacl.Impl.P256.Point.getx",
"FStar.Pervasives.Native.tuple2",
"FStar.Pervasives.Native.Mktuple2"
] | [] | module Hacl.Impl.P256.PointDouble
open FStar.Mul
open FStar.HyperStack.All
open FStar.HyperStack
module ST = FStar.HyperStack.ST
open Lib.IntTypes
open Lib.Buffer
open Hacl.Impl.P256.Bignum
open Hacl.Impl.P256.Field
module S = Spec.P256
#set-options "--z3rlimit 50 --ifuel 0 --fuel 0"
inline_for_extraction noextract
val point_double_1 (t0 t1 t2 t3 t4:felem) (p:point) : Stack unit
(requires fun h ->
live h t0 /\ live h t1 /\ live h t2 /\
live h t3 /\ live h t4 /\ live h p /\
LowStar.Monotonic.Buffer.all_disjoint
[loc t0; loc t1; loc t2; loc t3; loc t4; loc p ] /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc t0 |+| loc t1 |+| loc t2 |+| loc t3 |+| loc t4) h0 h1 /\
as_nat h1 t0 < S.prime /\ as_nat h1 t1 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
as_nat h1 t4 < S.prime /\
(let x, y, z = from_mont_point (as_point_nat h0 p) in
let t0_s = S.fmul x x in
let t1_s = S.fmul y y in
let t2_s = S.fmul z z in
let t3_s = S.fmul x y in
let t3_s = S.fadd t3_s t3_s in
let t4_s = S.fmul y z in
fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t1 == t1_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s /\
fmont_as_nat h1 t4 == t4_s))
let point_double_1 t0 t1 t2 t3 t4 p =
let x, y, z = getx p, gety p, getz p in
fsqr t0 x;
fsqr t1 y;
fsqr t2 z;
fmul t3 x y;
fdouble t3 t3;
fmul t4 y z
inline_for_extraction noextract
val point_double_2 (x3 y3 z3 t2:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h z3 /\ live h t2 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc z3; loc t2 ] /\
as_nat h z3 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc z3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\ as_nat h1 z3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fadd z3_s z3_s in
let y3_s = S.fmul S.b_coeff t2_s in
let y3_s = S.fsub y3_s z3_s in
let x3_s = S.fadd y3_s y3_s in
let y3_s = S.fadd x3_s y3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 z3 == z3_s))
let point_double_2 x3 y3 z3 t2 =
fdouble z3 z3;
fmul_by_b_coeff y3 t2;
fsub y3 y3 z3;
fdouble x3 y3;
fadd y3 x3 y3
inline_for_extraction noextract
val point_double_3 (x3 y3 t1 t2 t3:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h t1 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc t1; loc t2; loc t3 ] /\
as_nat h t1 < S.prime /\ as_nat h t2 < S.prime /\
as_nat h t3 < S.prime /\ as_nat h y3 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc t2 |+| loc t3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
(let t1_s = fmont_as_nat h0 t1 in
let t2_s = fmont_as_nat h0 t2 in
let t3_s = fmont_as_nat h0 t3 in
let y3_s = fmont_as_nat h0 y3 in
let x3_s = S.fsub t1_s y3_s in
let y3_s = S.fadd t1_s y3_s in
let y3_s = S.fmul x3_s y3_s in
let x3_s = S.fmul x3_s t3_s in
let t3_s = S.fadd t2_s t2_s in
let t2_s = S.fadd t2_s t3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s))
let point_double_3 x3 y3 t1 t2 t3 =
fsub x3 t1 y3;
fadd y3 t1 y3;
fmul y3 x3 y3;
fmul x3 x3 t3;
fdouble t3 t2;
fadd t2 t2 t3
inline_for_extraction noextract
val point_double_4 (z3 t0 t2 t3:felem) : Stack unit
(requires fun h ->
live h z3 /\ live h t0 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc z3; loc t0; loc t2; loc t3 ] /\
as_nat h z3 < S.prime /\ as_nat h t0 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc z3 |+| loc t3) h0 h1 /\
as_nat h1 z3 < S.prime /\ as_nat h1 t3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t0_s = fmont_as_nat h0 t0 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fmul S.b_coeff z3_s in
let z3_s = S.fsub z3_s t2_s in
let z3_s = S.fsub z3_s t0_s in
let t3_s = S.fadd z3_s z3_s in
let z3_s = S.fadd z3_s t3_s in
fmont_as_nat h1 z3 == z3_s /\ fmont_as_nat h1 t3 == t3_s))
let point_double_4 z3 t0 t2 t3 =
fmul_by_b_coeff z3 z3;
fsub z3 z3 t2;
fsub z3 z3 t0;
fdouble t3 z3;
fadd z3 z3 t3
inline_for_extraction noextract
val point_double_5 (y3 z3 t0 t2 t3:felem) : Stack unit
(requires fun h ->
live h y3 /\ live h z3 /\ live h t0 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc y3; loc z3; loc t0; loc t2; loc t3 ] /\
as_nat h y3 < S.prime /\ as_nat h z3 < S.prime /\
as_nat h t0 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc y3 |+| loc t0 |+| loc t3) h0 h1 /\
as_nat h1 y3 < S.prime /\ as_nat h1 t3 < S.prime /\
(let t0_s = fmont_as_nat h0 t0 in
let t2_s = fmont_as_nat h0 t2 in
let y3_s = fmont_as_nat h0 y3 in
let z3_s = fmont_as_nat h0 z3 in
let t3_s = S.fadd t0_s t0_s in
let t0_s = S.fadd t3_s t0_s in
let t0_s = S.fsub t0_s t2_s in
let t0_s = S.fmul t0_s z3_s in
let y3_s = S.fadd y3_s t0_s in
fmont_as_nat h1 y3 == y3_s /\ fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t3 == t3_s))
let point_double_5 y3 z3 t0 t2 t3 =
fdouble t3 t0;
fadd t0 t3 t0;
fsub t0 t0 t2;
fmul t0 t0 z3;
fadd y3 y3 t0
inline_for_extraction noextract
val point_double_6 (x3 z3 t0 t1 t4:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h z3 /\ live h t0 /\ live h t1 /\ live h t4 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc z3; loc t0; loc t1; loc t4 ] /\
as_nat h x3 < S.prime /\ as_nat h z3 < S.prime /\
as_nat h t1 < S.prime /\ as_nat h t4 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc z3 |+| loc t0) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 z3 < S.prime /\ as_nat h1 t0 < S.prime /\
(let t1_s = fmont_as_nat h0 t1 in
let t4_s = fmont_as_nat h0 t4 in
let x3_s = fmont_as_nat h0 x3 in
let z3_s = fmont_as_nat h0 z3 in
let t0_s = S.fadd t4_s t4_s in
let z3_s = S.fmul t0_s z3_s in
let x3_s = S.fsub x3_s z3_s in
let z3_s = S.fmul t0_s t1_s in
let z3_s = S.fadd z3_s z3_s in
let z3_s = S.fadd z3_s z3_s in
fmont_as_nat h1 z3 == z3_s /\ fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 t0 == t0_s))
let point_double_6 x3 z3 t0 t1 t4 =
fdouble t0 t4;
fmul z3 t0 z3;
fsub x3 x3 z3;
fmul z3 t0 t1;
fdouble z3 z3;
fdouble z3 z3
inline_for_extraction noextract
val point_double_noalloc: tmp:lbuffer uint64 20ul -> res:point -> p:point -> Stack unit
(requires fun h ->
live h p /\ live h res /\ live h tmp /\
eq_or_disjoint p res /\ disjoint tmp res /\ disjoint tmp p /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc res |+| loc tmp) h0 h1 /\
point_inv h1 res /\
from_mont_point (as_point_nat h1 res) ==
S.point_double (from_mont_point (as_point_nat h0 p))) | false | false | Hacl.Impl.P256.PointDouble.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val point_double_noalloc: tmp:lbuffer uint64 20ul -> res:point -> p:point -> Stack unit
(requires fun h ->
live h p /\ live h res /\ live h tmp /\
eq_or_disjoint p res /\ disjoint tmp res /\ disjoint tmp p /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc res |+| loc tmp) h0 h1 /\
point_inv h1 res /\
from_mont_point (as_point_nat h1 res) ==
S.point_double (from_mont_point (as_point_nat h0 p))) | [] | Hacl.Impl.P256.PointDouble.point_double_noalloc | {
"file_name": "code/ecdsap256/Hacl.Impl.P256.PointDouble.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
tmp: Lib.Buffer.lbuffer Lib.IntTypes.uint64 20ul ->
res: Hacl.Impl.P256.Point.point ->
p: Hacl.Impl.P256.Point.point
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 31,
"end_line": 219,
"start_col": 36,
"start_line": 205
} |
FStar.HyperStack.ST.Stack | val point_double_6 (x3 z3 t0 t1 t4:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h z3 /\ live h t0 /\ live h t1 /\ live h t4 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc z3; loc t0; loc t1; loc t4 ] /\
as_nat h x3 < S.prime /\ as_nat h z3 < S.prime /\
as_nat h t1 < S.prime /\ as_nat h t4 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc z3 |+| loc t0) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 z3 < S.prime /\ as_nat h1 t0 < S.prime /\
(let t1_s = fmont_as_nat h0 t1 in
let t4_s = fmont_as_nat h0 t4 in
let x3_s = fmont_as_nat h0 x3 in
let z3_s = fmont_as_nat h0 z3 in
let t0_s = S.fadd t4_s t4_s in
let z3_s = S.fmul t0_s z3_s in
let x3_s = S.fsub x3_s z3_s in
let z3_s = S.fmul t0_s t1_s in
let z3_s = S.fadd z3_s z3_s in
let z3_s = S.fadd z3_s z3_s in
fmont_as_nat h1 z3 == z3_s /\ fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 t0 == t0_s)) | [
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.All",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.All",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let point_double_6 x3 z3 t0 t1 t4 =
fdouble t0 t4;
fmul z3 t0 z3;
fsub x3 x3 z3;
fmul z3 t0 t1;
fdouble z3 z3;
fdouble z3 z3 | val point_double_6 (x3 z3 t0 t1 t4:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h z3 /\ live h t0 /\ live h t1 /\ live h t4 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc z3; loc t0; loc t1; loc t4 ] /\
as_nat h x3 < S.prime /\ as_nat h z3 < S.prime /\
as_nat h t1 < S.prime /\ as_nat h t4 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc z3 |+| loc t0) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 z3 < S.prime /\ as_nat h1 t0 < S.prime /\
(let t1_s = fmont_as_nat h0 t1 in
let t4_s = fmont_as_nat h0 t4 in
let x3_s = fmont_as_nat h0 x3 in
let z3_s = fmont_as_nat h0 z3 in
let t0_s = S.fadd t4_s t4_s in
let z3_s = S.fmul t0_s z3_s in
let x3_s = S.fsub x3_s z3_s in
let z3_s = S.fmul t0_s t1_s in
let z3_s = S.fadd z3_s z3_s in
let z3_s = S.fadd z3_s z3_s in
fmont_as_nat h1 z3 == z3_s /\ fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 t0 == t0_s))
let point_double_6 x3 z3 t0 t1 t4 = | true | null | false | fdouble t0 t4;
fmul z3 t0 z3;
fsub x3 x3 z3;
fmul z3 t0 t1;
fdouble z3 z3;
fdouble z3 z3 | {
"checked_file": "Hacl.Impl.P256.PointDouble.fst.checked",
"dependencies": [
"Spec.P256.fst.checked",
"prims.fst.checked",
"LowStar.Monotonic.Buffer.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Impl.P256.Field.fsti.checked",
"Hacl.Impl.P256.Bignum.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.All.fst.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.Impl.P256.PointDouble.fst"
} | [] | [
"Hacl.Impl.P256.Bignum.felem",
"Hacl.Impl.P256.Field.fdouble",
"Prims.unit",
"Hacl.Impl.P256.Field.fmul",
"Hacl.Impl.P256.Field.fsub"
] | [] | module Hacl.Impl.P256.PointDouble
open FStar.Mul
open FStar.HyperStack.All
open FStar.HyperStack
module ST = FStar.HyperStack.ST
open Lib.IntTypes
open Lib.Buffer
open Hacl.Impl.P256.Bignum
open Hacl.Impl.P256.Field
module S = Spec.P256
#set-options "--z3rlimit 50 --ifuel 0 --fuel 0"
inline_for_extraction noextract
val point_double_1 (t0 t1 t2 t3 t4:felem) (p:point) : Stack unit
(requires fun h ->
live h t0 /\ live h t1 /\ live h t2 /\
live h t3 /\ live h t4 /\ live h p /\
LowStar.Monotonic.Buffer.all_disjoint
[loc t0; loc t1; loc t2; loc t3; loc t4; loc p ] /\
point_inv h p)
(ensures fun h0 _ h1 -> modifies (loc t0 |+| loc t1 |+| loc t2 |+| loc t3 |+| loc t4) h0 h1 /\
as_nat h1 t0 < S.prime /\ as_nat h1 t1 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
as_nat h1 t4 < S.prime /\
(let x, y, z = from_mont_point (as_point_nat h0 p) in
let t0_s = S.fmul x x in
let t1_s = S.fmul y y in
let t2_s = S.fmul z z in
let t3_s = S.fmul x y in
let t3_s = S.fadd t3_s t3_s in
let t4_s = S.fmul y z in
fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t1 == t1_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s /\
fmont_as_nat h1 t4 == t4_s))
let point_double_1 t0 t1 t2 t3 t4 p =
let x, y, z = getx p, gety p, getz p in
fsqr t0 x;
fsqr t1 y;
fsqr t2 z;
fmul t3 x y;
fdouble t3 t3;
fmul t4 y z
inline_for_extraction noextract
val point_double_2 (x3 y3 z3 t2:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h z3 /\ live h t2 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc z3; loc t2 ] /\
as_nat h z3 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc z3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\ as_nat h1 z3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fadd z3_s z3_s in
let y3_s = S.fmul S.b_coeff t2_s in
let y3_s = S.fsub y3_s z3_s in
let x3_s = S.fadd y3_s y3_s in
let y3_s = S.fadd x3_s y3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 z3 == z3_s))
let point_double_2 x3 y3 z3 t2 =
fdouble z3 z3;
fmul_by_b_coeff y3 t2;
fsub y3 y3 z3;
fdouble x3 y3;
fadd y3 x3 y3
inline_for_extraction noextract
val point_double_3 (x3 y3 t1 t2 t3:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h y3 /\ live h t1 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc y3; loc t1; loc t2; loc t3 ] /\
as_nat h t1 < S.prime /\ as_nat h t2 < S.prime /\
as_nat h t3 < S.prime /\ as_nat h y3 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc y3 |+| loc t2 |+| loc t3) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 y3 < S.prime /\
as_nat h1 t2 < S.prime /\ as_nat h1 t3 < S.prime /\
(let t1_s = fmont_as_nat h0 t1 in
let t2_s = fmont_as_nat h0 t2 in
let t3_s = fmont_as_nat h0 t3 in
let y3_s = fmont_as_nat h0 y3 in
let x3_s = S.fsub t1_s y3_s in
let y3_s = S.fadd t1_s y3_s in
let y3_s = S.fmul x3_s y3_s in
let x3_s = S.fmul x3_s t3_s in
let t3_s = S.fadd t2_s t2_s in
let t2_s = S.fadd t2_s t3_s in
fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 y3 == y3_s /\
fmont_as_nat h1 t2 == t2_s /\ fmont_as_nat h1 t3 == t3_s))
let point_double_3 x3 y3 t1 t2 t3 =
fsub x3 t1 y3;
fadd y3 t1 y3;
fmul y3 x3 y3;
fmul x3 x3 t3;
fdouble t3 t2;
fadd t2 t2 t3
inline_for_extraction noextract
val point_double_4 (z3 t0 t2 t3:felem) : Stack unit
(requires fun h ->
live h z3 /\ live h t0 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc z3; loc t0; loc t2; loc t3 ] /\
as_nat h z3 < S.prime /\ as_nat h t0 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc z3 |+| loc t3) h0 h1 /\
as_nat h1 z3 < S.prime /\ as_nat h1 t3 < S.prime /\
(let z3_s = fmont_as_nat h0 z3 in
let t0_s = fmont_as_nat h0 t0 in
let t2_s = fmont_as_nat h0 t2 in
let z3_s = S.fmul S.b_coeff z3_s in
let z3_s = S.fsub z3_s t2_s in
let z3_s = S.fsub z3_s t0_s in
let t3_s = S.fadd z3_s z3_s in
let z3_s = S.fadd z3_s t3_s in
fmont_as_nat h1 z3 == z3_s /\ fmont_as_nat h1 t3 == t3_s))
let point_double_4 z3 t0 t2 t3 =
fmul_by_b_coeff z3 z3;
fsub z3 z3 t2;
fsub z3 z3 t0;
fdouble t3 z3;
fadd z3 z3 t3
inline_for_extraction noextract
val point_double_5 (y3 z3 t0 t2 t3:felem) : Stack unit
(requires fun h ->
live h y3 /\ live h z3 /\ live h t0 /\ live h t2 /\ live h t3 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc y3; loc z3; loc t0; loc t2; loc t3 ] /\
as_nat h y3 < S.prime /\ as_nat h z3 < S.prime /\
as_nat h t0 < S.prime /\ as_nat h t2 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc y3 |+| loc t0 |+| loc t3) h0 h1 /\
as_nat h1 y3 < S.prime /\ as_nat h1 t3 < S.prime /\
(let t0_s = fmont_as_nat h0 t0 in
let t2_s = fmont_as_nat h0 t2 in
let y3_s = fmont_as_nat h0 y3 in
let z3_s = fmont_as_nat h0 z3 in
let t3_s = S.fadd t0_s t0_s in
let t0_s = S.fadd t3_s t0_s in
let t0_s = S.fsub t0_s t2_s in
let t0_s = S.fmul t0_s z3_s in
let y3_s = S.fadd y3_s t0_s in
fmont_as_nat h1 y3 == y3_s /\ fmont_as_nat h1 t0 == t0_s /\ fmont_as_nat h1 t3 == t3_s))
let point_double_5 y3 z3 t0 t2 t3 =
fdouble t3 t0;
fadd t0 t3 t0;
fsub t0 t0 t2;
fmul t0 t0 z3;
fadd y3 y3 t0
inline_for_extraction noextract
val point_double_6 (x3 z3 t0 t1 t4:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h z3 /\ live h t0 /\ live h t1 /\ live h t4 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc z3; loc t0; loc t1; loc t4 ] /\
as_nat h x3 < S.prime /\ as_nat h z3 < S.prime /\
as_nat h t1 < S.prime /\ as_nat h t4 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc z3 |+| loc t0) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 z3 < S.prime /\ as_nat h1 t0 < S.prime /\
(let t1_s = fmont_as_nat h0 t1 in
let t4_s = fmont_as_nat h0 t4 in
let x3_s = fmont_as_nat h0 x3 in
let z3_s = fmont_as_nat h0 z3 in
let t0_s = S.fadd t4_s t4_s in
let z3_s = S.fmul t0_s z3_s in
let x3_s = S.fsub x3_s z3_s in
let z3_s = S.fmul t0_s t1_s in
let z3_s = S.fadd z3_s z3_s in
let z3_s = S.fadd z3_s z3_s in
fmont_as_nat h1 z3 == z3_s /\ fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 t0 == t0_s)) | false | false | Hacl.Impl.P256.PointDouble.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val point_double_6 (x3 z3 t0 t1 t4:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h z3 /\ live h t0 /\ live h t1 /\ live h t4 /\
LowStar.Monotonic.Buffer.all_disjoint [ loc x3; loc z3; loc t0; loc t1; loc t4 ] /\
as_nat h x3 < S.prime /\ as_nat h z3 < S.prime /\
as_nat h t1 < S.prime /\ as_nat h t4 < S.prime)
(ensures fun h0 _ h1 -> modifies (loc x3 |+| loc z3 |+| loc t0) h0 h1 /\
as_nat h1 x3 < S.prime /\ as_nat h1 z3 < S.prime /\ as_nat h1 t0 < S.prime /\
(let t1_s = fmont_as_nat h0 t1 in
let t4_s = fmont_as_nat h0 t4 in
let x3_s = fmont_as_nat h0 x3 in
let z3_s = fmont_as_nat h0 z3 in
let t0_s = S.fadd t4_s t4_s in
let z3_s = S.fmul t0_s z3_s in
let x3_s = S.fsub x3_s z3_s in
let z3_s = S.fmul t0_s t1_s in
let z3_s = S.fadd z3_s z3_s in
let z3_s = S.fadd z3_s z3_s in
fmont_as_nat h1 z3 == z3_s /\ fmont_as_nat h1 x3 == x3_s /\ fmont_as_nat h1 t0 == t0_s)) | [] | Hacl.Impl.P256.PointDouble.point_double_6 | {
"file_name": "code/ecdsap256/Hacl.Impl.P256.PointDouble.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
x3: Hacl.Impl.P256.Bignum.felem ->
z3: Hacl.Impl.P256.Bignum.felem ->
t0: Hacl.Impl.P256.Bignum.felem ->
t1: Hacl.Impl.P256.Bignum.felem ->
t4: Hacl.Impl.P256.Bignum.felem
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 15,
"end_line": 191,
"start_col": 2,
"start_line": 186
} |
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_while invariant condition condition_var body = Tm_While { invariant; condition; condition_var; body } | let tm_while invariant condition condition_var body = | false | null | false | Tm_While
({ invariant = invariant; condition = condition; condition_var = condition_var; body = body }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.term",
"Pulse.Syntax.Base.st_term",
"Pulse.Syntax.Base.ppname",
"Pulse.Syntax.Base.Tm_While",
"Pulse.Syntax.Base.Mkst_term'__Tm_While__payload",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body }
let tm_if b then_ else_ post = Tm_If { b; then_; else_; post }
let tm_match sc returns_ brs = Tm_Match {sc; returns_; brs}
let tm_elim_exists p = Tm_ElimExists { p } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_while : invariant: Pulse.Syntax.Base.term ->
condition: Pulse.Syntax.Base.st_term ->
condition_var: Pulse.Syntax.Base.ppname ->
body: Pulse.Syntax.Base.st_term
-> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_while | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} |
invariant: Pulse.Syntax.Base.term ->
condition: Pulse.Syntax.Base.st_term ->
condition_var: Pulse.Syntax.Base.ppname ->
body: Pulse.Syntax.Base.st_term
-> Pulse.Syntax.Base.st_term' | {
"end_col": 108,
"end_line": 17,
"start_col": 54,
"start_line": 17
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let pat_var s = Pat_Var s | let pat_var s = | false | null | false | Pat_Var s | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"FStar.Reflection.Typing.pp_name_t",
"Pulse.Syntax.Base.Pat_Var",
"FStar.Reflection.Typing.sort_t",
"Pulse.Syntax.Base.pattern"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val pat_var : s: FStar.Reflection.Typing.pp_name_t -> ty: FStar.Reflection.Typing.sort_t
-> Pulse.Syntax.Base.pattern | [] | Pulse.Syntax.Builder.pat_var | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | s: FStar.Reflection.Typing.pp_name_t -> ty: FStar.Reflection.Typing.sort_t
-> Pulse.Syntax.Base.pattern | {
"end_col": 25,
"end_line": 4,
"start_col": 16,
"start_line": 4
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_admit ctag u typ post = Tm_Admit { ctag; u; typ; post } | let tm_admit ctag u typ post = | false | null | false | Tm_Admit ({ ctag = ctag; u = u; typ = typ; post = post }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.ctag",
"Pulse.Syntax.Base.universe",
"Pulse.Syntax.Base.term",
"FStar.Pervasives.Native.option",
"Pulse.Syntax.Base.Tm_Admit",
"Pulse.Syntax.Base.Mkst_term'__Tm_Admit__payload",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body }
let tm_if b then_ else_ post = Tm_If { b; then_; else_; post }
let tm_match sc returns_ brs = Tm_Match {sc; returns_; brs}
let tm_elim_exists p = Tm_ElimExists { p }
let tm_intro_exists p witnesses = Tm_IntroExists { p; witnesses }
let tm_while invariant condition condition_var body = Tm_While { invariant; condition; condition_var; body }
let tm_par pre1 body1 post1 pre2 body2 post2 = Tm_Par { pre1; body1; post1; pre2; body2; post2 }
let tm_with_local binder initializer body = Tm_WithLocal { binder; initializer; body }
let tm_with_local_array binder initializer length body = Tm_WithLocalArray { binder; initializer; length; body }
let tm_rewrite t1 t2 = Tm_Rewrite { t1; t2 } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_admit : ctag: Pulse.Syntax.Base.ctag ->
u57: Pulse.Syntax.Base.universe ->
typ: Pulse.Syntax.Base.term ->
post: FStar.Pervasives.Native.option Pulse.Syntax.Base.term
-> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_admit | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} |
ctag: Pulse.Syntax.Base.ctag ->
u57: Pulse.Syntax.Base.universe ->
typ: Pulse.Syntax.Base.term ->
post: FStar.Pervasives.Native.option Pulse.Syntax.Base.term
-> Pulse.Syntax.Base.st_term' | {
"end_col": 62,
"end_line": 23,
"start_col": 31,
"start_line": 23
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg } | let tm_stapp head arg_qual arg = | false | null | false | Tm_STApp ({ head = head; arg_qual = arg_qual; arg = arg }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.term",
"FStar.Pervasives.Native.option",
"Pulse.Syntax.Base.qualifier",
"Pulse.Syntax.Base.Tm_STApp",
"Pulse.Syntax.Base.Mkst_term'__Tm_STApp__payload",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_stapp : head: Pulse.Syntax.Base.term ->
arg_qual: FStar.Pervasives.Native.option Pulse.Syntax.Base.qualifier ->
arg: Pulse.Syntax.Base.term
-> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_stapp | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} |
head: Pulse.Syntax.Base.term ->
arg_qual: FStar.Pervasives.Native.option Pulse.Syntax.Base.qualifier ->
arg: Pulse.Syntax.Base.term
-> Pulse.Syntax.Base.st_term' | {
"end_col": 65,
"end_line": 10,
"start_col": 33,
"start_line": 10
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_totbind binder head body = Tm_TotBind { binder; head; body } | let tm_totbind binder head body = | false | null | false | Tm_TotBind ({ binder = binder; head = head; body = body }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.binder",
"Pulse.Syntax.Base.term",
"Pulse.Syntax.Base.st_term",
"Pulse.Syntax.Base.Tm_TotBind",
"Pulse.Syntax.Base.Mkst_term'__Tm_TotBind__payload",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_totbind : binder: Pulse.Syntax.Base.binder -> head: Pulse.Syntax.Base.term -> body: Pulse.Syntax.Base.st_term
-> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_totbind | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | binder: Pulse.Syntax.Base.binder -> head: Pulse.Syntax.Base.term -> body: Pulse.Syntax.Base.st_term
-> Pulse.Syntax.Base.st_term' | {
"end_col": 67,
"end_line": 12,
"start_col": 34,
"start_line": 12
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let pat_const c = Pat_Constant c | let pat_const c = | false | null | false | Pat_Constant c | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.constant",
"Pulse.Syntax.Base.Pat_Constant",
"Pulse.Syntax.Base.pattern"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val pat_const : c: Pulse.Syntax.Base.constant -> Pulse.Syntax.Base.pattern | [] | Pulse.Syntax.Builder.pat_const | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | c: Pulse.Syntax.Base.constant -> Pulse.Syntax.Base.pattern | {
"end_col": 32,
"end_line": 5,
"start_col": 18,
"start_line": 5
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term } | let tm_return ctag insert_eq term = | false | null | false | Tm_Return ({ ctag = ctag; insert_eq = insert_eq; term = term }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.ctag",
"Prims.bool",
"Pulse.Syntax.Base.term",
"Pulse.Syntax.Base.Tm_Return",
"Pulse.Syntax.Base.Mkst_term'__Tm_Return__payload",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_return : ctag: Pulse.Syntax.Base.ctag -> insert_eq: Prims.bool -> term: Pulse.Syntax.Base.term
-> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_return | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | ctag: Pulse.Syntax.Base.ctag -> insert_eq: Prims.bool -> term: Pulse.Syntax.Base.term
-> Pulse.Syntax.Base.st_term' | {
"end_col": 71,
"end_line": 8,
"start_col": 36,
"start_line": 8
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_bind binder head body = Tm_Bind { binder; head; body } | let tm_bind binder head body = | false | null | false | Tm_Bind ({ binder = binder; head = head; body = body }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.binder",
"Pulse.Syntax.Base.st_term",
"Pulse.Syntax.Base.Tm_Bind",
"Pulse.Syntax.Base.Mkst_term'__Tm_Bind__payload",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_bind : binder: Pulse.Syntax.Base.binder ->
head: Pulse.Syntax.Base.st_term ->
body: Pulse.Syntax.Base.st_term
-> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_bind | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} |
binder: Pulse.Syntax.Base.binder ->
head: Pulse.Syntax.Base.st_term ->
body: Pulse.Syntax.Base.st_term
-> Pulse.Syntax.Base.st_term' | {
"end_col": 61,
"end_line": 11,
"start_col": 31,
"start_line": 11
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_with_local_array binder initializer length body = Tm_WithLocalArray { binder; initializer; length; body } | let tm_with_local_array binder initializer length body = | false | null | false | Tm_WithLocalArray ({ binder = binder; initializer = initializer; length = length; body = body }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.binder",
"Pulse.Syntax.Base.term",
"Pulse.Syntax.Base.st_term",
"Pulse.Syntax.Base.Tm_WithLocalArray",
"Pulse.Syntax.Base.Mkst_term'__Tm_WithLocalArray__payload",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body }
let tm_if b then_ else_ post = Tm_If { b; then_; else_; post }
let tm_match sc returns_ brs = Tm_Match {sc; returns_; brs}
let tm_elim_exists p = Tm_ElimExists { p }
let tm_intro_exists p witnesses = Tm_IntroExists { p; witnesses }
let tm_while invariant condition condition_var body = Tm_While { invariant; condition; condition_var; body }
let tm_par pre1 body1 post1 pre2 body2 post2 = Tm_Par { pre1; body1; post1; pre2; body2; post2 } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_with_local_array : binder: Pulse.Syntax.Base.binder ->
initializer: Pulse.Syntax.Base.term ->
length: Pulse.Syntax.Base.term ->
body: Pulse.Syntax.Base.st_term
-> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_with_local_array | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} |
binder: Pulse.Syntax.Base.binder ->
initializer: Pulse.Syntax.Base.term ->
length: Pulse.Syntax.Base.term ->
body: Pulse.Syntax.Base.st_term
-> Pulse.Syntax.Base.st_term' | {
"end_col": 112,
"end_line": 20,
"start_col": 57,
"start_line": 20
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let mk_rename_hint_type pairs goal = RENAME { pairs; goal } | let mk_rename_hint_type pairs goal = | false | null | false | RENAME ({ pairs = pairs; goal = goal }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Prims.list",
"FStar.Pervasives.Native.tuple2",
"Pulse.Syntax.Base.term",
"FStar.Pervasives.Native.option",
"Pulse.Syntax.Base.RENAME",
"Pulse.Syntax.Base.Mkproof_hint_type__RENAME__payload",
"Pulse.Syntax.Base.proof_hint_type"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body }
let tm_if b then_ else_ post = Tm_If { b; then_; else_; post }
let tm_match sc returns_ brs = Tm_Match {sc; returns_; brs}
let tm_elim_exists p = Tm_ElimExists { p }
let tm_intro_exists p witnesses = Tm_IntroExists { p; witnesses }
let tm_while invariant condition condition_var body = Tm_While { invariant; condition; condition_var; body }
let tm_par pre1 body1 post1 pre2 body2 post2 = Tm_Par { pre1; body1; post1; pre2; body2; post2 }
let tm_with_local binder initializer body = Tm_WithLocal { binder; initializer; body }
let tm_with_local_array binder initializer length body = Tm_WithLocalArray { binder; initializer; length; body }
let tm_rewrite t1 t2 = Tm_Rewrite { t1; t2 }
let tm_rename pairs t = Tm_ProofHintWithBinders { hint_type = RENAME { pairs; goal=None}; binders=[]; t}
let tm_admit ctag u typ post = Tm_Admit { ctag; u; typ; post }
let with_range t r = { term = t; range = r; effect_tag = default_effect_hint }
let tm_assert_with_binders bs p t = Tm_ProofHintWithBinders { hint_type=ASSERT { p }; binders=bs; t }
let mk_assert_hint_type p = ASSERT { p }
let mk_unfold_hint_type names p = UNFOLD { names; p } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val mk_rename_hint_type : pairs: Prims.list (Pulse.Syntax.Base.term * Pulse.Syntax.Base.term) ->
goal: FStar.Pervasives.Native.option Pulse.Syntax.Base.term
-> Pulse.Syntax.Base.proof_hint_type | [] | Pulse.Syntax.Builder.mk_rename_hint_type | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} |
pairs: Prims.list (Pulse.Syntax.Base.term * Pulse.Syntax.Base.term) ->
goal: FStar.Pervasives.Native.option Pulse.Syntax.Base.term
-> Pulse.Syntax.Base.proof_hint_type | {
"end_col": 59,
"end_line": 29,
"start_col": 37,
"start_line": 29
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_if b then_ else_ post = Tm_If { b; then_; else_; post } | let tm_if b then_ else_ post = | false | null | false | Tm_If ({ b = b; then_ = then_; else_ = else_; post = post }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.term",
"Pulse.Syntax.Base.st_term",
"FStar.Pervasives.Native.option",
"Pulse.Syntax.Base.vprop",
"Pulse.Syntax.Base.Tm_If",
"Pulse.Syntax.Base.Mkst_term'__Tm_If__payload",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_if : b: Pulse.Syntax.Base.term ->
then_: Pulse.Syntax.Base.st_term ->
else_: Pulse.Syntax.Base.st_term ->
post: FStar.Pervasives.Native.option Pulse.Syntax.Base.vprop
-> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_if | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} |
b: Pulse.Syntax.Base.term ->
then_: Pulse.Syntax.Base.st_term ->
else_: Pulse.Syntax.Base.st_term ->
post: FStar.Pervasives.Native.option Pulse.Syntax.Base.vprop
-> Pulse.Syntax.Base.st_term' | {
"end_col": 62,
"end_line": 13,
"start_col": 31,
"start_line": 13
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_with_local binder initializer body = Tm_WithLocal { binder; initializer; body } | let tm_with_local binder initializer body = | false | null | false | Tm_WithLocal ({ binder = binder; initializer = initializer; body = body }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.binder",
"Pulse.Syntax.Base.term",
"Pulse.Syntax.Base.st_term",
"Pulse.Syntax.Base.Tm_WithLocal",
"Pulse.Syntax.Base.Mkst_term'__Tm_WithLocal__payload",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body }
let tm_if b then_ else_ post = Tm_If { b; then_; else_; post }
let tm_match sc returns_ brs = Tm_Match {sc; returns_; brs}
let tm_elim_exists p = Tm_ElimExists { p }
let tm_intro_exists p witnesses = Tm_IntroExists { p; witnesses }
let tm_while invariant condition condition_var body = Tm_While { invariant; condition; condition_var; body } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_with_local : binder: Pulse.Syntax.Base.binder ->
initializer: Pulse.Syntax.Base.term ->
body: Pulse.Syntax.Base.st_term
-> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_with_local | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} |
binder: Pulse.Syntax.Base.binder ->
initializer: Pulse.Syntax.Base.term ->
body: Pulse.Syntax.Base.st_term
-> Pulse.Syntax.Base.st_term' | {
"end_col": 86,
"end_line": 19,
"start_col": 44,
"start_line": 19
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_assert_with_binders bs p t = Tm_ProofHintWithBinders { hint_type=ASSERT { p }; binders=bs; t } | let tm_assert_with_binders bs p t = | false | null | false | Tm_ProofHintWithBinders ({ hint_type = ASSERT ({ p = p }); binders = bs; t = t }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Prims.list",
"Pulse.Syntax.Base.binder",
"Pulse.Syntax.Base.vprop",
"Pulse.Syntax.Base.st_term",
"Pulse.Syntax.Base.Tm_ProofHintWithBinders",
"Pulse.Syntax.Base.Mkst_term'__Tm_ProofHintWithBinders__payload",
"Pulse.Syntax.Base.ASSERT",
"Pulse.Syntax.Base.Mkproof_hint_type__ASSERT__payload",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body }
let tm_if b then_ else_ post = Tm_If { b; then_; else_; post }
let tm_match sc returns_ brs = Tm_Match {sc; returns_; brs}
let tm_elim_exists p = Tm_ElimExists { p }
let tm_intro_exists p witnesses = Tm_IntroExists { p; witnesses }
let tm_while invariant condition condition_var body = Tm_While { invariant; condition; condition_var; body }
let tm_par pre1 body1 post1 pre2 body2 post2 = Tm_Par { pre1; body1; post1; pre2; body2; post2 }
let tm_with_local binder initializer body = Tm_WithLocal { binder; initializer; body }
let tm_with_local_array binder initializer length body = Tm_WithLocalArray { binder; initializer; length; body }
let tm_rewrite t1 t2 = Tm_Rewrite { t1; t2 }
let tm_rename pairs t = Tm_ProofHintWithBinders { hint_type = RENAME { pairs; goal=None}; binders=[]; t}
let tm_admit ctag u typ post = Tm_Admit { ctag; u; typ; post } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_assert_with_binders : bs: Prims.list Pulse.Syntax.Base.binder ->
p: Pulse.Syntax.Base.vprop ->
t: Pulse.Syntax.Base.st_term
-> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_assert_with_binders | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} |
bs: Prims.list Pulse.Syntax.Base.binder ->
p: Pulse.Syntax.Base.vprop ->
t: Pulse.Syntax.Base.st_term
-> Pulse.Syntax.Base.st_term' | {
"end_col": 101,
"end_line": 25,
"start_col": 36,
"start_line": 25
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let mk_unfold_hint_type names p = UNFOLD { names; p } | let mk_unfold_hint_type names p = | false | null | false | UNFOLD ({ names = names; p = p }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"FStar.Pervasives.Native.option",
"Prims.list",
"Prims.string",
"Pulse.Syntax.Base.vprop",
"Pulse.Syntax.Base.UNFOLD",
"Pulse.Syntax.Base.Mkproof_hint_type__UNFOLD__payload",
"Pulse.Syntax.Base.proof_hint_type"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body }
let tm_if b then_ else_ post = Tm_If { b; then_; else_; post }
let tm_match sc returns_ brs = Tm_Match {sc; returns_; brs}
let tm_elim_exists p = Tm_ElimExists { p }
let tm_intro_exists p witnesses = Tm_IntroExists { p; witnesses }
let tm_while invariant condition condition_var body = Tm_While { invariant; condition; condition_var; body }
let tm_par pre1 body1 post1 pre2 body2 post2 = Tm_Par { pre1; body1; post1; pre2; body2; post2 }
let tm_with_local binder initializer body = Tm_WithLocal { binder; initializer; body }
let tm_with_local_array binder initializer length body = Tm_WithLocalArray { binder; initializer; length; body }
let tm_rewrite t1 t2 = Tm_Rewrite { t1; t2 }
let tm_rename pairs t = Tm_ProofHintWithBinders { hint_type = RENAME { pairs; goal=None}; binders=[]; t}
let tm_admit ctag u typ post = Tm_Admit { ctag; u; typ; post }
let with_range t r = { term = t; range = r; effect_tag = default_effect_hint }
let tm_assert_with_binders bs p t = Tm_ProofHintWithBinders { hint_type=ASSERT { p }; binders=bs; t } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val mk_unfold_hint_type : names: FStar.Pervasives.Native.option (Prims.list Prims.string) -> p: Pulse.Syntax.Base.vprop
-> Pulse.Syntax.Base.proof_hint_type | [] | Pulse.Syntax.Builder.mk_unfold_hint_type | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | names: FStar.Pervasives.Native.option (Prims.list Prims.string) -> p: Pulse.Syntax.Base.vprop
-> Pulse.Syntax.Base.proof_hint_type | {
"end_col": 53,
"end_line": 27,
"start_col": 34,
"start_line": 27
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_elim_exists p = Tm_ElimExists { p } | let tm_elim_exists p = | false | null | false | Tm_ElimExists ({ p = p }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.vprop",
"Pulse.Syntax.Base.Tm_ElimExists",
"Pulse.Syntax.Base.Mkst_term'__Tm_ElimExists__payload",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body }
let tm_if b then_ else_ post = Tm_If { b; then_; else_; post } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_elim_exists : p: Pulse.Syntax.Base.vprop -> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_elim_exists | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | p: Pulse.Syntax.Base.vprop -> Pulse.Syntax.Base.st_term' | {
"end_col": 42,
"end_line": 15,
"start_col": 23,
"start_line": 15
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_intro_exists p witnesses = Tm_IntroExists { p; witnesses } | let tm_intro_exists p witnesses = | false | null | false | Tm_IntroExists ({ p = p; witnesses = witnesses }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.vprop",
"Prims.list",
"Pulse.Syntax.Base.term",
"Pulse.Syntax.Base.Tm_IntroExists",
"Pulse.Syntax.Base.Mkst_term'__Tm_IntroExists__payload",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body }
let tm_if b then_ else_ post = Tm_If { b; then_; else_; post }
let tm_match sc returns_ brs = Tm_Match {sc; returns_; brs} | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_intro_exists : p: Pulse.Syntax.Base.vprop -> witnesses: Prims.list Pulse.Syntax.Base.term
-> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_intro_exists | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | p: Pulse.Syntax.Base.vprop -> witnesses: Prims.list Pulse.Syntax.Base.term
-> Pulse.Syntax.Base.st_term' | {
"end_col": 65,
"end_line": 16,
"start_col": 34,
"start_line": 16
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_par pre1 body1 post1 pre2 body2 post2 = Tm_Par { pre1; body1; post1; pre2; body2; post2 } | let tm_par pre1 body1 post1 pre2 body2 post2 = | false | null | false | Tm_Par ({ pre1 = pre1; body1 = body1; post1 = post1; pre2 = pre2; body2 = body2; post2 = post2 }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.term",
"Pulse.Syntax.Base.st_term",
"Pulse.Syntax.Base.Tm_Par",
"Pulse.Syntax.Base.Mkst_term'__Tm_Par__payload",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body }
let tm_if b then_ else_ post = Tm_If { b; then_; else_; post }
let tm_match sc returns_ brs = Tm_Match {sc; returns_; brs}
let tm_elim_exists p = Tm_ElimExists { p }
let tm_intro_exists p witnesses = Tm_IntroExists { p; witnesses } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_par : pre1: Pulse.Syntax.Base.term ->
body1: Pulse.Syntax.Base.st_term ->
post1: Pulse.Syntax.Base.term ->
pre2: Pulse.Syntax.Base.term ->
body2: Pulse.Syntax.Base.st_term ->
post2: Pulse.Syntax.Base.term
-> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_par | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} |
pre1: Pulse.Syntax.Base.term ->
body1: Pulse.Syntax.Base.st_term ->
post1: Pulse.Syntax.Base.term ->
pre2: Pulse.Syntax.Base.term ->
body2: Pulse.Syntax.Base.st_term ->
post2: Pulse.Syntax.Base.term
-> Pulse.Syntax.Base.st_term' | {
"end_col": 96,
"end_line": 18,
"start_col": 47,
"start_line": 18
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_match sc returns_ brs = Tm_Match {sc; returns_; brs} | let tm_match sc returns_ brs = | false | null | false | Tm_Match ({ sc = sc; returns_ = returns_; brs = brs }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.term",
"FStar.Pervasives.Native.option",
"Pulse.Syntax.Base.vprop",
"Prims.list",
"FStar.Pervasives.Native.tuple2",
"Pulse.Syntax.Base.pattern",
"Pulse.Syntax.Base.st_term",
"Pulse.Syntax.Base.Tm_Match",
"Pulse.Syntax.Base.Mkst_term'__Tm_Match__payload",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_match : sc: Pulse.Syntax.Base.term ->
returns_: FStar.Pervasives.Native.option Pulse.Syntax.Base.vprop ->
brs: Prims.list (Pulse.Syntax.Base.pattern * Pulse.Syntax.Base.st_term)
-> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_match | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} |
sc: Pulse.Syntax.Base.term ->
returns_: FStar.Pervasives.Native.option Pulse.Syntax.Base.vprop ->
brs: Prims.list (Pulse.Syntax.Base.pattern * Pulse.Syntax.Base.st_term)
-> Pulse.Syntax.Base.st_term' | {
"end_col": 59,
"end_line": 14,
"start_col": 31,
"start_line": 14
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_rename pairs t = Tm_ProofHintWithBinders { hint_type = RENAME { pairs; goal=None}; binders=[]; t} | let tm_rename pairs t = | false | null | false | Tm_ProofHintWithBinders
({ hint_type = RENAME ({ pairs = pairs; goal = None }); binders = []; t = t }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Prims.list",
"FStar.Pervasives.Native.tuple2",
"Pulse.Syntax.Base.term",
"Pulse.Syntax.Base.st_term",
"Pulse.Syntax.Base.Tm_ProofHintWithBinders",
"Pulse.Syntax.Base.Mkst_term'__Tm_ProofHintWithBinders__payload",
"Pulse.Syntax.Base.RENAME",
"Pulse.Syntax.Base.Mkproof_hint_type__RENAME__payload",
"FStar.Pervasives.Native.None",
"Prims.Nil",
"Pulse.Syntax.Base.binder",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body }
let tm_if b then_ else_ post = Tm_If { b; then_; else_; post }
let tm_match sc returns_ brs = Tm_Match {sc; returns_; brs}
let tm_elim_exists p = Tm_ElimExists { p }
let tm_intro_exists p witnesses = Tm_IntroExists { p; witnesses }
let tm_while invariant condition condition_var body = Tm_While { invariant; condition; condition_var; body }
let tm_par pre1 body1 post1 pre2 body2 post2 = Tm_Par { pre1; body1; post1; pre2; body2; post2 }
let tm_with_local binder initializer body = Tm_WithLocal { binder; initializer; body }
let tm_with_local_array binder initializer length body = Tm_WithLocalArray { binder; initializer; length; body } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_rename : pairs: Prims.list (Pulse.Syntax.Base.term * Pulse.Syntax.Base.term) -> t: Pulse.Syntax.Base.st_term
-> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_rename | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | pairs: Prims.list (Pulse.Syntax.Base.term * Pulse.Syntax.Base.term) -> t: Pulse.Syntax.Base.st_term
-> Pulse.Syntax.Base.st_term' | {
"end_col": 104,
"end_line": 22,
"start_col": 24,
"start_line": 22
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let mk_fold_hint_type names p = FOLD { names; p } | let mk_fold_hint_type names p = | false | null | false | FOLD ({ names = names; p = p }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"FStar.Pervasives.Native.option",
"Prims.list",
"Prims.string",
"Pulse.Syntax.Base.vprop",
"Pulse.Syntax.Base.FOLD",
"Pulse.Syntax.Base.Mkproof_hint_type__FOLD__payload",
"Pulse.Syntax.Base.proof_hint_type"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body }
let tm_if b then_ else_ post = Tm_If { b; then_; else_; post }
let tm_match sc returns_ brs = Tm_Match {sc; returns_; brs}
let tm_elim_exists p = Tm_ElimExists { p }
let tm_intro_exists p witnesses = Tm_IntroExists { p; witnesses }
let tm_while invariant condition condition_var body = Tm_While { invariant; condition; condition_var; body }
let tm_par pre1 body1 post1 pre2 body2 post2 = Tm_Par { pre1; body1; post1; pre2; body2; post2 }
let tm_with_local binder initializer body = Tm_WithLocal { binder; initializer; body }
let tm_with_local_array binder initializer length body = Tm_WithLocalArray { binder; initializer; length; body }
let tm_rewrite t1 t2 = Tm_Rewrite { t1; t2 }
let tm_rename pairs t = Tm_ProofHintWithBinders { hint_type = RENAME { pairs; goal=None}; binders=[]; t}
let tm_admit ctag u typ post = Tm_Admit { ctag; u; typ; post }
let with_range t r = { term = t; range = r; effect_tag = default_effect_hint }
let tm_assert_with_binders bs p t = Tm_ProofHintWithBinders { hint_type=ASSERT { p }; binders=bs; t }
let mk_assert_hint_type p = ASSERT { p } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val mk_fold_hint_type : names: FStar.Pervasives.Native.option (Prims.list Prims.string) -> p: Pulse.Syntax.Base.vprop
-> Pulse.Syntax.Base.proof_hint_type | [] | Pulse.Syntax.Builder.mk_fold_hint_type | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | names: FStar.Pervasives.Native.option (Prims.list Prims.string) -> p: Pulse.Syntax.Base.vprop
-> Pulse.Syntax.Base.proof_hint_type | {
"end_col": 49,
"end_line": 28,
"start_col": 32,
"start_line": 28
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let pat_cons fv vs = Pat_Cons fv vs | let pat_cons fv vs = | false | null | false | Pat_Cons fv vs | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.fv",
"Prims.list",
"FStar.Pervasives.Native.tuple2",
"Pulse.Syntax.Base.pattern",
"Prims.bool",
"Pulse.Syntax.Base.Pat_Cons"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val pat_cons : fv: Pulse.Syntax.Base.fv -> vs: Prims.list (Pulse.Syntax.Base.pattern * Prims.bool)
-> Pulse.Syntax.Base.pattern | [] | Pulse.Syntax.Builder.pat_cons | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | fv: Pulse.Syntax.Base.fv -> vs: Prims.list (Pulse.Syntax.Base.pattern * Prims.bool)
-> Pulse.Syntax.Base.pattern | {
"end_col": 35,
"end_line": 6,
"start_col": 21,
"start_line": 6
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let mk_rewrite_hint_type t1 t2 = REWRITE { t1; t2 } | let mk_rewrite_hint_type t1 t2 = | false | null | false | REWRITE ({ t1 = t1; t2 = t2 }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.vprop",
"Pulse.Syntax.Base.REWRITE",
"Pulse.Syntax.Base.Mkproof_hint_type__REWRITE__payload",
"Pulse.Syntax.Base.proof_hint_type"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body }
let tm_if b then_ else_ post = Tm_If { b; then_; else_; post }
let tm_match sc returns_ brs = Tm_Match {sc; returns_; brs}
let tm_elim_exists p = Tm_ElimExists { p }
let tm_intro_exists p witnesses = Tm_IntroExists { p; witnesses }
let tm_while invariant condition condition_var body = Tm_While { invariant; condition; condition_var; body }
let tm_par pre1 body1 post1 pre2 body2 post2 = Tm_Par { pre1; body1; post1; pre2; body2; post2 }
let tm_with_local binder initializer body = Tm_WithLocal { binder; initializer; body }
let tm_with_local_array binder initializer length body = Tm_WithLocalArray { binder; initializer; length; body }
let tm_rewrite t1 t2 = Tm_Rewrite { t1; t2 }
let tm_rename pairs t = Tm_ProofHintWithBinders { hint_type = RENAME { pairs; goal=None}; binders=[]; t}
let tm_admit ctag u typ post = Tm_Admit { ctag; u; typ; post }
let with_range t r = { term = t; range = r; effect_tag = default_effect_hint }
let tm_assert_with_binders bs p t = Tm_ProofHintWithBinders { hint_type=ASSERT { p }; binders=bs; t }
let mk_assert_hint_type p = ASSERT { p }
let mk_unfold_hint_type names p = UNFOLD { names; p }
let mk_fold_hint_type names p = FOLD { names; p } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val mk_rewrite_hint_type : t1: Pulse.Syntax.Base.vprop -> t2: Pulse.Syntax.Base.vprop -> Pulse.Syntax.Base.proof_hint_type | [] | Pulse.Syntax.Builder.mk_rewrite_hint_type | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | t1: Pulse.Syntax.Base.vprop -> t2: Pulse.Syntax.Base.vprop -> Pulse.Syntax.Base.proof_hint_type | {
"end_col": 51,
"end_line": 30,
"start_col": 33,
"start_line": 30
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body } | let tm_abs b q ascription body = | false | null | false | Tm_Abs ({ b = b; q = q; ascription = ascription; body = body }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.binder",
"FStar.Pervasives.Native.option",
"Pulse.Syntax.Base.qualifier",
"Pulse.Syntax.Base.comp",
"Pulse.Syntax.Base.st_term",
"Pulse.Syntax.Base.Tm_Abs",
"Pulse.Syntax.Base.Mkst_term'__Tm_Abs__payload",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_abs : b: Pulse.Syntax.Base.binder ->
q: FStar.Pervasives.Native.option Pulse.Syntax.Base.qualifier ->
ascription: Pulse.Syntax.Base.comp ->
body: Pulse.Syntax.Base.st_term
-> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_abs | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} |
b: Pulse.Syntax.Base.binder ->
q: FStar.Pervasives.Native.option Pulse.Syntax.Base.qualifier ->
ascription: Pulse.Syntax.Base.comp ->
body: Pulse.Syntax.Base.st_term
-> Pulse.Syntax.Base.st_term' | {
"end_col": 66,
"end_line": 9,
"start_col": 33,
"start_line": 9
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let tm_rewrite t1 t2 = Tm_Rewrite { t1; t2 } | let tm_rewrite t1 t2 = | false | null | false | Tm_Rewrite ({ t1 = t1; t2 = t2 }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.term",
"Pulse.Syntax.Base.Tm_Rewrite",
"Pulse.Syntax.Base.Mkst_term'__Tm_Rewrite__payload",
"Pulse.Syntax.Base.st_term'"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body }
let tm_if b then_ else_ post = Tm_If { b; then_; else_; post }
let tm_match sc returns_ brs = Tm_Match {sc; returns_; brs}
let tm_elim_exists p = Tm_ElimExists { p }
let tm_intro_exists p witnesses = Tm_IntroExists { p; witnesses }
let tm_while invariant condition condition_var body = Tm_While { invariant; condition; condition_var; body }
let tm_par pre1 body1 post1 pre2 body2 post2 = Tm_Par { pre1; body1; post1; pre2; body2; post2 }
let tm_with_local binder initializer body = Tm_WithLocal { binder; initializer; body } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val tm_rewrite : t1: Pulse.Syntax.Base.term -> t2: Pulse.Syntax.Base.term -> Pulse.Syntax.Base.st_term' | [] | Pulse.Syntax.Builder.tm_rewrite | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | t1: Pulse.Syntax.Base.term -> t2: Pulse.Syntax.Base.term -> Pulse.Syntax.Base.st_term' | {
"end_col": 44,
"end_line": 21,
"start_col": 23,
"start_line": 21
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let mk_assert_hint_type p = ASSERT { p } | let mk_assert_hint_type p = | false | null | false | ASSERT ({ p = p }) | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.vprop",
"Pulse.Syntax.Base.ASSERT",
"Pulse.Syntax.Base.Mkproof_hint_type__ASSERT__payload",
"Pulse.Syntax.Base.proof_hint_type"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body }
let tm_if b then_ else_ post = Tm_If { b; then_; else_; post }
let tm_match sc returns_ brs = Tm_Match {sc; returns_; brs}
let tm_elim_exists p = Tm_ElimExists { p }
let tm_intro_exists p witnesses = Tm_IntroExists { p; witnesses }
let tm_while invariant condition condition_var body = Tm_While { invariant; condition; condition_var; body }
let tm_par pre1 body1 post1 pre2 body2 post2 = Tm_Par { pre1; body1; post1; pre2; body2; post2 }
let tm_with_local binder initializer body = Tm_WithLocal { binder; initializer; body }
let tm_with_local_array binder initializer length body = Tm_WithLocalArray { binder; initializer; length; body }
let tm_rewrite t1 t2 = Tm_Rewrite { t1; t2 }
let tm_rename pairs t = Tm_ProofHintWithBinders { hint_type = RENAME { pairs; goal=None}; binders=[]; t}
let tm_admit ctag u typ post = Tm_Admit { ctag; u; typ; post }
let with_range t r = { term = t; range = r; effect_tag = default_effect_hint } | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val mk_assert_hint_type : p: Pulse.Syntax.Base.vprop -> Pulse.Syntax.Base.proof_hint_type | [] | Pulse.Syntax.Builder.mk_assert_hint_type | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | p: Pulse.Syntax.Base.vprop -> Pulse.Syntax.Base.proof_hint_type | {
"end_col": 40,
"end_line": 26,
"start_col": 28,
"start_line": 26
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let with_range t r = { term = t; range = r; effect_tag = default_effect_hint } | let with_range t r = | false | null | false | { term = t; range = r; effect_tag = default_effect_hint } | {
"checked_file": "Pulse.Syntax.Builder.fst.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Syntax.Builder.fst"
} | [
"total"
] | [
"Pulse.Syntax.Base.st_term'",
"Pulse.Syntax.Base.range",
"Pulse.Syntax.Base.Mkst_term",
"Pulse.Syntax.Base.default_effect_hint",
"Pulse.Syntax.Base.st_term"
] | [] | module Pulse.Syntax.Builder
open Pulse.Syntax
let pat_var s = Pat_Var s
let pat_const c = Pat_Constant c
let pat_cons fv vs = Pat_Cons fv vs
let tm_return ctag insert_eq term = Tm_Return { ctag; insert_eq; term }
let tm_abs b q ascription body = Tm_Abs { b; q; ascription; body }
let tm_stapp head arg_qual arg = Tm_STApp { head; arg_qual; arg }
let tm_bind binder head body = Tm_Bind { binder; head; body }
let tm_totbind binder head body = Tm_TotBind { binder; head; body }
let tm_if b then_ else_ post = Tm_If { b; then_; else_; post }
let tm_match sc returns_ brs = Tm_Match {sc; returns_; brs}
let tm_elim_exists p = Tm_ElimExists { p }
let tm_intro_exists p witnesses = Tm_IntroExists { p; witnesses }
let tm_while invariant condition condition_var body = Tm_While { invariant; condition; condition_var; body }
let tm_par pre1 body1 post1 pre2 body2 post2 = Tm_Par { pre1; body1; post1; pre2; body2; post2 }
let tm_with_local binder initializer body = Tm_WithLocal { binder; initializer; body }
let tm_with_local_array binder initializer length body = Tm_WithLocalArray { binder; initializer; length; body }
let tm_rewrite t1 t2 = Tm_Rewrite { t1; t2 }
let tm_rename pairs t = Tm_ProofHintWithBinders { hint_type = RENAME { pairs; goal=None}; binders=[]; t} | false | true | Pulse.Syntax.Builder.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val with_range : t: Pulse.Syntax.Base.st_term' -> r: Pulse.Syntax.Base.range -> Pulse.Syntax.Base.st_term | [] | Pulse.Syntax.Builder.with_range | {
"file_name": "lib/steel/pulse/Pulse.Syntax.Builder.fst",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | t: Pulse.Syntax.Base.st_term' -> r: Pulse.Syntax.Base.range -> Pulse.Syntax.Base.st_term | {
"end_col": 76,
"end_line": 24,
"start_col": 23,
"start_line": 24
} |
|
Prims.Tot | val one:real | [
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let one : real = of_int 1 | val one:real
let one:real = | false | null | false | of_int 1 | {
"checked_file": "FStar.Real.fsti.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "FStar.Real.fsti"
} | [
"total"
] | [
"FStar.Real.of_int"
] | [] | (*
Copyright 2008-2019 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module FStar.Real
(*
This module provides a signature for real arithmetic.
Real number constants can be specific in floating point format with
an 'R' suffix, e.g., 1.0R
All these operations are mapped to the corresponding primitives
in Z3's theory of real arithmetic.
*)
val real : eqtype
val of_int : int -> Tot real
(**
Used to extract real constants; this function is
uninterpreted logically. i.e., 1.1R is extracted to
[of_string "1.1"]
*)
val of_string: string -> Tot real
val ( +. ) : real -> real -> Tot real
val ( -. ) : real -> real -> Tot real
val ( *. ) : real -> real -> Tot real
val ( /. ) : real -> d:real{d <> 0.0R} -> Tot real
val ( >. ) : real -> real -> Tot bool
val ( >=. ) : real -> real -> Tot bool
val ( <. ) : real -> real -> Tot bool
val ( <=. ) : real -> real -> Tot bool
#reset-options "--smtencoding.elim_box true --smtencoding.l_arith_repr native --smtencoding.nl_arith_repr native"
//Tests | false | true | FStar.Real.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "native",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val one:real | [] | FStar.Real.one | {
"file_name": "ulib/FStar.Real.fsti",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | FStar.Real.real | {
"end_col": 25,
"end_line": 52,
"start_col": 17,
"start_line": 52
} |
Prims.Tot | val two:real | [
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let two : real = of_int 2 | val two:real
let two:real = | false | null | false | of_int 2 | {
"checked_file": "FStar.Real.fsti.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "FStar.Real.fsti"
} | [
"total"
] | [
"FStar.Real.of_int"
] | [] | (*
Copyright 2008-2019 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module FStar.Real
(*
This module provides a signature for real arithmetic.
Real number constants can be specific in floating point format with
an 'R' suffix, e.g., 1.0R
All these operations are mapped to the corresponding primitives
in Z3's theory of real arithmetic.
*)
val real : eqtype
val of_int : int -> Tot real
(**
Used to extract real constants; this function is
uninterpreted logically. i.e., 1.1R is extracted to
[of_string "1.1"]
*)
val of_string: string -> Tot real
val ( +. ) : real -> real -> Tot real
val ( -. ) : real -> real -> Tot real
val ( *. ) : real -> real -> Tot real
val ( /. ) : real -> d:real{d <> 0.0R} -> Tot real
val ( >. ) : real -> real -> Tot bool
val ( >=. ) : real -> real -> Tot bool
val ( <. ) : real -> real -> Tot bool
val ( <=. ) : real -> real -> Tot bool
#reset-options "--smtencoding.elim_box true --smtencoding.l_arith_repr native --smtencoding.nl_arith_repr native"
//Tests
let zero : real = of_int 0 | false | true | FStar.Real.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "native",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val two:real | [] | FStar.Real.two | {
"file_name": "ulib/FStar.Real.fsti",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | FStar.Real.real | {
"end_col": 25,
"end_line": 53,
"start_col": 17,
"start_line": 53
} |
Prims.Tot | val zero:real | [
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let zero : real = of_int 0 | val zero:real
let zero:real = | false | null | false | of_int 0 | {
"checked_file": "FStar.Real.fsti.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "FStar.Real.fsti"
} | [
"total"
] | [
"FStar.Real.of_int"
] | [] | (*
Copyright 2008-2019 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module FStar.Real
(*
This module provides a signature for real arithmetic.
Real number constants can be specific in floating point format with
an 'R' suffix, e.g., 1.0R
All these operations are mapped to the corresponding primitives
in Z3's theory of real arithmetic.
*)
val real : eqtype
val of_int : int -> Tot real
(**
Used to extract real constants; this function is
uninterpreted logically. i.e., 1.1R is extracted to
[of_string "1.1"]
*)
val of_string: string -> Tot real
val ( +. ) : real -> real -> Tot real
val ( -. ) : real -> real -> Tot real
val ( *. ) : real -> real -> Tot real
val ( /. ) : real -> d:real{d <> 0.0R} -> Tot real
val ( >. ) : real -> real -> Tot bool
val ( >=. ) : real -> real -> Tot bool
val ( <. ) : real -> real -> Tot bool
val ( <=. ) : real -> real -> Tot bool
#reset-options "--smtencoding.elim_box true --smtencoding.l_arith_repr native --smtencoding.nl_arith_repr native" | false | true | FStar.Real.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "native",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val zero:real | [] | FStar.Real.zero | {
"file_name": "ulib/FStar.Real.fsti",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | FStar.Real.real | {
"end_col": 26,
"end_line": 51,
"start_col": 18,
"start_line": 51
} |
Prims.Tot | [
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let test_gt2 = assert (~ (1.0R >. 1.0R)) | let test_gt2 = | false | null | false | assert (~(1.0R >. 1.0R)) | {
"checked_file": "FStar.Real.fsti.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "FStar.Real.fsti"
} | [
"total"
] | [
"Prims._assert",
"Prims.l_not",
"Prims.b2t",
"FStar.Real.op_Greater_Dot"
] | [] | (*
Copyright 2008-2019 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module FStar.Real
(*
This module provides a signature for real arithmetic.
Real number constants can be specific in floating point format with
an 'R' suffix, e.g., 1.0R
All these operations are mapped to the corresponding primitives
in Z3's theory of real arithmetic.
*)
val real : eqtype
val of_int : int -> Tot real
(**
Used to extract real constants; this function is
uninterpreted logically. i.e., 1.1R is extracted to
[of_string "1.1"]
*)
val of_string: string -> Tot real
val ( +. ) : real -> real -> Tot real
val ( -. ) : real -> real -> Tot real
val ( *. ) : real -> real -> Tot real
val ( /. ) : real -> d:real{d <> 0.0R} -> Tot real
val ( >. ) : real -> real -> Tot bool
val ( >=. ) : real -> real -> Tot bool
val ( <. ) : real -> real -> Tot bool
val ( <=. ) : real -> real -> Tot bool
#reset-options "--smtencoding.elim_box true --smtencoding.l_arith_repr native --smtencoding.nl_arith_repr native"
//Tests
let zero : real = of_int 0
let one : real = of_int 1
let two : real = of_int 2
val sqrt_2 : r:real{r *. r = two}
let n_over_n2 (n:real{n <> 0.0R /\ n*.n <> 0.0R}) = assert (n /. (n *. n) == 1.0R /. n)
let test = assert (two >. one)
let test1 = assert (one = 1.0R)
let test_lt1 = assert (1.0R <. 2.0R)
let test_lt2 = assert (~ (1.0R <. 1.0R))
let test_lt3 = assert (~ (2.0R <. 1.0R))
let test_le1 = assert (1.0R <=. 2.0R)
let test_le2 = assert (1.0R <=. 1.0R)
let test_le3 = assert (~ (2.0R <=. 1.0R)) | false | true | FStar.Real.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "native",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val test_gt2 : Prims.unit | [] | FStar.Real.test_gt2 | {
"file_name": "ulib/FStar.Real.fsti",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | Prims.unit | {
"end_col": 40,
"end_line": 71,
"start_col": 15,
"start_line": 71
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let mul_nil_r = assert (forall n. n *. 0.0R = 0.0R) | let mul_nil_r = | false | null | false | assert (forall n. n *. 0.0R = 0.0R) | {
"checked_file": "FStar.Real.fsti.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "FStar.Real.fsti"
} | [
"total"
] | [
"Prims._assert",
"Prims.l_Forall",
"FStar.Real.real",
"Prims.b2t",
"Prims.op_Equality",
"FStar.Real.op_Star_Dot"
] | [] | (*
Copyright 2008-2019 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module FStar.Real
(*
This module provides a signature for real arithmetic.
Real number constants can be specific in floating point format with
an 'R' suffix, e.g., 1.0R
All these operations are mapped to the corresponding primitives
in Z3's theory of real arithmetic.
*)
val real : eqtype
val of_int : int -> Tot real
(**
Used to extract real constants; this function is
uninterpreted logically. i.e., 1.1R is extracted to
[of_string "1.1"]
*)
val of_string: string -> Tot real
val ( +. ) : real -> real -> Tot real
val ( -. ) : real -> real -> Tot real
val ( *. ) : real -> real -> Tot real
val ( /. ) : real -> d:real{d <> 0.0R} -> Tot real
val ( >. ) : real -> real -> Tot bool
val ( >=. ) : real -> real -> Tot bool
val ( <. ) : real -> real -> Tot bool
val ( <=. ) : real -> real -> Tot bool
#reset-options "--smtencoding.elim_box true --smtencoding.l_arith_repr native --smtencoding.nl_arith_repr native"
//Tests
let zero : real = of_int 0
let one : real = of_int 1
let two : real = of_int 2
val sqrt_2 : r:real{r *. r = two}
let n_over_n2 (n:real{n <> 0.0R /\ n*.n <> 0.0R}) = assert (n /. (n *. n) == 1.0R /. n)
let test = assert (two >. one)
let test1 = assert (one = 1.0R)
let test_lt1 = assert (1.0R <. 2.0R)
let test_lt2 = assert (~ (1.0R <. 1.0R))
let test_lt3 = assert (~ (2.0R <. 1.0R))
let test_le1 = assert (1.0R <=. 2.0R)
let test_le2 = assert (1.0R <=. 1.0R)
let test_le3 = assert (~ (2.0R <=. 1.0R))
let test_gt1 = assert (~ (1.0R >. 2.0R))
let test_gt2 = assert (~ (1.0R >. 1.0R))
let test_gt3 = assert (2.0R >. 1.0R)
let test_ge1 = assert (~ (1.0R >=. 2.0R))
let test_ge2 = assert (1.0R >=. 1.0R)
let test_ge3 = assert (2.0R >=. 1.0R)
let test_add_eq = assert (1.0R +. 1.0R = 2.0R)
let test_add_eq' = assert (1.0R +. 3.0R = 4.0R)
let test_add_lt = assert (1.0R +. 1.0R <. 3.0R)
let test_mul_eq = assert (2.0R *. 2.0R = 4.0R)
let test_mul_lt = assert (2.0R *. 2.0R <. 5.0R)
let test_div_eq = assert (8.0R /. 2.0R = 4.0R)
let test_div_lt = assert (8.0R /. 2.0R <. 5.0R)
let test_sqrt_2_mul = assert (sqrt_2 *. sqrt_2 = 2.0R)
//let test_sqrt_2_add = assert (sqrt_2 +. sqrt_2 >. 2.0R) // Fails
let test_sqrt_2_scale = assert (1.0R /. sqrt_2 = sqrt_2 /. 2.0R)
// Common identities
let add_id_l = assert (forall n. 0.0R +. n = n)
let add_id_r = assert (forall n. n +. 0.0R = n) | false | true | FStar.Real.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "native",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val mul_nil_r : Prims.unit | [] | FStar.Real.mul_nil_r | {
"file_name": "ulib/FStar.Real.fsti",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | Prims.unit | {
"end_col": 51,
"end_line": 97,
"start_col": 16,
"start_line": 97
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let test_sqrt_2_scale = assert (1.0R /. sqrt_2 = sqrt_2 /. 2.0R) | let test_sqrt_2_scale = | false | null | false | assert (1.0R /. sqrt_2 = sqrt_2 /. 2.0R) | {
"checked_file": "FStar.Real.fsti.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "FStar.Real.fsti"
} | [
"total"
] | [
"Prims._assert",
"Prims.b2t",
"Prims.op_Equality",
"FStar.Real.real",
"FStar.Real.op_Slash_Dot",
"FStar.Real.sqrt_2"
] | [] | (*
Copyright 2008-2019 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module FStar.Real
(*
This module provides a signature for real arithmetic.
Real number constants can be specific in floating point format with
an 'R' suffix, e.g., 1.0R
All these operations are mapped to the corresponding primitives
in Z3's theory of real arithmetic.
*)
val real : eqtype
val of_int : int -> Tot real
(**
Used to extract real constants; this function is
uninterpreted logically. i.e., 1.1R is extracted to
[of_string "1.1"]
*)
val of_string: string -> Tot real
val ( +. ) : real -> real -> Tot real
val ( -. ) : real -> real -> Tot real
val ( *. ) : real -> real -> Tot real
val ( /. ) : real -> d:real{d <> 0.0R} -> Tot real
val ( >. ) : real -> real -> Tot bool
val ( >=. ) : real -> real -> Tot bool
val ( <. ) : real -> real -> Tot bool
val ( <=. ) : real -> real -> Tot bool
#reset-options "--smtencoding.elim_box true --smtencoding.l_arith_repr native --smtencoding.nl_arith_repr native"
//Tests
let zero : real = of_int 0
let one : real = of_int 1
let two : real = of_int 2
val sqrt_2 : r:real{r *. r = two}
let n_over_n2 (n:real{n <> 0.0R /\ n*.n <> 0.0R}) = assert (n /. (n *. n) == 1.0R /. n)
let test = assert (two >. one)
let test1 = assert (one = 1.0R)
let test_lt1 = assert (1.0R <. 2.0R)
let test_lt2 = assert (~ (1.0R <. 1.0R))
let test_lt3 = assert (~ (2.0R <. 1.0R))
let test_le1 = assert (1.0R <=. 2.0R)
let test_le2 = assert (1.0R <=. 1.0R)
let test_le3 = assert (~ (2.0R <=. 1.0R))
let test_gt1 = assert (~ (1.0R >. 2.0R))
let test_gt2 = assert (~ (1.0R >. 1.0R))
let test_gt3 = assert (2.0R >. 1.0R)
let test_ge1 = assert (~ (1.0R >=. 2.0R))
let test_ge2 = assert (1.0R >=. 1.0R)
let test_ge3 = assert (2.0R >=. 1.0R)
let test_add_eq = assert (1.0R +. 1.0R = 2.0R)
let test_add_eq' = assert (1.0R +. 3.0R = 4.0R)
let test_add_lt = assert (1.0R +. 1.0R <. 3.0R)
let test_mul_eq = assert (2.0R *. 2.0R = 4.0R)
let test_mul_lt = assert (2.0R *. 2.0R <. 5.0R)
let test_div_eq = assert (8.0R /. 2.0R = 4.0R)
let test_div_lt = assert (8.0R /. 2.0R <. 5.0R)
let test_sqrt_2_mul = assert (sqrt_2 *. sqrt_2 = 2.0R) | false | true | FStar.Real.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "native",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val test_sqrt_2_scale : Prims.unit | [] | FStar.Real.test_sqrt_2_scale | {
"file_name": "ulib/FStar.Real.fsti",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | Prims.unit | {
"end_col": 64,
"end_line": 90,
"start_col": 24,
"start_line": 90
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let test_add_eq' = assert (1.0R +. 3.0R = 4.0R) | let test_add_eq' = | false | null | false | assert (1.0R +. 3.0R = 4.0R) | {
"checked_file": "FStar.Real.fsti.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "FStar.Real.fsti"
} | [
"total"
] | [
"Prims._assert",
"Prims.b2t",
"Prims.op_Equality",
"FStar.Real.real",
"FStar.Real.op_Plus_Dot"
] | [] | (*
Copyright 2008-2019 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module FStar.Real
(*
This module provides a signature for real arithmetic.
Real number constants can be specific in floating point format with
an 'R' suffix, e.g., 1.0R
All these operations are mapped to the corresponding primitives
in Z3's theory of real arithmetic.
*)
val real : eqtype
val of_int : int -> Tot real
(**
Used to extract real constants; this function is
uninterpreted logically. i.e., 1.1R is extracted to
[of_string "1.1"]
*)
val of_string: string -> Tot real
val ( +. ) : real -> real -> Tot real
val ( -. ) : real -> real -> Tot real
val ( *. ) : real -> real -> Tot real
val ( /. ) : real -> d:real{d <> 0.0R} -> Tot real
val ( >. ) : real -> real -> Tot bool
val ( >=. ) : real -> real -> Tot bool
val ( <. ) : real -> real -> Tot bool
val ( <=. ) : real -> real -> Tot bool
#reset-options "--smtencoding.elim_box true --smtencoding.l_arith_repr native --smtencoding.nl_arith_repr native"
//Tests
let zero : real = of_int 0
let one : real = of_int 1
let two : real = of_int 2
val sqrt_2 : r:real{r *. r = two}
let n_over_n2 (n:real{n <> 0.0R /\ n*.n <> 0.0R}) = assert (n /. (n *. n) == 1.0R /. n)
let test = assert (two >. one)
let test1 = assert (one = 1.0R)
let test_lt1 = assert (1.0R <. 2.0R)
let test_lt2 = assert (~ (1.0R <. 1.0R))
let test_lt3 = assert (~ (2.0R <. 1.0R))
let test_le1 = assert (1.0R <=. 2.0R)
let test_le2 = assert (1.0R <=. 1.0R)
let test_le3 = assert (~ (2.0R <=. 1.0R))
let test_gt1 = assert (~ (1.0R >. 2.0R))
let test_gt2 = assert (~ (1.0R >. 1.0R))
let test_gt3 = assert (2.0R >. 1.0R)
let test_ge1 = assert (~ (1.0R >=. 2.0R))
let test_ge2 = assert (1.0R >=. 1.0R)
let test_ge3 = assert (2.0R >=. 1.0R) | false | true | FStar.Real.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "native",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val test_add_eq' : Prims.unit | [] | FStar.Real.test_add_eq' | {
"file_name": "ulib/FStar.Real.fsti",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | Prims.unit | {
"end_col": 47,
"end_line": 79,
"start_col": 19,
"start_line": 79
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let test_le3 = assert (~ (2.0R <=. 1.0R)) | let test_le3 = | false | null | false | assert (~(2.0R <=. 1.0R)) | {
"checked_file": "FStar.Real.fsti.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "FStar.Real.fsti"
} | [
"total"
] | [
"Prims._assert",
"Prims.l_not",
"Prims.b2t",
"FStar.Real.op_Less_Equals_Dot"
] | [] | (*
Copyright 2008-2019 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module FStar.Real
(*
This module provides a signature for real arithmetic.
Real number constants can be specific in floating point format with
an 'R' suffix, e.g., 1.0R
All these operations are mapped to the corresponding primitives
in Z3's theory of real arithmetic.
*)
val real : eqtype
val of_int : int -> Tot real
(**
Used to extract real constants; this function is
uninterpreted logically. i.e., 1.1R is extracted to
[of_string "1.1"]
*)
val of_string: string -> Tot real
val ( +. ) : real -> real -> Tot real
val ( -. ) : real -> real -> Tot real
val ( *. ) : real -> real -> Tot real
val ( /. ) : real -> d:real{d <> 0.0R} -> Tot real
val ( >. ) : real -> real -> Tot bool
val ( >=. ) : real -> real -> Tot bool
val ( <. ) : real -> real -> Tot bool
val ( <=. ) : real -> real -> Tot bool
#reset-options "--smtencoding.elim_box true --smtencoding.l_arith_repr native --smtencoding.nl_arith_repr native"
//Tests
let zero : real = of_int 0
let one : real = of_int 1
let two : real = of_int 2
val sqrt_2 : r:real{r *. r = two}
let n_over_n2 (n:real{n <> 0.0R /\ n*.n <> 0.0R}) = assert (n /. (n *. n) == 1.0R /. n)
let test = assert (two >. one)
let test1 = assert (one = 1.0R)
let test_lt1 = assert (1.0R <. 2.0R)
let test_lt2 = assert (~ (1.0R <. 1.0R))
let test_lt3 = assert (~ (2.0R <. 1.0R))
let test_le1 = assert (1.0R <=. 2.0R) | false | true | FStar.Real.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "native",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val test_le3 : Prims.unit | [] | FStar.Real.test_le3 | {
"file_name": "ulib/FStar.Real.fsti",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | Prims.unit | {
"end_col": 41,
"end_line": 68,
"start_col": 15,
"start_line": 68
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let test_mul_eq = assert (2.0R *. 2.0R = 4.0R) | let test_mul_eq = | false | null | false | assert (2.0R *. 2.0R = 4.0R) | {
"checked_file": "FStar.Real.fsti.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "FStar.Real.fsti"
} | [
"total"
] | [
"Prims._assert",
"Prims.b2t",
"Prims.op_Equality",
"FStar.Real.real",
"FStar.Real.op_Star_Dot"
] | [] | (*
Copyright 2008-2019 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module FStar.Real
(*
This module provides a signature for real arithmetic.
Real number constants can be specific in floating point format with
an 'R' suffix, e.g., 1.0R
All these operations are mapped to the corresponding primitives
in Z3's theory of real arithmetic.
*)
val real : eqtype
val of_int : int -> Tot real
(**
Used to extract real constants; this function is
uninterpreted logically. i.e., 1.1R is extracted to
[of_string "1.1"]
*)
val of_string: string -> Tot real
val ( +. ) : real -> real -> Tot real
val ( -. ) : real -> real -> Tot real
val ( *. ) : real -> real -> Tot real
val ( /. ) : real -> d:real{d <> 0.0R} -> Tot real
val ( >. ) : real -> real -> Tot bool
val ( >=. ) : real -> real -> Tot bool
val ( <. ) : real -> real -> Tot bool
val ( <=. ) : real -> real -> Tot bool
#reset-options "--smtencoding.elim_box true --smtencoding.l_arith_repr native --smtencoding.nl_arith_repr native"
//Tests
let zero : real = of_int 0
let one : real = of_int 1
let two : real = of_int 2
val sqrt_2 : r:real{r *. r = two}
let n_over_n2 (n:real{n <> 0.0R /\ n*.n <> 0.0R}) = assert (n /. (n *. n) == 1.0R /. n)
let test = assert (two >. one)
let test1 = assert (one = 1.0R)
let test_lt1 = assert (1.0R <. 2.0R)
let test_lt2 = assert (~ (1.0R <. 1.0R))
let test_lt3 = assert (~ (2.0R <. 1.0R))
let test_le1 = assert (1.0R <=. 2.0R)
let test_le2 = assert (1.0R <=. 1.0R)
let test_le3 = assert (~ (2.0R <=. 1.0R))
let test_gt1 = assert (~ (1.0R >. 2.0R))
let test_gt2 = assert (~ (1.0R >. 1.0R))
let test_gt3 = assert (2.0R >. 1.0R)
let test_ge1 = assert (~ (1.0R >=. 2.0R))
let test_ge2 = assert (1.0R >=. 1.0R)
let test_ge3 = assert (2.0R >=. 1.0R)
let test_add_eq = assert (1.0R +. 1.0R = 2.0R)
let test_add_eq' = assert (1.0R +. 3.0R = 4.0R)
let test_add_lt = assert (1.0R +. 1.0R <. 3.0R) | false | true | FStar.Real.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "native",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val test_mul_eq : Prims.unit | [] | FStar.Real.test_mul_eq | {
"file_name": "ulib/FStar.Real.fsti",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | Prims.unit | {
"end_col": 46,
"end_line": 82,
"start_col": 18,
"start_line": 82
} |
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